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2016 17th International Conference on Electronic Packaging Technology (ICEPT)最新文献

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Preparation water dispersible reduced graphene oxide as ink materials for the flexible and wearable energy storage devices 制备水分散的还原氧化石墨烯作为柔性可穿戴储能装置的油墨材料
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583123
H. Su, Pengli Zhu, F. Zhou, Yankang Han, X. Shuai, Yougen Hu, Tingxi Li, R. Sun, C. Wong
We report a facile and highly-effective method to synthesize W-RGO (water dispersible reduced graphene oxide), and fabricate a textile cloth based flexible electrode using the obtained W-RGO as ink materials via the simple dipping and coating method. FTIR (Fourier transform infrared spectroscopy), XPS (X-ray photoelectron spectroscopy) and Raman spectroscopy were used to analyze the morphology and structure of the W-RGO samples. The results showed that the GO (graphene oxide) sheets had been successfully modified and reduced with ABS (3-Aminobenzene sulfonic acid) and Ascorbic Acid. In addition, the CV (cyclic voltammetry) was used to investigate the electrochemical performance with a two-electrode cell measurement, and the electrochemical data exhibited that the electrode displayed high areal capacitance of 70 mF cm-2 at the current density of 5 mA cm-2, and retained 94.3 % of the initial capacitance after 2000 cycles, which provide another new ways to fabricate the flexible and wearable energy storage devices.
本文报道了一种简便高效的制备水分散性还原氧化石墨烯(W-RGO)的方法,并将得到的W-RGO作为油墨材料,通过简单的浸涂法制备纺织布基柔性电极。利用FTIR(傅里叶变换红外光谱)、XPS (x射线光电子能谱)和拉曼光谱分析了W-RGO样品的形貌和结构。结果表明,ABS(3-氨基苯磺酸)和抗坏血酸对氧化石墨烯薄膜进行了成功的改性和还原。此外,利用循环伏安法(CV)研究了双电极电池的电化学性能,电化学数据表明,在电流密度为5 mA cm-2时,电极的面电容高达70 mF cm-2,循环2000次后仍保持初始电容的94.3%,为柔性可穿戴储能器件的制造提供了新的途径。
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引用次数: 0
A design of a multi-sensor platform by System-Level integration in the package 设计了一个采用系统级集成在封装中的多传感器平台
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583274
Cheng Li, H. Guo, Xuesong Zhang, Qian Wang, Jian Cai
The design, assembly and testing of a multi-sensor platform that could be used to detect specific parameters of ambient environment is presented in this paper. This platform will be packaged using System-Level integration and could be used as one of the nodes in a sensor network. It is composed of commercial off-the-shelf components, which allows low cost and flexible component selection. The sensors including an air pressure sensor, an ambient light sensor, and a motion tracking device. A FLASH memory which could be used for storing the measured data is also included. A MCU block is the core device for controlling and communicating with other blocks. A four-layered PCB is carefully designed and simulated to ensure a smaller shape and a reliable electrical environment. All components are assembled on this PCB to constitute a SiP with 16 IOs in Quad Flat No-lead format, thereafter, a prototype is implemented and a testing procedure is taken to verify the functionality of this platform.
本文介绍了一种可用于环境特定参数检测的多传感器平台的设计、组装和测试。该平台将采用系统级集成封装,可作为传感器网络中的节点之一。它由商业现成的组件组成,允许低成本和灵活的组件选择。传感器包括气压传感器、环境光传感器和运动跟踪装置。还包括可用于存储测量数据的闪存。单片机模块是控制和与其他模块通信的核心器件。精心设计和模拟了四层PCB,以确保较小的形状和可靠的电气环境。所有组件都组装在该PCB上,构成一个带有16个io的SiP,采用Quad Flat No-lead格式,然后实现原型并采取测试程序来验证该平台的功能。
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引用次数: 2
Analysis of photoluminescence mechanisms and thermal quenching effects for multicolor phosphor films used in high color rendering white LEDs 高显色白光led用多色荧光粉薄膜的光致发光机理及热猝灭效应分析
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583148
Mengni Zhang, Jiajie Fan, C. Qian, Xuejun Fan, Aimin Ji, Guoqi Zhang
In order to prepare phosphor-converted white LEDs with high color rendering index (CRI) and high luminous efficiency, the multicolor phosphor film by mixing more than two monochromatic phosphor powders in a silicone matrix is widely used. But usually its photoluminescence mechanism can't be explained by a simple superposition of each spectra emitted by individual monochromatic phosphors. Additionally, as being close to LED chips, the phosphor film is always suffered under high temperature when LED operates. Therefore, this study analyzes the thermal quenching effects of multicolor phosphor films prepared by mixing the Garnets, Silicates and Nitrides based phosphors in silicone. And their photoluminescence mechanisms are investigated by modeling of spectral power distributions (SPDs) for the prepared white LED chip scale packages (CSPs) through optical simulations with LightTools software. Through analyzing the features of emission spectra (e.g. emission peak, peak wavelength and full widths at half maximum (FWHMs)) from prepared multicolor phosphor films, the results show that the heat treatment leads to a significant decrease of luminous intensity, all peak wavelengths shift to the short-wavelength range and all FWHMs become narrow. However, these results are not simply the superposition of each thermal quenching effect of monochromatic phosphors and this nonlinearity is supposed to be caused by the reabsorption of luminescence between phosphor particles and multiple conversions among them.
为了制备高显色指数(CRI)和高发光效率的磷光转换白光led,在硅基中混合两种以上单色磷光粉制备的多色磷光膜被广泛应用。但通常它的光致发光机制不能用单个单色荧光粉发出的每个光谱的简单叠加来解释。此外,由于靠近LED芯片,荧光粉膜在LED工作时经常受到高温的影响。因此,本研究分析了在有机硅中混合石榴石、硅酸盐和氮化物基荧光粉制备的多色荧光粉薄膜的热猝灭效果。利用LightTools软件对制备的白光LED芯片级封装(csp)的光谱功率分布(SPDs)进行光学模拟,研究其光致发光机理。通过分析制备的多色荧光粉薄膜的发射光谱特征(发射峰、峰值波长和半峰全宽),结果表明:热处理导致发光强度显著降低,所有峰波长都向短波长范围内移动,所有峰宽都变窄。然而,这些结果并不是单色荧光粉各热猝灭效应的简单叠加,这种非线性应该是由荧光粉粒子之间发光的重吸收和它们之间的多次转换引起的。
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引用次数: 8
Impacts of back-grinding process parameters on the strength of thinned silicon wafer 反磨工艺参数对薄硅片强度的影响
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583338
Bie Xiaorui, Q. Fei, Zhou Linfeng, Sun Jinglong, Chen Pei, Wang Zhongkang
In order to achieve the packages with much higher performance, more I/Os, lower profile and lighter weight, the thickness of silicon wafer has been decreased dramatically in recent years, but which degrades the strength of thinned wafer. In this paper, three-point bending test was adopted to evaluate the thinned wafer fracture strength, and the impacts of back-grinding process parameters on the wafer fracture strength were addressed. Results show the trend of an increase in wafer strength with an increase in grinding wheel rotational speed and a decrease in grinding wheel feed rate. Also, it is found that the strength decreases progressively from the center of wafer to the edge for most wafer samples.
为了实现更高的性能、更多的I/ o、更低的外形和更轻的重量,近年来硅片的厚度急剧下降,但这也降低了薄化硅片的强度。本文采用三点弯曲试验对薄化硅片的断裂强度进行评价,研究了反磨工艺参数对薄化硅片断裂强度的影响。结果表明:随着砂轮转速的增大和砂轮进给速率的减小,晶片强度有增大的趋势;同时发现,对于大多数晶圆样品,强度从晶圆中心到晶圆边缘呈递减趋势。
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引用次数: 6
Dynamic analysis of piezo-based accelerometer with asymmetric gapped cantilever array 非对称间隙悬臂阵列压电加速度计的动力学分析
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583346
Zhang Luo, Chaojun Liu, Shuai Yu, Sheng Liu, Yong Xu
This paper focuses on the dynamic analysis of a novel piezo-based accelerometer with asymmetric gapped cantilever array. The accelerometer with asymmetric gapped cantilever, firstly published in Xu's work, exhibits significantly improved sensitivity. In this paper, in order to achieve wider dynamic response range, new structure of the accelerometer is proposed with asymmetric gapped cantilever array.
对一种新型的非对称间隙悬臂阵列压电加速度计进行了动力学分析。徐的工作首次发表了非对称间隙悬臂加速度计,其灵敏度显着提高。为了实现更宽的动态响应范围,本文提出了一种非对称间隙悬臂阵列加速度计结构。
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引用次数: 0
Modeling and control of the temperature field in jet dispensing valve 喷射点胶阀温度场的建模与控制
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583124
Weisong Li, Xiuyang Shan, Haining Zhang
Fluid viscosity varying with fluid temperature is a key factor in influencing the volume consistency of the fluid jet dispensing process. In this paper, the mechanism model of the transient temperature field in jet dispensing valve was developed by applying heat transfer equations and thermal boundary conditions. Discrete solution of the model was achieved based on the Method of Lines. The design of PID controller was efficiently integrated into the proposed model to address the problem that the fluid temperature cannot keep stable at the set value in the jet dispensing valve. Simulations and experiments demonstrate the feasibility and efficiency of the proposed model. This paper provides references for analyzing and controlling the temperature of fluid in fluid jet dispensing process.
流体粘度随流体温度的变化是影响流体喷射点胶过程体积一致性的关键因素。本文应用传热方程和热边界条件,建立了射流点胶阀内部瞬态温度场的机理模型。采用线法对模型进行离散求解。该模型有效地集成了PID控制器的设计,解决了射流点胶阀内流体温度不能稳定在设定值上的问题。仿真和实验验证了该模型的可行性和有效性。本文为流体喷射点胶过程中流体温度的分析和控制提供了参考。
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引用次数: 0
Design of 14–14.5GHz semiconductor microwave digital phase shifters 14-14.5GHz半导体微波数字移相器的设计
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583349
Dan Yang, Zhao-Jun Zhu, Peng Liu
A switched line microwave digital phase shifter and a hybrid coupler phase shifter using PIN diodes which are operated at center frequencies from 14GHz to 14.5GHz are presented. The former is able to realize 180 degree phase shift and the latter is able to realize 11.25 degree phase shift. The phase shifters are designed to implement on a microstrip circuit type. Both of the two phase shifters can achieve flat phase shift and low VSWR by adding open-end transmission lines to the circuit. The simulation result shows that the design is very effectual.
介绍了一种工作在14GHz ~ 14.5GHz中心频率范围内的开关线微波数字移相器和PIN二极管混合耦合器移相器。前者可实现180度相移,后者可实现11.25度相移。移相器被设计成在微带电路上实现。这两种移相器都可以通过在电路中加入开放式传输线来实现平移相和低驻波比。仿真结果表明该设计是非常有效的。
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引用次数: 0
A brief overview of atomic layer deposition and etching in the semiconductor processing 简述半导体加工中的原子层沉积和蚀刻
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583377
Guangjie Yuan, Ning Wang, Shirong Huang, Johan Liu
Atomic layer deposition (ALD) and atomic layer etching (ALE) are two important techniques in the semiconductor processing, which focus ultra-thin film deposition and etching, respectively. Both of them have the self-limiting surface behavior, and could realize the atomic-scale fidelity in the deposition and etching processes. Unlike traditional chemical vapor deposition (CVD) and physical vapor deposition (PVD), ALD has good step coverage, atomic-scale thickness controllability, and composition uniformity at low growth temperature. Compared with traditional continuous-wave plasma etching, ALE has smooth surface, excellent depth uniformity and atomic-scale thickness controllability. In this review, their fundamental and applications have been discussed.
原子层沉积(ALD)和原子层刻蚀(ALE)是半导体加工中的两种重要技术,分别是超薄膜沉积和刻蚀的研究热点。这两种材料都具有自限制表面行为,在沉积和蚀刻过程中都能实现原子尺度的保真度。与传统的化学气相沉积(CVD)和物理气相沉积(PVD)不同,ALD具有良好的台阶覆盖、原子尺度的厚度可控性和低温下的成分均匀性。与传统的连续波等离子体刻蚀相比,ALE具有表面光滑、深度均匀性好和原子尺度厚度可控性等优点。本文综述了它们的基本原理和应用。
{"title":"A brief overview of atomic layer deposition and etching in the semiconductor processing","authors":"Guangjie Yuan, Ning Wang, Shirong Huang, Johan Liu","doi":"10.1109/ICEPT.2016.7583377","DOIUrl":"https://doi.org/10.1109/ICEPT.2016.7583377","url":null,"abstract":"Atomic layer deposition (ALD) and atomic layer etching (ALE) are two important techniques in the semiconductor processing, which focus ultra-thin film deposition and etching, respectively. Both of them have the self-limiting surface behavior, and could realize the atomic-scale fidelity in the deposition and etching processes. Unlike traditional chemical vapor deposition (CVD) and physical vapor deposition (PVD), ALD has good step coverage, atomic-scale thickness controllability, and composition uniformity at low growth temperature. Compared with traditional continuous-wave plasma etching, ALE has smooth surface, excellent depth uniformity and atomic-scale thickness controllability. In this review, their fundamental and applications have been discussed.","PeriodicalId":6881,"journal":{"name":"2016 17th International Conference on Electronic Packaging Technology (ICEPT)","volume":"27 1","pages":"1365-1368"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81004928","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Effects of thermal aging and electromigration on tensile strength of SnAgCu solder joints with different volume 热时效和电迁移对不同体积SnAgCu焊点抗拉强度的影响
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583240
G. Wang, L. Yin, Z. Yao, Jinzhao Wang
The effects of thermal aging and electromigration on the tensile strength and microstructure of SnAgCu micro-interconnection solder joints with different volume were discussed in this paper. The experimental results show that isothermal aging results in coarsening of the microstructure in the solder joint, and electromigration leads to micro-hole or micro-crack in the cathode interface, which bring about obvious degradation of tensile strength to the joints. The smaller volume of the micro-interconnection joint is, the less degradation of tensile strength for it, this is caused by the increasing mechanical constraint in the solder joints.
研究了热时效和电迁移对不同体积SnAgCu微互连焊点抗拉强度和显微组织的影响。实验结果表明,等温时效导致焊点组织粗化,电迁移导致阴极界面出现微孔或微裂纹,导致焊点抗拉强度明显下降。微互连接头体积越小,其抗拉强度下降越小,这是由于焊点的机械约束增加所致。
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引用次数: 1
Design of the printed circuit board for board level drop impact base on the JEDEC standard 基于JEDEC标准的板级跌落冲击印刷电路板设计
Pub Date : 2016-08-01 DOI: 10.1109/ICEPT.2016.7583203
Jian Gu, Y. Lei, Jian Lin, H. Fu, Zhong-wei Wu
the reliability of solder joint under drop impact is a crucial research area due to the smaller and higher density. The test standard for board level has been published by JEDEC in detail. Based on JEDEC board level drop test standard, the square board with four symmetry component is designed in this paper. The structure size of test board is 0.5mm×121mm×121mm. The distance of the center component to the center of test board is 15mm. The first six modal frequency is 23.56Hz, 136.37Hz, 138.53Hz, 165.98Hz, 346.35Hz and 394.56Hz respectively. This Design benefits for the board level drop life of solder joint statistics analysis. And the 0.5mm thickness design can be used as replacement test board to analyze the failure mechanism of solder joint under relative high drop impact level.
由于焊点的体积更小、密度更高,焊点在跌落冲击下的可靠性是一个重要的研究领域。JEDEC详细发布了板级测试标准。本文根据JEDEC板水平跌落试验标准,设计了四对称分量的方板。试验板的结构尺寸为0.5mm×121mm×121mm。中心组件到测试板中心的距离为15mm。前六个模态频率分别为23.56Hz、136.37Hz、138.53Hz、165.98Hz、346.35Hz和394.56Hz。本设计有利于板级焊点跌落寿命的统计分析。0.5mm厚度设计可作为替换试验板,分析较高跌落冲击水平下焊点的失效机理。
{"title":"Design of the printed circuit board for board level drop impact base on the JEDEC standard","authors":"Jian Gu, Y. Lei, Jian Lin, H. Fu, Zhong-wei Wu","doi":"10.1109/ICEPT.2016.7583203","DOIUrl":"https://doi.org/10.1109/ICEPT.2016.7583203","url":null,"abstract":"the reliability of solder joint under drop impact is a crucial research area due to the smaller and higher density. The test standard for board level has been published by JEDEC in detail. Based on JEDEC board level drop test standard, the square board with four symmetry component is designed in this paper. The structure size of test board is 0.5mm×121mm×121mm. The distance of the center component to the center of test board is 15mm. The first six modal frequency is 23.56Hz, 136.37Hz, 138.53Hz, 165.98Hz, 346.35Hz and 394.56Hz respectively. This Design benefits for the board level drop life of solder joint statistics analysis. And the 0.5mm thickness design can be used as replacement test board to analyze the failure mechanism of solder joint under relative high drop impact level.","PeriodicalId":6881,"journal":{"name":"2016 17th International Conference on Electronic Packaging Technology (ICEPT)","volume":"64 1","pages":"588-591"},"PeriodicalIF":0.0,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85279358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
期刊
2016 17th International Conference on Electronic Packaging Technology (ICEPT)
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