Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401830
A. Caboni, Daniela Loi, M. Barbaro
A CMOS integrated circuit hosting an array of 80 sensors for DNA hybridization detection was designed. Each biosensor is made up of a FET device whose current is modulated by DNA electric charge. The chip incorporates integrated temperature detection for precise assay control and features programmable signal conditioning, amplification and A/D conversion. Successful pre- and post-layout simulations are provided.
{"title":"A CMOS integrated circuit for DNA hybridization detection with digital output and temperature control","authors":"A. Caboni, Daniela Loi, M. Barbaro","doi":"10.1109/RME.2007.4401830","DOIUrl":"https://doi.org/10.1109/RME.2007.4401830","url":null,"abstract":"A CMOS integrated circuit hosting an array of 80 sensors for DNA hybridization detection was designed. Each biosensor is made up of a FET device whose current is modulated by DNA electric charge. The chip incorporates integrated temperature detection for precise assay control and features programmable signal conditioning, amplification and A/D conversion. Successful pre- and post-layout simulations are provided.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125273204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401824
M. Dei, E. Marchetti, P. Bruschi
A low power capacitance to voltage converter, specifically designed for integrated sensors, is presented. The circuit is based on a fully differential impedance meter driven by a triangular wave form. Synchronous demodulation allows effective reduction of low frequency noise and device mismatch effects. The results of simulations performed on a prototype, designed using the BCD6s process of STMicroelectronics, are presented.
{"title":"A micro power capacitive sensor readout channel based on the chopper modulation technique","authors":"M. Dei, E. Marchetti, P. Bruschi","doi":"10.1109/RME.2007.4401824","DOIUrl":"https://doi.org/10.1109/RME.2007.4401824","url":null,"abstract":"A low power capacitance to voltage converter, specifically designed for integrated sensors, is presented. The circuit is based on a fully differential impedance meter driven by a triangular wave form. Synchronous demodulation allows effective reduction of low frequency noise and device mismatch effects. The results of simulations performed on a prototype, designed using the BCD6s process of STMicroelectronics, are presented.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"83 3-4","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114100367","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401845
D. Durini, B. Hosticka
In this investigation we show how a standard 0.5 mum twin-well CMOS process can be used for CMOS imaging. The process features a single-polysilicon layer, as well as three metal layers, and it is LOCOS based. We discuss various issues affecting photodetection tasks in CMOS imaging applications and present an extensive study of possible photodetector structures. Also, we propose a novel CMOS imaging pixel structure, which exceeds the standard CMOS 2-D imaging performance.
{"title":"Photodetector structures for standard CMOS imaging applications","authors":"D. Durini, B. Hosticka","doi":"10.1109/RME.2007.4401845","DOIUrl":"https://doi.org/10.1109/RME.2007.4401845","url":null,"abstract":"In this investigation we show how a standard 0.5 mum twin-well CMOS process can be used for CMOS imaging. The process features a single-polysilicon layer, as well as three metal layers, and it is LOCOS based. We discuss various issues affecting photodetection tasks in CMOS imaging applications and present an extensive study of possible photodetector structures. Also, we propose a novel CMOS imaging pixel structure, which exceeds the standard CMOS 2-D imaging performance.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122082219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401856
S. Badel, Yusuf Leblebici
In this paper, two circuits are proposed to implement tri-state buffers/bus drivers for MOS current-mode logic digital circuits. The first is a switch-based, fully differential circuit, while the second is a voltage follower-based, pseudo- differential circuit. In order to compare their performance, circuits are implemented in a 0.18 mum CMOS technology, with the target data rate of 1Gbps over a 500 mum long bus. Simulation results are compared also with a standard CMOS bus driver from a commercial cell library.
本文提出了两种电路来实现MOS电流模逻辑数字电路的三态缓冲器/总线驱动。第一种是基于开关的全差分电路，第二种是基于电压跟随器的伪差分电路。为了比较它们的性能，电路采用0.18 μ m CMOS技术，在500 μ m长的总线上实现1Gbps的目标数据速率。仿真结果还与来自商用单元库的标准CMOS总线驱动器进行了比较。
{"title":"Tri-state buffer/bus driver circuits in MOS current-mode logic","authors":"S. Badel, Yusuf Leblebici","doi":"10.1109/RME.2007.4401856","DOIUrl":"https://doi.org/10.1109/RME.2007.4401856","url":null,"abstract":"In this paper, two circuits are proposed to implement tri-state buffers/bus drivers for MOS current-mode logic digital circuits. The first is a switch-based, fully differential circuit, while the second is a voltage follower-based, pseudo- differential circuit. In order to compare their performance, circuits are implemented in a 0.18 mum CMOS technology, with the target data rate of 1Gbps over a 500 mum long bus. Simulation results are compared also with a standard CMOS bus driver from a commercial cell library.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123044882","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401847
R. Dahiya, M. Valle, G. Metta, L. Lorenzelli, C. Collini
Development of robots capable of operating in unstructured environments or intended to substitute for man in hazardous or inaccessible environments, demands the implementation of sophisticated sensory capabilities, far beyond those available today. In this regard, the development of tactile sensors is one of the key technical challenges in advanced robotics and minimal access surgery. In this work we present arrays of 'taxels' (tactile elements) which will be placed on the distal phalange of the humanoid robot in our lab. We present two different designs and implementations. In the first one, microelectrode arrays(MEAs) of 32 elements, with 1 mm center to center distance, have been designed. The taxel is implemented by epoxy-adhering the sensing material (piezoelectric polymer film of PVDF-TrFE) on a microelectrode. Each taxel is intended to be used as an extended gate of an FET (external to the chip); the taxel collects the charge/voltage generated, as consequence of the applied stress, on the deposited piezoelectric polymer film (i.e. the extended gate itself). The second design and implementation integrates both the taxels array and the FET devices, on the same silicon die.
{"title":"Tactile sensing arrays for humanoid robots","authors":"R. Dahiya, M. Valle, G. Metta, L. Lorenzelli, C. Collini","doi":"10.1109/RME.2007.4401847","DOIUrl":"https://doi.org/10.1109/RME.2007.4401847","url":null,"abstract":"Development of robots capable of operating in unstructured environments or intended to substitute for man in hazardous or inaccessible environments, demands the implementation of sophisticated sensory capabilities, far beyond those available today. In this regard, the development of tactile sensors is one of the key technical challenges in advanced robotics and minimal access surgery. In this work we present arrays of 'taxels' (tactile elements) which will be placed on the distal phalange of the humanoid robot in our lab. We present two different designs and implementations. In the first one, microelectrode arrays(MEAs) of 32 elements, with 1 mm center to center distance, have been designed. The taxel is implemented by epoxy-adhering the sensing material (piezoelectric polymer film of PVDF-TrFE) on a microelectrode. Each taxel is intended to be used as an extended gate of an FET (external to the chip); the taxel collects the charge/voltage generated, as consequence of the applied stress, on the deposited piezoelectric polymer film (i.e. the extended gate itself). The second design and implementation integrates both the taxels array and the FET devices, on the same silicon die.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129175447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401813
I. Galdi, E. Bonizzoni, Franco Maloberti
The design of a low-power 6-bit flash A/D converter with state-of-the-art figure of merit for flash architectures is presented. The target resolution with the lowest power consumption is achieved by using the voltage-to-current conversion strategy. The sampling frequency is 100 MHz and the proposed converter is able to work with an input signal frequency very close to Nyquist rate. Considering that the analog and the digital supply voltages are 1.8 V and 0.9 V, respectively, the achieved figure of merit is equal to 0.75 pJ/conv.
{"title":"Design of a current mode 6-bit 100 MS/s flash A/D converter with 0.75 pJ/conv-lev FoM","authors":"I. Galdi, E. Bonizzoni, Franco Maloberti","doi":"10.1109/RME.2007.4401813","DOIUrl":"https://doi.org/10.1109/RME.2007.4401813","url":null,"abstract":"The design of a low-power 6-bit flash A/D converter with state-of-the-art figure of merit for flash architectures is presented. The target resolution with the lowest power consumption is achieved by using the voltage-to-current conversion strategy. The sampling frequency is 100 MHz and the proposed converter is able to work with an input signal frequency very close to Nyquist rate. Considering that the analog and the digital supply voltages are 1.8 V and 0.9 V, respectively, the achieved figure of merit is equal to 0.75 pJ/conv.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130261610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401848
F. Battini, M. Tonarelli, L. Fanucci, M. De Marinis, A. Giambastiani
AMR (anisotropic magnetoresistive) sensors are versatile sensors which can be used in a wide range of automotive applications. This paper presents the development of an AMR sensor interface prototype based on the intelligent sensor interface (ISIF) and designed following the platform based design flow. The ISIF is composed by an analog front-end and a digital section. The analog section performs signal acquisition and provides stimuli to the sensor, while the digital section provides digital signal processing IPs (intellectual properties) and a 32-bit RISC (reduced instruction set) DSP (digital signal processor) for important software routines of signal processing, calibration and temperature compensation. An AMR commercial sensor, used for linear position measurement, has been chosen as case study for the verification of the overall interface prototype. Finally, system test results and performances are presented.
{"title":"Experiencing with AMR sensor conditioning in automotive field","authors":"F. Battini, M. Tonarelli, L. Fanucci, M. De Marinis, A. Giambastiani","doi":"10.1109/RME.2007.4401848","DOIUrl":"https://doi.org/10.1109/RME.2007.4401848","url":null,"abstract":"AMR (anisotropic magnetoresistive) sensors are versatile sensors which can be used in a wide range of automotive applications. This paper presents the development of an AMR sensor interface prototype based on the intelligent sensor interface (ISIF) and designed following the platform based design flow. The ISIF is composed by an analog front-end and a digital section. The analog section performs signal acquisition and provides stimuli to the sensor, while the digital section provides digital signal processing IPs (intellectual properties) and a 32-bit RISC (reduced instruction set) DSP (digital signal processor) for important software routines of signal processing, calibration and temperature compensation. An AMR commercial sensor, used for linear position measurement, has been chosen as case study for the verification of the overall interface prototype. Finally, system test results and performances are presented.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115784180","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401828
S. A. Jawed, M. Gottardi, A. Baschirotto
An opamp time-multiplexed topology of a third- order SigmaDelta modulator is presented in this paper. This topology implements a third-order noise transfer-function using only two opamps by sharing one opamp between second and the third integrators of the modulator. The simulated results are comparable to a low-power modulator with three separate opamps. The proposed SigmaDelta modulator is designed for a silicon microphone front-end. In the audio-band (20-20 kHz), it features a dynamic range above 80 dB, consuming 90 muWatts with a supply voltage of 1.8 V.
{"title":"A low-power high dynamic-range sigma-delta modulator for a capacitive microphone sensor","authors":"S. A. Jawed, M. Gottardi, A. Baschirotto","doi":"10.1109/RME.2007.4401828","DOIUrl":"https://doi.org/10.1109/RME.2007.4401828","url":null,"abstract":"An opamp time-multiplexed topology of a third- order SigmaDelta modulator is presented in this paper. This topology implements a third-order noise transfer-function using only two opamps by sharing one opamp between second and the third integrators of the modulator. The simulated results are comparable to a low-power modulator with three separate opamps. The proposed SigmaDelta modulator is designed for a silicon microphone front-end. In the audio-band (20-20 kHz), it features a dynamic range above 80 dB, consuming 90 muWatts with a supply voltage of 1.8 V.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134639031","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401797
E. Volpi, N. Nizza, P. Bruschi
A successive approximation ADC with nonlinear characteristic is presented as an effective method for sensor linearization. Drastic simplification of the ADC structure was obtained by implementing a piece wise linear approximation of the required non linear curve. The design and simulated performance of an 8-bit prototype, applied to the linearization of a real flow sensor, are presented.
{"title":"A non linear ADC for sensor linearization","authors":"E. Volpi, N. Nizza, P. Bruschi","doi":"10.1109/RME.2007.4401797","DOIUrl":"https://doi.org/10.1109/RME.2007.4401797","url":null,"abstract":"A successive approximation ADC with nonlinear characteristic is presented as an effective method for sensor linearization. Drastic simplification of the ADC structure was obtained by implementing a piece wise linear approximation of the required non linear curve. The design and simulated performance of an 8-bit prototype, applied to the linearization of a real flow sensor, are presented.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114888950","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-07-02DOI: 10.1109/RME.2007.4401802
L.R. du Roscoat, J. Hourany, V. Regnauld, P. Gamand
With the increasing integration in consumer electronic products, complex mixed signals circuits have been developed for RF systems on chip. Digital blocks generate parasitic signals, which may affect sensitive sections, especially through substrate. This paper presents a measurement structure designed to characterize the signals injected into the substrate. Measurements of digital blocks designed with various layout options will allow to find a better layout methodology to improve isolation between design blocks in a 65nm CMOS technology.
{"title":"Substrate injection characterization in CMOS mixed signal systems on chip","authors":"L.R. du Roscoat, J. Hourany, V. Regnauld, P. Gamand","doi":"10.1109/RME.2007.4401802","DOIUrl":"https://doi.org/10.1109/RME.2007.4401802","url":null,"abstract":"With the increasing integration in consumer electronic products, complex mixed signals circuits have been developed for RF systems on chip. Digital blocks generate parasitic signals, which may affect sensitive sections, especially through substrate. This paper presents a measurement structure designed to characterize the signals injected into the substrate. Measurements of digital blocks designed with various layout options will allow to find a better layout methodology to improve isolation between design blocks in a 65nm CMOS technology.","PeriodicalId":118230,"journal":{"name":"2007 Ph.D Research in Microelectronics and Electronics Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124043072","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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