Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524735
D. Efanov, V. Sapozhnikov, V. Sapozhnikov, Dmitry Plotnikov
One of the most common approaches to building concurrent error detection systems of combinational logical circuits is the application of separable block-structured codes. In previous studies of the authors it was established that characteristics of the code directly determine properties of the concurrent error detection system on detecting errors in the unit under test. The choice of a code influences the method of implementation of the concurrent error detection system, including the solution of tasks aimed at control organization of the device which detects all types of errors from the given class, or errors of the given class with the predetermined probability. The authors of the study in question offer the evaluation procedure of error-detection probability in combinational logical circuits under concurrent error detection of the latter on the basis of separable block-structured codes. The authors only consider the model of single stuck-at faults at the outputs of logical elements of the inner structure of a combinational circuit, however the approach itself is universal and after certain improvement may be applied for the evaluation of error-detection probability at the outputs of combinational circuits taking into account other fault models. The example of calculating errordetection probability was given, as well as test results of check combinational circuits from LGSynth'89 set on the evaluation of error-detection probability at the outputs of circuits under concurrent error detection, on the basis of the weight-based code with summation without carries.
{"title":"The Evaluation of Error Detection Probability at the Outputs of Combinational Circuits Under Concurrent Error Detection on the Basis of Summation Codes","authors":"D. Efanov, V. Sapozhnikov, V. Sapozhnikov, Dmitry Plotnikov","doi":"10.1109/EWDTS.2018.8524735","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524735","url":null,"abstract":"One of the most common approaches to building concurrent error detection systems of combinational logical circuits is the application of separable block-structured codes. In previous studies of the authors it was established that characteristics of the code directly determine properties of the concurrent error detection system on detecting errors in the unit under test. The choice of a code influences the method of implementation of the concurrent error detection system, including the solution of tasks aimed at control organization of the device which detects all types of errors from the given class, or errors of the given class with the predetermined probability. The authors of the study in question offer the evaluation procedure of error-detection probability in combinational logical circuits under concurrent error detection of the latter on the basis of separable block-structured codes. The authors only consider the model of single stuck-at faults at the outputs of logical elements of the inner structure of a combinational circuit, however the approach itself is universal and after certain improvement may be applied for the evaluation of error-detection probability at the outputs of combinational circuits taking into account other fault models. The example of calculating errordetection probability was given, as well as test results of check combinational circuits from LGSynth'89 set on the evaluation of error-detection probability at the outputs of circuits under concurrent error detection, on the basis of the weight-based code with summation without carries.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125597211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524796
A. Melikov, A. Evdokimov, A. Shubovich, S. Volobuev
There are suggested the high-performance memory device fault-detection automated test design techniques and measures. Simulation models allowing to save project operations labor have been designed by the algorithms and testing programs the object's and testing device's. The designed program model of memory device and diagnostic tools can be used in universities and scientific-production associations for developing new diagnostic systems.
{"title":"System of Designing Test Programs and Modeling of the Memory Microcircuits","authors":"A. Melikov, A. Evdokimov, A. Shubovich, S. Volobuev","doi":"10.1109/EWDTS.2018.8524796","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524796","url":null,"abstract":"There are suggested the high-performance memory device fault-detection automated test design techniques and measures. Simulation models allowing to save project operations labor have been designed by the algorithms and testing programs the object's and testing device's. The designed program model of memory device and diagnostic tools can be used in universities and scientific-production associations for developing new diagnostic systems.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114223678","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524765
A. Chernov, Dmitry N. Chupiy, A. Alexandrov, A. M. Miroshnikov
This work is devoted to the designing, debugging and testing of driver training simulators and other similar systems built using the RS-485 data interface and the MODBUS protocol. The modern microcontrollers and microprocessors allow creating these simulators with reproducing the realistic conditions for the drivers. The main problem in the development of such simulators is the need to create many unique hardware modules based on real prototypes, which leads to the need to create a universal platform with unified testing protocols and interfaces. The approach to this problem requires the implementing the same unified debugging system for designed hardware modules also. The main aim of this work is the development of new solutions for testing the hardware modules of the locomotive driver console simulator.
{"title":"An Approach to Testing the Hardware Modules of Locomotive Driver Console Simulator","authors":"A. Chernov, Dmitry N. Chupiy, A. Alexandrov, A. M. Miroshnikov","doi":"10.1109/EWDTS.2018.8524765","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524765","url":null,"abstract":"This work is devoted to the designing, debugging and testing of driver training simulators and other similar systems built using the RS-485 data interface and the MODBUS protocol. The modern microcontrollers and microprocessors allow creating these simulators with reproducing the realistic conditions for the drivers. The main problem in the development of such simulators is the need to create many unique hardware modules based on real prototypes, which leads to the need to create a universal platform with unified testing protocols and interfaces. The approach to this problem requires the implementing the same unified debugging system for designed hardware modules also. The main aim of this work is the development of new solutions for testing the hardware modules of the locomotive driver console simulator.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114334275","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524780
A. Matrosova, S. Chernyshov, G. Goshin, D. Kudin
Increasing chips complexity originates a problem of providing their 100% correct fabrication. During chip fabrication logical bugs may be detected, changes of specification may appear and so on. There are some ways of recovering chips to provide functioning we need. One of them is connected with using Engineering Change Order (ECO) technique. In the frame of this technique forming of patch functions is based on using internal nodes of implemented circuit Ci (circuit that has to be corrected). Methods are oriented to cut calculations of patch functions with using SAT and QBS solvers and cut overhead. Functions of implemented circuit Ci and specification circuit Cs, as a rule, are essentially different. Our approach is oriented to slight difference between specification circuit Cs and implemented circuit Ci. We suggest using special miter system represented by list of products with their special characteristics. Our approach does not demand using SAT and QBS solvers. For correction we use only inputs and outputs of implemented circuit Ci. In contrast with current approaches there is no need using internal nodes of the implemented circuit.
{"title":"Forming Patch Functions and Combinational Circuit Rectification","authors":"A. Matrosova, S. Chernyshov, G. Goshin, D. Kudin","doi":"10.1109/EWDTS.2018.8524780","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524780","url":null,"abstract":"Increasing chips complexity originates a problem of providing their 100% correct fabrication. During chip fabrication logical bugs may be detected, changes of specification may appear and so on. There are some ways of recovering chips to provide functioning we need. One of them is connected with using Engineering Change Order (ECO) technique. In the frame of this technique forming of patch functions is based on using internal nodes of implemented circuit Ci (circuit that has to be corrected). Methods are oriented to cut calculations of patch functions with using SAT and QBS solvers and cut overhead. Functions of implemented circuit Ci and specification circuit Cs, as a rule, are essentially different. Our approach is oriented to slight difference between specification circuit Cs and implemented circuit Ci. We suggest using special miter system represented by list of products with their special characteristics. Our approach does not demand using SAT and QBS solvers. For correction we use only inputs and outputs of implemented circuit Ci. In contrast with current approaches there is no need using internal nodes of the implemented circuit.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"106 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122677925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524798
D. V. Efanov, G. Osadchy, V. Khoroshev
The paper describes the research in the field of improving the principles of control in railway transport. The possibilities of using optical sensors in the system of providing train traffic in place of traditional rail circuits operating on the basis of electric current are considered. The way of installation and fastening of sensors to railway rails is described, as well as the principle of linking them to the system. A block diagram of the system for recording the parameters of moving units based on optical sensors is given. The results of experimental investigations of sensors on the «Shushary» marshalling yard of the October Railway of Russian Railways are described with the participation of the authors. It is shown that optical sensors can be used for the positioning of conveyance units, but it is proposed to expand the sensor functions from discrete control to the means of measuring a number of crucial parameters of conveyance units.
{"title":"Testing of Optical Sensors in Measuring Systems on Railway Marshalling Yard","authors":"D. V. Efanov, G. Osadchy, V. Khoroshev","doi":"10.1109/EWDTS.2018.8524798","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524798","url":null,"abstract":"The paper describes the research in the field of improving the principles of control in railway transport. The possibilities of using optical sensors in the system of providing train traffic in place of traditional rail circuits operating on the basis of electric current are considered. The way of installation and fastening of sensors to railway rails is described, as well as the principle of linking them to the system. A block diagram of the system for recording the parameters of moving units based on optical sensors is given. The results of experimental investigations of sensors on the «Shushary» marshalling yard of the October Railway of Russian Railways are described with the participation of the authors. It is shown that optical sensors can be used for the positioning of conveyance units, but it is proposed to expand the sensor functions from discrete control to the means of measuring a number of crucial parameters of conveyance units.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129819301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524710
V. M. Artyushenko, V. I. Volovach
The issues, related to the synthesis of algorithms of adaptive nonlinear processing that are implemented through blocks of nonlinear processing with quadrature generators, are reviewed and analyzed. The use of adaptive nonlinear processing in the detection of weak signals against the background noise allows to take into account the density probability distribution and the sensitivity change of amplitude transfer characteristics of the blocks of nonlinear transformation to the magnitude of the current mismatch. We analyzed the operation of adaptive nonlinear block with the feedback the quadrature generators when exposed to broadband noise. It is shown that the task of adaptive nonlinear block is to achieve maximum noise reduction ratio and continuous tracking it when you change probabilistic properties of impact noise and in the presence of external disturbances. Its show the limitations imposed on the dynamic range of adaptive nonlinear block with quadrature generators.
{"title":"Adaptive Signal Processing Nonlinear Block with Quadrature Generators Under Influence Broadband Noise","authors":"V. M. Artyushenko, V. I. Volovach","doi":"10.1109/EWDTS.2018.8524710","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524710","url":null,"abstract":"The issues, related to the synthesis of algorithms of adaptive nonlinear processing that are implemented through blocks of nonlinear processing with quadrature generators, are reviewed and analyzed. The use of adaptive nonlinear processing in the detection of weak signals against the background noise allows to take into account the density probability distribution and the sensitivity change of amplitude transfer characteristics of the blocks of nonlinear transformation to the magnitude of the current mismatch. We analyzed the operation of adaptive nonlinear block with the feedback the quadrature generators when exposed to broadband noise. It is shown that the task of adaptive nonlinear block is to achieve maximum noise reduction ratio and continuous tracking it when you change probabilistic properties of impact noise and in the presence of external disturbances. Its show the limitations imposed on the dynamic range of adaptive nonlinear block with quadrature generators.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125278503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524865
A. Mikhailov, M. Karavay
No matter how efficient indexing-based Internet search engines could be, indexing or inverse representations of data, is not in the mainstream of pattern recognition. One reason for a lack of interest in indexing methods on the part of pattern recognition community is instability of results due to a use of noise-prone measurements as features, rather than key words. The paper suggests a multidimensional numerical data indexing method that opens a path to accurate indexing-based pattern recognition systems that inherit from their search engines predecessors the ability to efficiently deal with large amounts of data.
{"title":"Inverse Sets in Pattern Recognition","authors":"A. Mikhailov, M. Karavay","doi":"10.1109/EWDTS.2018.8524865","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524865","url":null,"abstract":"No matter how efficient indexing-based Internet search engines could be, indexing or inverse representations of data, is not in the mainstream of pattern recognition. One reason for a lack of interest in indexing methods on the part of pattern recognition community is instability of results due to a use of noise-prone measurements as features, rather than key words. The paper suggests a multidimensional numerical data indexing method that opens a path to accurate indexing-based pattern recognition systems that inherit from their search engines predecessors the ability to efficiently deal with large amounts of data.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"375 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129082046","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.31114/2078-7707-2018-1-50-56
A. Stempkovskiy, D. Telpukhov, V. Nadolenko
This paper is devoted to development of combinational circuits resynthesis flow aimed at soft error tolerance improvement. Sensitivity factor, i.e. average number of non-reliable elements, is used as fault-tolerance metric, as well as circuit's “sensitive area” which additionally considers areas of standard cells. Re-synthesis algorithm involves iterative replacement of some sections of circuit by functionally equivalent blocks with better masking properties. Result can be achieved by adding redundancy, or by implementing more optimal structure with respect to fault tolerance. When estimating masking properties, circuit section is considered to be separate circuit, which speeds up program performance. We use input test patterns for subcircuit in accordance with their probabilities and observability of subcircuit outputs at primary circuit outputs to take into account influence of surrounding gates during optimal structure selection. The algorithm was tested on circuits from ISCAS'85 and LGSynth'89 benchmarks synthesized with different optimization parameters using two different standard digital libraries.
{"title":"Development of Resynthesis Flow for Improving Logical Masking Features of Combinational Circuits","authors":"A. Stempkovskiy, D. Telpukhov, V. Nadolenko","doi":"10.31114/2078-7707-2018-1-50-56","DOIUrl":"https://doi.org/10.31114/2078-7707-2018-1-50-56","url":null,"abstract":"This paper is devoted to development of combinational circuits resynthesis flow aimed at soft error tolerance improvement. Sensitivity factor, i.e. average number of non-reliable elements, is used as fault-tolerance metric, as well as circuit's “sensitive area” which additionally considers areas of standard cells. Re-synthesis algorithm involves iterative replacement of some sections of circuit by functionally equivalent blocks with better masking properties. Result can be achieved by adding redundancy, or by implementing more optimal structure with respect to fault tolerance. When estimating masking properties, circuit section is considered to be separate circuit, which speeds up program performance. We use input test patterns for subcircuit in accordance with their probabilities and observability of subcircuit outputs at primary circuit outputs to take into account influence of surrounding gates during optimal structure selection. The algorithm was tested on circuits from ISCAS'85 and LGSynth'89 benchmarks synthesized with different optimization parameters using two different standard digital libraries.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124551802","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524841
S. Solovyov, E. R. Milutin, V. A. Ryzhikov
The usage of electronic microprocessor devices in the system of regulating the composition of the fuel mixture makes it possible to increase the efficiency of the ICE. The controller of the control system is not able to determine accurately the air-fuel ratio of the air-fuel mixture by means of an oxygen sensor because of the nonlinearity of its characteristic. The design of a control system with a threshold element is developed, based on the principle of reverse hysteresis. The basis for constructing the automatic control system is the principle of precise regulation of the combustible mixture, depending on the presence of free oxygen and a higher degree of purification of the exhaust gases. Experimental studies of control processes were carried out using a threshold element with conventional and inverse hysteresis. Based on the results of experimental studies, the performance of the lambda probe with the threshold hysteresis element is obtained and its transfer characteristic is justified. The proposed solution has allowed to improve the fuel and economic indicators of ICE and to reduce the concentration of harmful substances in the exhaust gases.
{"title":"Improvement of the Design of a Microprocessor-Based Power Supply Control System of an Internal Combustion Engine","authors":"S. Solovyov, E. R. Milutin, V. A. Ryzhikov","doi":"10.1109/EWDTS.2018.8524841","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524841","url":null,"abstract":"The usage of electronic microprocessor devices in the system of regulating the composition of the fuel mixture makes it possible to increase the efficiency of the ICE. The controller of the control system is not able to determine accurately the air-fuel ratio of the air-fuel mixture by means of an oxygen sensor because of the nonlinearity of its characteristic. The design of a control system with a threshold element is developed, based on the principle of reverse hysteresis. The basis for constructing the automatic control system is the principle of precise regulation of the combustible mixture, depending on the presence of free oxygen and a higher degree of purification of the exhaust gases. Experimental studies of control processes were carried out using a threshold element with conventional and inverse hysteresis. Based on the results of experimental studies, the performance of the lambda probe with the threshold hysteresis element is obtained and its transfer characteristic is justified. The proposed solution has allowed to improve the fuel and economic indicators of ICE and to reduce the concentration of harmful substances in the exhaust gases.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117062870","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524698
A. Markina, D. Tumakov, N. Pleshchinskii
The problem of designing a symmetrical eight-tooth-shaped microstrip dual-band Wi-Fi antenna (2.4 GHz and 5 GHz) is considered. At the first stage of antenna design, numerical experiments are performed to determine the dependence of values of the first two resonance frequencies of the antenna and the corresponding bandwidths on the geometric parameters of the radiator. A regression analysis is carried out and regression models for resonance frequencies are obtained. The absolute and relative errors for the models are calculated. A family of Wi-Fi dual-band antennas with a certain ratio of length to depth of rectangular cutouts of the radiator is selected by analyzing the models. Further analysis of the matching and of the bandwidth for the antennas from the obtained family allows determining the best matched Wi-Fi antennas.
{"title":"Designing the Symmetrical Eight-Tooth-Shaped Microstrip Antenna for Wi-Fi Applications","authors":"A. Markina, D. Tumakov, N. Pleshchinskii","doi":"10.1109/EWDTS.2018.8524698","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524698","url":null,"abstract":"The problem of designing a symmetrical eight-tooth-shaped microstrip dual-band Wi-Fi antenna (2.4 GHz and 5 GHz) is considered. At the first stage of antenna design, numerical experiments are performed to determine the dependence of values of the first two resonance frequencies of the antenna and the corresponding bandwidths on the geometric parameters of the radiator. A regression analysis is carried out and regression models for resonance frequencies are obtained. The absolute and relative errors for the models are calculated. A family of Wi-Fi dual-band antennas with a certain ratio of length to depth of rectangular cutouts of the radiator is selected by analyzing the models. Further analysis of the matching and of the bandwidth for the antennas from the obtained family allows determining the best matched Wi-Fi antennas.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121196874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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