Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240423
Y. Ogiso, J. Ozaki, Y. Ueda, S. Kanazawa, H. Tanobe, S. Nakano, H. Yamazaki, T. Fujii, E. Yamada, N. Nunoya, N. Kikuchi
We present recently developed ultra-high bandwidth and low V„ InP-based in-phase/quadrature (IQ) modulators that we realized by combining an n-i-p-n heterostructure and a capacitively loaded traveling wave electrode. The extremely low electrical and optical loss structure enhances the 3-dB electro-optic bandwidth of over 67 GHz without degrading other properties such as driving voltage and optical loss. The IQ modulator itself exhibits up to 120-Gbaud rate IQ modulations without optical pre equalization. Furthermore, we examined a low-power dissipation IQ modulator co-assembled with a 495-mW/2ch CMOS differential driver IC, and successfully demonstrated a 64-Gbaud/16QAM operation.
{"title":"Ultra-high bandwidth InP IQ modulators for next generation coherent transmitter","authors":"Y. Ogiso, J. Ozaki, Y. Ueda, S. Kanazawa, H. Tanobe, S. Nakano, H. Yamazaki, T. Fujii, E. Yamada, N. Nunoya, N. Kikuchi","doi":"10.1109/CSICS.2017.8240423","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240423","url":null,"abstract":"We present recently developed ultra-high bandwidth and low V„ InP-based in-phase/quadrature (IQ) modulators that we realized by combining an n-i-p-n heterostructure and a capacitively loaded traveling wave electrode. The extremely low electrical and optical loss structure enhances the 3-dB electro-optic bandwidth of over 67 GHz without degrading other properties such as driving voltage and optical loss. The IQ modulator itself exhibits up to 120-Gbaud rate IQ modulations without optical pre equalization. Furthermore, we examined a low-power dissipation IQ modulator co-assembled with a 495-mW/2ch CMOS differential driver IC, and successfully demonstrated a 64-Gbaud/16QAM operation.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127517925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240464
G. Jessen, K. Chabak, A. Green, N. Moser, J. McCandless, K. Leedy, A. Crespo, S. Tetlak
In this work, we provide early insight into the combined tradespace for both power switching and RF applications afforded by the high critical, electric-field strength of β-Ga2O3. MOSFETs formed by homoepitaxial growth of β-Ga2O3 films doped with Sn, Si, and Ge on bulk substrates have been characterized electrically. Several key milestones have been achieved such as enhancement-mode operation > 600 V, low ohmic contact resistance < 0.2 Ω·mm, and RF power gain in the GHz regime. These results show great promise for monolithic and hybrid integration of RF amplifiers and switch technologies.
{"title":"Gallium oxide technologies and applications","authors":"G. Jessen, K. Chabak, A. Green, N. Moser, J. McCandless, K. Leedy, A. Crespo, S. Tetlak","doi":"10.1109/CSICS.2017.8240464","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240464","url":null,"abstract":"In this work, we provide early insight into the combined tradespace for both power switching and RF applications afforded by the high critical, electric-field strength of β-Ga<inf>2</inf>O<inf>3</inf>. MOSFETs formed by homoepitaxial growth of β-Ga<inf>2</inf>O<inf>3</inf> films doped with Sn, Si, and Ge on bulk substrates have been characterized electrically. Several key milestones have been achieved such as enhancement-mode operation > 600 V, low ohmic contact resistance < 0.2 Ω·mm, and RF power gain in the GHz regime. These results show great promise for monolithic and hybrid integration of RF amplifiers and switch technologies.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124382141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240419
A. Tang, T. Reck
This paper discusses the applicability of hybrid CMOS/InP-MMIC mm-Wave systems to remote sensing instrumentation for space exploration in Earth and Planetary science. We review the need for lower power and lighter weight instruments to accommodate the limited payload resources of exploration spacecraft, and then demonstrate how hybrid systems can address these challenges. An example hybrid 65nm CMOS-InP radiometer operating at 100 GHz is discoursed in detail including circuit & system design, interfacing and packaging techniques. Measurements are presented showing that the hybrid approach does not compromise instrument sensitivity.
{"title":"Hybrid CMOS System-on-Chip/InP MMIC systems for deep-space planetary exploration at mm-Wave and THz","authors":"A. Tang, T. Reck","doi":"10.1109/CSICS.2017.8240419","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240419","url":null,"abstract":"This paper discusses the applicability of hybrid CMOS/InP-MMIC mm-Wave systems to remote sensing instrumentation for space exploration in Earth and Planetary science. We review the need for lower power and lighter weight instruments to accommodate the limited payload resources of exploration spacecraft, and then demonstrate how hybrid systems can address these challenges. An example hybrid 65nm CMOS-InP radiometer operating at 100 GHz is discoursed in detail including circuit & system design, interfacing and packaging techniques. Measurements are presented showing that the hybrid approach does not compromise instrument sensitivity.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"50 9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124976590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240441
M. Iwamoto, C. Hutchinson, B. Luk, T. Low, D. D'Avanzo
Spurious oscillations in the low frequency region (below 100kHz) were investigated in InGaP/GaAs HBT devices and circuits. These low frequency oscillations (LFOs) are predominantly activated by the field across the semi-insulating GaAs substrate located between the subcollector and backside metal (of an emitter-up device). Several experiments were conducted to control and eliminate LFOs by floating the backside potential or applying a voltage to the backside metal. In both cases, the electric field across the GaAs substrate is minimized, thereby reducing the mechanism of the field-enhanced capture of electrons by traps in this region.
{"title":"Characteristics of substrate-induced low frequency oscillations in GaAs HBT devices and circuits","authors":"M. Iwamoto, C. Hutchinson, B. Luk, T. Low, D. D'Avanzo","doi":"10.1109/CSICS.2017.8240441","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240441","url":null,"abstract":"Spurious oscillations in the low frequency region (below 100kHz) were investigated in InGaP/GaAs HBT devices and circuits. These low frequency oscillations (LFOs) are predominantly activated by the field across the semi-insulating GaAs substrate located between the subcollector and backside metal (of an emitter-up device). Several experiments were conducted to control and eliminate LFOs by floating the backside potential or applying a voltage to the backside metal. In both cases, the electric field across the GaAs substrate is minimized, thereby reducing the mechanism of the field-enhanced capture of electrons by traps in this region.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131535306","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240455
D. Cui, Jun Cao, A. Nazemi, Tim He, Guansheng Li, B. Çatli, Kangmin Hu, Heng Zhang, Ben Rhew, Shiwei Sheng, Y. Shim, Bo Zhang, A. Momtaz
The rapid growth of data center traffic, driven by cloud technology adoption, has propelled the development of a variety of spectrally efficient modulation formats, such as 4-level pulse amplitude modulation (PAM4), quadrature phase shift keying (QPSK) and quadrature amplitude modulation (QAM). High speed CMOS DSP-based transceivers provide complex equalization scheme to compensate for the channel loss as well as the nonlinearity impairments introduced by chromatic and polarization dispersion. The recent development of ultra-high speed data converters has been a key enabling technology converting data signal between analog and digital domain, which has shaped the traditional communication transceiver systems. This paper covers the advancement of CMOS data converter technology and its wide application, as well as the future development and trend.
{"title":"High speed data converters and their applications in optical communication system","authors":"D. Cui, Jun Cao, A. Nazemi, Tim He, Guansheng Li, B. Çatli, Kangmin Hu, Heng Zhang, Ben Rhew, Shiwei Sheng, Y. Shim, Bo Zhang, A. Momtaz","doi":"10.1109/CSICS.2017.8240455","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240455","url":null,"abstract":"The rapid growth of data center traffic, driven by cloud technology adoption, has propelled the development of a variety of spectrally efficient modulation formats, such as 4-level pulse amplitude modulation (PAM4), quadrature phase shift keying (QPSK) and quadrature amplitude modulation (QAM). High speed CMOS DSP-based transceivers provide complex equalization scheme to compensate for the channel loss as well as the nonlinearity impairments introduced by chromatic and polarization dispersion. The recent development of ultra-high speed data converters has been a key enabling technology converting data signal between analog and digital domain, which has shaped the traditional communication transceiver systems. This paper covers the advancement of CMOS data converter technology and its wide application, as well as the future development and trend.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115001577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240476
Navid Hosseinzadeh, J. Buckwalter
A wideband 57.7–84.2 GHz Phase Shifter is presented using a compact Lange coupler to generate in-phase and quadrature signal. The Lange coupler is followed by two balun transformers that provide the IQ vector modulation with differential I and Q signals. The implemented Phase Shifter demonstrates an average 6-dB insertion loss and 5-dB gain variation. The measured average rms phase and gain errors are 7 degrees and 1 dB, respectively. The phase shifter is implemented in GlobalFoundries 45-nm SOI CMOS technology using a trap-rich substrate. The chip area is 385 μm × 285 μm and the Phase Shifter consumes less than 17 mW. To the best of authors knowledge, this is the first phase shifter that covers both 60 GHz band and E-band frequencies with a fractional bandwidth of 37%.
{"title":"A compact, 37% fractional bandwidth millimeter-wave phase shifter using a wideband lange coupler for 60-GHz and E-band systems","authors":"Navid Hosseinzadeh, J. Buckwalter","doi":"10.1109/CSICS.2017.8240476","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240476","url":null,"abstract":"A wideband 57.7–84.2 GHz Phase Shifter is presented using a compact Lange coupler to generate in-phase and quadrature signal. The Lange coupler is followed by two balun transformers that provide the IQ vector modulation with differential I and Q signals. The implemented Phase Shifter demonstrates an average 6-dB insertion loss and 5-dB gain variation. The measured average rms phase and gain errors are 7 degrees and 1 dB, respectively. The phase shifter is implemented in GlobalFoundries 45-nm SOI CMOS technology using a trap-rich substrate. The chip area is 385 μm × 285 μm and the Phase Shifter consumes less than 17 mW. To the best of authors knowledge, this is the first phase shifter that covers both 60 GHz band and E-band frequencies with a fractional bandwidth of 37%.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"157 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122947218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240462
D. Turker, P. Upadhyaya, J. Im, S. Chen, Y. Frans, Ken Chang
This paper describes circuit techniques for high speed transceivers used in FPGA applications. Three architectures in 16nm FinFET encompassing NRZ and PAM4 modulation are discussed. First, a 0.5–32.75Gb/s flexible reach NRZ transceiver achieves BER <10−15 over 30dB loss backplane at 32.75Gb/s while consuming 577mW. It features 3 stages of CTLE including a gain segmented AGC, 15 tap DFE, 2 LC PLLs and a ring PLL to offer continuous frequency range over both long and short reach channels. Secondly, a 40–56Gb/s PAM4 receiver with analog front end achieves BER<10−10 over a 10dB loss channel at 56Gb/s with crosstalk and consumes 230mW. It uses a direct feedback 10-tap DFE for power efficiency. Lastly, a 40–56Gb/s ADC based PAM4 transceiver achieves BER<10−8 over a 31dB loss channel at 56Gb/s with crosstalk. It features a 4 stage CTLE, an 8-bit SAR ADC, a 14 tap FFE and a 1 tap DFE to achieve long reach operation.
{"title":"Design techniques for 32.75Gb/s and 56Gb/s wireline transceivers in 16nm FinFET","authors":"D. Turker, P. Upadhyaya, J. Im, S. Chen, Y. Frans, Ken Chang","doi":"10.1109/CSICS.2017.8240462","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240462","url":null,"abstract":"This paper describes circuit techniques for high speed transceivers used in FPGA applications. Three architectures in 16nm FinFET encompassing NRZ and PAM4 modulation are discussed. First, a 0.5–32.75Gb/s flexible reach NRZ transceiver achieves BER <10−15 over 30dB loss backplane at 32.75Gb/s while consuming 577mW. It features 3 stages of CTLE including a gain segmented AGC, 15 tap DFE, 2 LC PLLs and a ring PLL to offer continuous frequency range over both long and short reach channels. Secondly, a 40–56Gb/s PAM4 receiver with analog front end achieves BER<10−10 over a 10dB loss channel at 56Gb/s with crosstalk and consumes 230mW. It uses a direct feedback 10-tap DFE for power efficiency. Lastly, a 40–56Gb/s ADC based PAM4 transceiver achieves BER<10−8 over a 31dB loss channel at 56Gb/s with crosstalk. It features a 4 stage CTLE, an 8-bit SAR ADC, a 14 tap FFE and a 1 tap DFE to achieve long reach operation.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"350 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127344284","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240456
A. Arias, P. Rowell, J. Bergman, M. Urteaga, K. Shinohara, X. Zheng, H. Li, B. Romanczyk, M. Guidry, S. Wienecke, E. Ahmadi, S. Keller, U. Mishra
X-band power performance of N-polar GaN HEMTs is reported, including 2-tone results at 10GHz that demonstrate an OIP3/PDC linearity figure of merit of 12dB at a drain voltage of 20V, utilizing tuning of fundamental, second and third harmonic terminations. Compared to available linearity results of GaN HEMTs at 10GHz, the device technology presented here demonstrates the best such ratio reported at 10GHz for any GaN HEMT to date. The N-polar HEMT device exhibits very low 3rd order intermodulation distortion as well as single-tone high power-added efficiency (PAE) of ∼65% with an associated power density of 3W/mm that scales favorably with a drain voltage of 15V. These results show the suitability of N-polar GaN HEMTs for high performance X-band transceiver systems.
报道了n极GaN hemt的x波段功率性能，包括10GHz下的2音结果，在20V漏极电压下，利用基频、二次谐波和三次谐波调谐，OIP3/PDC线性系数为12dB。与现有的10GHz GaN HEMT线性度结果相比，本文介绍的器件技术展示了迄今为止任何GaN HEMT在10GHz下的最佳线性度比。n极HEMT器件具有非常低的三阶互调失真，单音高功率附加效率(PAE)为65%，相关功率密度为3W/mm，在漏极电压为15V时具有良好的缩放能力。这些结果表明n极GaN hemt适用于高性能x波段收发器系统。
{"title":"High performance N-polar GaN HEMTs with OIP3/Pdc ∼12dB at 10GHz","authors":"A. Arias, P. Rowell, J. Bergman, M. Urteaga, K. Shinohara, X. Zheng, H. Li, B. Romanczyk, M. Guidry, S. Wienecke, E. Ahmadi, S. Keller, U. Mishra","doi":"10.1109/CSICS.2017.8240456","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240456","url":null,"abstract":"X-band power performance of N-polar GaN HEMTs is reported, including 2-tone results at 10GHz that demonstrate an OIP3/PDC linearity figure of merit of 12dB at a drain voltage of 20V, utilizing tuning of fundamental, second and third harmonic terminations. Compared to available linearity results of GaN HEMTs at 10GHz, the device technology presented here demonstrates the best such ratio reported at 10GHz for any GaN HEMT to date. The N-polar HEMT device exhibits very low 3rd order intermodulation distortion as well as single-tone high power-added efficiency (PAE) of ∼65% with an associated power density of 3W/mm that scales favorably with a drain voltage of 15V. These results show the suitability of N-polar GaN HEMTs for high performance X-band transceiver systems.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126411196","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240443
H. Mizutani, R. Ishikawa, K. Honjo
This paper presents a novel frequency/amplitude two-dimensional change-over gallium nitride (GaN) monolithic microwave integrated circuit (MMIC) switch. A frequency/amplitude two-dimensional changeover switch is an essential function block for electrically selectable single-pole-double-throw (SPDT) multifunctional devices in reconfigurable radio frequency (RF) front-end, which can change its function to SPDT switch, diplexer, duplexer, and so on. The demonstrated two-stage GaN MMIC indicates two-dimensional switching characteristics not only of changing the amplitude for ON/OFF states as the conventional switch but also of switching two frequency pass-bands between around 8-GHz and around 26-GHz. The insertion losses of lower than 1.6 dB and the isolations with higher than 13.3 dB are obtained for both pass-bands. The presented two-dimensional changeover switch function block promises to realize electrically selectable SPDT multifunctional devices for reconfigurable broadband RF front-end with low costs.
{"title":"A novel two-dimensional changeover GaN MMIC switch for electrically selectable SPDT multifunctional device","authors":"H. Mizutani, R. Ishikawa, K. Honjo","doi":"10.1109/CSICS.2017.8240443","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240443","url":null,"abstract":"This paper presents a novel frequency/amplitude two-dimensional change-over gallium nitride (GaN) monolithic microwave integrated circuit (MMIC) switch. A frequency/amplitude two-dimensional changeover switch is an essential function block for electrically selectable single-pole-double-throw (SPDT) multifunctional devices in reconfigurable radio frequency (RF) front-end, which can change its function to SPDT switch, diplexer, duplexer, and so on. The demonstrated two-stage GaN MMIC indicates two-dimensional switching characteristics not only of changing the amplitude for ON/OFF states as the conventional switch but also of switching two frequency pass-bands between around 8-GHz and around 26-GHz. The insertion losses of lower than 1.6 dB and the isolations with higher than 13.3 dB are obtained for both pass-bands. The presented two-dimensional changeover switch function block promises to realize electrically selectable SPDT multifunctional devices for reconfigurable broadband RF front-end with low costs.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116845913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-10-01DOI: 10.1109/CSICS.2017.8240422
Y. Yamaguchi, J. Kamioka, M. Hangai, S. Shinjo, K. Yamanaka
This paper reports a 20 W Ka-band GaN high power MMIC (Monolithic Microwave Integrated Circuit) amplifier under continuous wave (CW) operation. The one-finger large signal models were made to take account of both the phase difference of RF gate voltage at a gate feeder and thermal effect. By using this model, the gate pitch length of unit cell transistor was optimally designed to obtain maximum output power as MMIC amplifier under CW operation. As a result, 21.7W output power under CW operation was successfully achieved with power added efficiency (PAE) of 19.8% at Ka-band by a single-ended MMIC. To the best of authors' knowledge, this output power is state-of-the-art for GaN MMIC amplifiers under CW operation at Ka-band.
本文报道了一种连续波工作下的20 W ka波段GaN大功率单片微波集成电路放大器。建立了考虑栅极馈线处射频栅极电压相位差和热效应的单指大信号模型。利用该模型，优化设计了单元晶体管的栅极间距长度，使其在连续波工作下作为MMIC放大器获得最大输出功率。结果表明，在连续波工作下，单端MMIC的输出功率为21.7W, ka波段的功率附加效率(PAE)为19.8%。据作者所知，这种输出功率对于ka波段连续波工作的GaN MMIC放大器来说是最先进的。
{"title":"A CW 20W Ka-band GaN high power MMIC amplifier with a gate pitch designed by using one-finger large signal models","authors":"Y. Yamaguchi, J. Kamioka, M. Hangai, S. Shinjo, K. Yamanaka","doi":"10.1109/CSICS.2017.8240422","DOIUrl":"https://doi.org/10.1109/CSICS.2017.8240422","url":null,"abstract":"This paper reports a 20 W Ka-band GaN high power MMIC (Monolithic Microwave Integrated Circuit) amplifier under continuous wave (CW) operation. The one-finger large signal models were made to take account of both the phase difference of RF gate voltage at a gate feeder and thermal effect. By using this model, the gate pitch length of unit cell transistor was optimally designed to obtain maximum output power as MMIC amplifier under CW operation. As a result, 21.7W output power under CW operation was successfully achieved with power added efficiency (PAE) of 19.8% at Ka-band by a single-ended MMIC. To the best of authors' knowledge, this output power is state-of-the-art for GaN MMIC amplifiers under CW operation at Ka-band.","PeriodicalId":129729,"journal":{"name":"2017 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130880124","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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