Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.381028
M. Mali, A. Abdipour, A. Tavakoli, G. Moradi
This paper describes the implementation of an active integrated spiral antenna for UWB (ultra-wideband) applications. By integrating a low-noise amplifier with antenna, the voltage standing wave ratio (VSWR) can be kept low for a large bandwidth, resulting in an improved spiral antenna performance for UWB. For the designed circuit in the UWB frequency range (3.1-10.6 GHz), the gain of the LNA is better than 13dB, its noise figure is less than 3dB, S11 and S22 are less than -13dB, respectively.
{"title":"An Active Integrated Spiral Antenna System for UWB Applications","authors":"M. Mali, A. Abdipour, A. Tavakoli, G. Moradi","doi":"10.1109/SMELEC.2006.381028","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.381028","url":null,"abstract":"This paper describes the implementation of an active integrated spiral antenna for UWB (ultra-wideband) applications. By integrating a low-noise amplifier with antenna, the voltage standing wave ratio (VSWR) can be kept low for a large bandwidth, resulting in an improved spiral antenna performance for UWB. For the designed circuit in the UWB frequency range (3.1-10.6 GHz), the gain of the LNA is better than 13dB, its noise figure is less than 3dB, S11 and S22 are less than -13dB, respectively.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"66 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120835299","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.380736
P. Amiri, H. Gharaee, A. Nabavi
A 10 GHz reconfigurable CMOS LNA for UWB receiver is presented. The LNA is fabricated with the 0.13 mum standard CMOS process. Measurement of the chip is performed on a ADS simulator. In the UWB low-band (3 to 5.15 GHz), the broadband LNA exhibit a gain of 17.5-18.2 dB, noise figure of 3.4-5dB, input/output return loss better than 10 dB, and input P1dB of -17 dBm, respectively. In the band from 2.4 to 3 G Hz (covering a 802.11 b/g band), the LNA exhibit a gain of 17.5- 18 dB and noise figure less than 3.5 dB. From 5.2 to 6 GHz, the noise figure of the LNA becomes higher than 5 dB. The gain also decrease to about 15 dB. The DC supply is 1.8 V.
{"title":"A 10GHz Reconfigurable UWB LNA in 130nm CMOS","authors":"P. Amiri, H. Gharaee, A. Nabavi","doi":"10.1109/SMELEC.2006.380736","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380736","url":null,"abstract":"A 10 GHz reconfigurable CMOS LNA for UWB receiver is presented. The LNA is fabricated with the 0.13 mum standard CMOS process. Measurement of the chip is performed on a ADS simulator. In the UWB low-band (3 to 5.15 GHz), the broadband LNA exhibit a gain of 17.5-18.2 dB, noise figure of 3.4-5dB, input/output return loss better than 10 dB, and input P1dB of -17 dBm, respectively. In the band from 2.4 to 3 G Hz (covering a 802.11 b/g band), the LNA exhibit a gain of 17.5- 18 dB and noise figure less than 3.5 dB. From 5.2 to 6 GHz, the noise figure of the LNA becomes higher than 5 dB. The gain also decrease to about 15 dB. The DC supply is 1.8 V.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124833078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.380709
Pan-pan Liu, K. Li, E. Eddie, Siping Zhao
In this paper, the authors try to introduce three techniques for plane-view TEM sample preparation. First, traditional plane-view TEM sample preparation will be introduced. The second technique is FIB- based lift-out method, which places the sample on the carbon film. This technique is used to cut isolated defects, such as SRAM single bit failure, but this technique introduces artifacts from FIB ion damage and carbon film. The last technique is a combination of tripod polishing, FIB milling and ion milling. Specific cases will be given to illustrate the application of these techniques.
{"title":"Plane-view Transmission Electron Microscopy for Advanced Integrated Circuit","authors":"Pan-pan Liu, K. Li, E. Eddie, Siping Zhao","doi":"10.1109/SMELEC.2006.380709","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380709","url":null,"abstract":"In this paper, the authors try to introduce three techniques for plane-view TEM sample preparation. First, traditional plane-view TEM sample preparation will be introduced. The second technique is FIB- based lift-out method, which places the sample on the carbon film. This technique is used to cut isolated defects, such as SRAM single bit failure, but this technique introduces artifacts from FIB ion damage and carbon film. The last technique is a combination of tripod polishing, FIB milling and ion milling. Specific cases will be given to illustrate the application of these techniques.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129386327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.380793
A. Seyedfaraji, V. Ahmadi, M. Noshiravani, F. Gity
A comprehensive model is presented to study filamentation in both conventional double heterostructure (DH) and quantum well (QW) semiconductor lasers. The spatial dynamics of broad-area (BA) semiconductor lasers is studied by numerically solving space-dependent coupled partial differential equations for the complex optical fields and the carrier density distribution. A self-consistent iteration is developed to model the formation and longitudinal propagation of unstable transverse optical filamentary structures by means of beam propagation method. The effects of stripe width, linewidth enhancement factor and Kerr coefficient are analyzed.
{"title":"Numerical Analysis of Filamentation in Conventional Double Heterostructure and Quantum Well High-Power Broad-Area Laser Diodes","authors":"A. Seyedfaraji, V. Ahmadi, M. Noshiravani, F. Gity","doi":"10.1109/SMELEC.2006.380793","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380793","url":null,"abstract":"A comprehensive model is presented to study filamentation in both conventional double heterostructure (DH) and quantum well (QW) semiconductor lasers. The spatial dynamics of broad-area (BA) semiconductor lasers is studied by numerically solving space-dependent coupled partial differential equations for the complex optical fields and the carrier density distribution. A self-consistent iteration is developed to model the formation and longitudinal propagation of unstable transverse optical filamentary structures by means of beam propagation method. The effects of stripe width, linewidth enhancement factor and Kerr coefficient are analyzed.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132092071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.380784
Z. Siping, H. Younan, E. Eddie, Khoo Ley Hong
In this paper, a novel sample preparation method for obtaining high- resolution SEM profile is proposed. Both Sela fine cleave and FIB slice techniques have been used for SEM sample preparation. Using this new method, high-resolution 90 degrees SEM micrographs are provided. It has been applied in failure analysis to check Via gouging information without any charging problem, which helps us to reduce TEM analysis samples.
{"title":"Studies on A New Sela-FIB Sample Preparation Method and Its Application in Failure Analysis of Wafer Fabrication for 110nm Technology Node and Beyond","authors":"Z. Siping, H. Younan, E. Eddie, Khoo Ley Hong","doi":"10.1109/SMELEC.2006.380784","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380784","url":null,"abstract":"In this paper, a novel sample preparation method for obtaining high- resolution SEM profile is proposed. Both Sela fine cleave and FIB slice techniques have been used for SEM sample preparation. Using this new method, high-resolution 90 degrees SEM micrographs are provided. It has been applied in failure analysis to check Via gouging information without any charging problem, which helps us to reduce TEM analysis samples.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121581986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.381079
Adiseno, G. Wiranto, T.M.S. Soegandi
This paper presents a low cost solution for lower frequency WiMAX CPE receivers. A receiver which consists of wideband LNA, switching mixer, VCO and reconfigurable low-pass filter have been designed and simulated in different WiMAX receive bands such as in the 2.3-GHz band, in the ISM band (2.4-GHz), and in the 2.5-GHz band, as well as in different channel bandwidths, ranging from 1.75 MHz up to 10 MHz. The zero-IF architecture is chosen as it suits for receivers using OFDM signals with null DC subcarrier. The LNA and switching mixer have been fabricated in 0.18 mum RF- CMOS technology and the measurement results show that these building blocks have a combined RF-to-IF gain of 20-dB, a DSB noise figure of 3.5-dB, an RF-to-IF IIP2 and IIP3 higher than +20-dBm and 0-dBm, respectively. The circuit consumes 16-mA from 1.8-V supply and occupies a die area of 0.42 times 0.50 mm2. Simulation results of the negative-Gm VCO show that it can oscillate at the desired frequencies with phase-noise performance of better than - 125-dBc/Hz at a frequency offset of 3.5 MHz. A reconfigurable 4th order of Gm-C low-pass filter (LPF) has been designed using two 2nd order biquad gm- C LPFs and its simulation results show that - 3-dB frequency corners can be adjusted to 1.75-MHz, 3.5-MHz, 7-MHz and 14-MHz. Both VCO and LPF are simulated using 0.18 mum RF-CMOS technology.
{"title":"A Low-Cost CMOS Reconfigurable Receiver for WiMAX Applications","authors":"Adiseno, G. Wiranto, T.M.S. Soegandi","doi":"10.1109/SMELEC.2006.381079","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.381079","url":null,"abstract":"This paper presents a low cost solution for lower frequency WiMAX CPE receivers. A receiver which consists of wideband LNA, switching mixer, VCO and reconfigurable low-pass filter have been designed and simulated in different WiMAX receive bands such as in the 2.3-GHz band, in the ISM band (2.4-GHz), and in the 2.5-GHz band, as well as in different channel bandwidths, ranging from 1.75 MHz up to 10 MHz. The zero-IF architecture is chosen as it suits for receivers using OFDM signals with null DC subcarrier. The LNA and switching mixer have been fabricated in 0.18 mum RF- CMOS technology and the measurement results show that these building blocks have a combined RF-to-IF gain of 20-dB, a DSB noise figure of 3.5-dB, an RF-to-IF IIP2 and IIP3 higher than +20-dBm and 0-dBm, respectively. The circuit consumes 16-mA from 1.8-V supply and occupies a die area of 0.42 times 0.50 mm2. Simulation results of the negative-Gm VCO show that it can oscillate at the desired frequencies with phase-noise performance of better than - 125-dBc/Hz at a frequency offset of 3.5 MHz. A reconfigurable 4th order of Gm-C low-pass filter (LPF) has been designed using two 2nd order biquad gm- C LPFs and its simulation results show that - 3-dB frequency corners can be adjusted to 1.75-MHz, 3.5-MHz, 7-MHz and 14-MHz. Both VCO and LPF are simulated using 0.18 mum RF-CMOS technology.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114180779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.381054
M. Alias, P. Leisher, K. Choquette, K. Anuar, D. Siriani, S. Mitani, Y. Mohd Razman, A.M. Abdul Fatah
In this work, a number of 850 nm vertical-cavity surface-emitting lasers (VCSELs) with varying oxide aperture sizes are fabricated and characterized to study the device efficiency and spectral characteristics. Differential quantum efficiencies up to 28% corresponding to wall-plug efficiencies of 15%, and multi-mode output spectrum rang of 845 nm to 850 nm were measured for a number of these devices. Additionally, the efficiency characteristics and spectral as a function of oxide aperture size for these 850 nm VCSELs are analyzed and explained.
{"title":"Efficiency and Spectral Characteristics of 850 nm Oxide-Confined Vertical-Cavity Surface-Emitting Lasers","authors":"M. Alias, P. Leisher, K. Choquette, K. Anuar, D. Siriani, S. Mitani, Y. Mohd Razman, A.M. Abdul Fatah","doi":"10.1109/SMELEC.2006.381054","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.381054","url":null,"abstract":"In this work, a number of 850 nm vertical-cavity surface-emitting lasers (VCSELs) with varying oxide aperture sizes are fabricated and characterized to study the device efficiency and spectral characteristics. Differential quantum efficiencies up to 28% corresponding to wall-plug efficiencies of 15%, and multi-mode output spectrum rang of 845 nm to 850 nm were measured for a number of these devices. Additionally, the efficiency characteristics and spectral as a function of oxide aperture size for these 850 nm VCSELs are analyzed and explained.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"119 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120973527","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.381096
Chew Soo Hoon, W. San
Extreme ultraviolet lithography (EUVL) which requires a radiation in a 2% wavelength band around 13.5 nm is expected to be the next generation lithography (NGL) system. A 13.5 nm EUV source is needed to satisfy the demand for the production of semiconductor chips with critical dimensions of 50 nm and below. Nowadays, plasma based EUV sources such as laser produced plasmas and gas discharges are considered internationally by many as the practical light sources. Recently, much progress has been made in vacuum spark discharges as they seem to offer an alternative with much higher conversion efficiency into EUV photons. The vacuum spark (UMVS-III) being a compact pulsed plasma discharge has been investigated in this laboratory as a possible EUV source. An extension of the earlier research work on X-ray production by the vacuum spark to the EUV region is carried out.
{"title":"Development of the Vacuum Spark as an EUV Source for Next Generation Lithography","authors":"Chew Soo Hoon, W. San","doi":"10.1109/SMELEC.2006.381096","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.381096","url":null,"abstract":"Extreme ultraviolet lithography (EUVL) which requires a radiation in a 2% wavelength band around 13.5 nm is expected to be the next generation lithography (NGL) system. A 13.5 nm EUV source is needed to satisfy the demand for the production of semiconductor chips with critical dimensions of 50 nm and below. Nowadays, plasma based EUV sources such as laser produced plasmas and gas discharges are considered internationally by many as the practical light sources. Recently, much progress has been made in vacuum spark discharges as they seem to offer an alternative with much higher conversion efficiency into EUV photons. The vacuum spark (UMVS-III) being a compact pulsed plasma discharge has been investigated in this laboratory as a possible EUV source. An extension of the earlier research work on X-ray production by the vacuum spark to the EUV region is carried out.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121170708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.380693
Jae-Seong Jeong, Jung-Min Lee, Sang-Deuk Park
In this study, We investigated weak point and improvement about ND-mode ESD of CMOS Schmitt trigger circuit embeded in Microcontroller. Junction spiking conditions on NMOS of the CMOS Schmitt trigger circuit were Vcc Common mode, ND-mode 1.4 kV, and 0.8-1.2 sec zap interval (pin to pin). Failure mechanism by LNPN action formed in CMOS Schmitt trigger circuit was reproduced. We have identified Root Cause and improved circuits to achieve ESD damage free.
{"title":"Weak point and improvement of CMOS Schmitt Trigger Circuit used in Microcontroller about ND-mode ESD","authors":"Jae-Seong Jeong, Jung-Min Lee, Sang-Deuk Park","doi":"10.1109/SMELEC.2006.380693","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380693","url":null,"abstract":"In this study, We investigated weak point and improvement about ND-mode ESD of CMOS Schmitt trigger circuit embeded in Microcontroller. Junction spiking conditions on NMOS of the CMOS Schmitt trigger circuit were Vcc Common mode, ND-mode 1.4 kV, and 0.8-1.2 sec zap interval (pin to pin). Failure mechanism by LNPN action formed in CMOS Schmitt trigger circuit was reproduced. We have identified Root Cause and improved circuits to achieve ESD damage free.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125232441","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2006-11-01DOI: 10.1109/SMELEC.2006.380737
P. Tan, A. Kordesch, O. Sidek
In this paper, we proposed a new physical-based equation to model the CMOS transistor STI y-stress (in the direction of channel width). It can be used in any SPICE MOS model and it has been verified on 0.13 um CMOS transistors. The physical characteristics of the compressive STI y-stress effect on saturation drain current, Idsat are captured by using a new proposed transistor layout method. The equation that is able to describe the physical characteristics of the STI y-stress effect is incorporated into the electron and hole mobility, uO of the SPICE model to capture the y-stress effect on Idsat. With the combination of the new y-stress parameters and the default delta width parameters in the SPICE model, we are able to fit the simulation curve to the hook shaped Idsat curve from the actual silicon data.
在本文中，我们提出了一个新的基于物理的方程来模拟CMOS晶体管的STI应力(在通道宽度方向上)。它可用于任何SPICE MOS模型，并已在0.13 um CMOS晶体管上进行了验证。采用一种新的晶体管布局方法，捕获了压缩应力对饱和漏极电流影响的物理特性。将能够描述y-应力效应物理特性的方程纳入SPICE模型的电子和空穴迁移率uO中，以捕捉y-应力对Idsat的影响。结合SPICE模型中新的y应力参数和默认的δ宽度参数，我们可以将模拟曲线与实际硅数据的钩形Idsat曲线拟合。
{"title":"Physical-Based SPICE Model of CMOS STI y-Stress Effect","authors":"P. Tan, A. Kordesch, O. Sidek","doi":"10.1109/SMELEC.2006.380737","DOIUrl":"https://doi.org/10.1109/SMELEC.2006.380737","url":null,"abstract":"In this paper, we proposed a new physical-based equation to model the CMOS transistor STI y-stress (in the direction of channel width). It can be used in any SPICE MOS model and it has been verified on 0.13 um CMOS transistors. The physical characteristics of the compressive STI y-stress effect on saturation drain current, Idsat are captured by using a new proposed transistor layout method. The equation that is able to describe the physical characteristics of the STI y-stress effect is incorporated into the electron and hole mobility, uO of the SPICE model to capture the y-stress effect on Idsat. With the combination of the new y-stress parameters and the default delta width parameters in the SPICE model, we are able to fit the simulation curve to the hook shaped Idsat curve from the actual silicon data.","PeriodicalId":136703,"journal":{"name":"2006 IEEE International Conference on Semiconductor Electronics","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2006-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122724576","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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