Pub Date : 2023-12-21DOI: 10.35848/1347-4065/acfb18
Keito Mori-Tamamura, Yuya Morimoto, Atsushi A. Yamaguchi, S. Kusanagi, Y. Kanitani, Yoshihiro Kudo, S. Tomiya
In this study, we have separately evaluated the radiative and non-radiative recombination lifetimes for InGaN quantum well (QW) samples with different amounts of ion-implantation damage, and have investigated their temperature dependence. The radiative and non-radiative recombination lifetimes were calculated from photoluminescence (PL) decay time measured by time-resolved PL measurements, combined with the absolute internal quantum efficiency values estimated by the simultaneous photoacoustic and PL measurements. As a result, the experimentally observed radiative recombination lifetimes are almost the same for all samples, while the non-radiative recombination lifetimes are shorter for samples with larger ion-implantation damage. These findings will lead to a comprehensive understanding of carrier dynamics in InGaN-QW optical devices.
{"title":"Evaluation of radiative and non-radiative recombination lifetimes in InGaN quantum wells with different ion-implantation damage","authors":"Keito Mori-Tamamura, Yuya Morimoto, Atsushi A. Yamaguchi, S. Kusanagi, Y. Kanitani, Yoshihiro Kudo, S. Tomiya","doi":"10.35848/1347-4065/acfb18","DOIUrl":"https://doi.org/10.35848/1347-4065/acfb18","url":null,"abstract":"In this study, we have separately evaluated the radiative and non-radiative recombination lifetimes for InGaN quantum well (QW) samples with different amounts of ion-implantation damage, and have investigated their temperature dependence. The radiative and non-radiative recombination lifetimes were calculated from photoluminescence (PL) decay time measured by time-resolved PL measurements, combined with the absolute internal quantum efficiency values estimated by the simultaneous photoacoustic and PL measurements. As a result, the experimentally observed radiative recombination lifetimes are almost the same for all samples, while the non-radiative recombination lifetimes are shorter for samples with larger ion-implantation damage. These findings will lead to a comprehensive understanding of carrier dynamics in InGaN-QW optical devices.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"32 16","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138950162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-20DOI: 10.35848/1347-4065/ad177a
Imtiyaz Ahmad Khan, Sanjeev Manhas, Mahendra Pakala, Arvind Kumar
This paper reports a stacked DRAM memory structure that is based on gate all-around (GAA) nanosheet access transistor. A TCAD study is done to compare nanosheet DRAM and conventional saddle fin recessed channel access transistor (SRCAT) in terms of DRAM electrical characteristics and its row hammer-induced leakage. The nanosheet DRAM shows superior characteristics in terms of current driving capability, speed, and refresh than SRCAT. The nanosheet DRAM also shows significantly lower hammer-induced failure as compared to SRCAT because the original leakage path from the cell to the neighboring cell gets blocked due to the nanosheet device structure. We also investigate the effect of spacer length on nanosheet DRAM characteristics and show that extended spacer length is favorable for having better DRAM characteristics due to the floating body effect. Our study demonstrates the potential, and advantages of nanosheet DRAM architecture compared to the conventional SRCAT DRAM.
本文报告了一种基于全栅极（GAA）纳米片存取晶体管的堆叠式 DRAM 存储器结构。通过 TCAD 研究，比较了纳米片 DRAM 和传统鞍形鳍凹槽接入晶体管 (SRCAT) 在 DRAM 电气特性和行锤引起的漏电方面的差异。纳米片 DRAM 在电流驱动能力、速度和刷新方面的特性均优于 SRCAT。与 SRCAT 相比，纳米片 DRAM 的行锤诱发故障率也明显降低，因为纳米片器件结构阻断了从单元到相邻单元的原始漏电路径。我们还研究了间隔长度对纳米片 DRAM 特性的影响，结果表明，由于浮体效应，延长间隔长度有利于获得更好的 DRAM 特性。与传统的 SRCAT DRAM 相比，我们的研究证明了纳米片 DRAM 结构的潜力和优势。
{"title":"Design and analysis of gate all around stacked nanosheet-DRAM for future technology node","authors":"Imtiyaz Ahmad Khan, Sanjeev Manhas, Mahendra Pakala, Arvind Kumar","doi":"10.35848/1347-4065/ad177a","DOIUrl":"https://doi.org/10.35848/1347-4065/ad177a","url":null,"abstract":"\u0000 This paper reports a stacked DRAM memory structure that is based on gate all-around (GAA) nanosheet access transistor. A TCAD study is done to compare nanosheet DRAM and conventional saddle fin recessed channel access transistor (SRCAT) in terms of DRAM electrical characteristics and its row hammer-induced leakage. The nanosheet DRAM shows superior characteristics in terms of current driving capability, speed, and refresh than SRCAT. The nanosheet DRAM also shows significantly lower hammer-induced failure as compared to SRCAT because the original leakage path from the cell to the neighboring cell gets blocked due to the nanosheet device structure. We also investigate the effect of spacer length on nanosheet DRAM characteristics and show that extended spacer length is favorable for having better DRAM characteristics due to the floating body effect. Our study demonstrates the potential, and advantages of nanosheet DRAM architecture compared to the conventional SRCAT DRAM.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"117 15","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138953744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-20DOI: 10.35848/1347-4065/ad1775
X. Bai, R. Nebashi, M. Miyamura, Kazunori Funahashi, K. Okamoto, Hideaki Numata, N. Iguchi, T. Sakamoto, M. Tada
A 28nm 512Kb NanoBridge non-volatile memory is developed for an energy-efficient microcontroller unit. 0.11pJ/bit read energy is achieved by utilizing an inverter sense scheme thanks to large ON/OFF conductance ratio of a split-electrode NanoBridge. The read energy is 71% and 54% less than those of a ReRAM and a SONOS commercial embedded NOR Flash at the same technology node, respectively. Moreover, a 28nm 32-bit RISC-V microcontroller unit embedded with a 2Mb NanoBridge non-voltage memory is fabricated and achieves 80MHz operation frequency.
{"title":"A 0.11pJ/bit read energy embedded NanoBridge non-volatile memory and its integration in a 28nm 32-bit RISC-V microcontroller units","authors":"X. Bai, R. Nebashi, M. Miyamura, Kazunori Funahashi, K. Okamoto, Hideaki Numata, N. Iguchi, T. Sakamoto, M. Tada","doi":"10.35848/1347-4065/ad1775","DOIUrl":"https://doi.org/10.35848/1347-4065/ad1775","url":null,"abstract":"\u0000 A 28nm 512Kb NanoBridge non-volatile memory is developed for an energy-efficient microcontroller unit. 0.11pJ/bit read energy is achieved by utilizing an inverter sense scheme thanks to large ON/OFF conductance ratio of a split-electrode NanoBridge. The read energy is 71% and 54% less than those of a ReRAM and a SONOS commercial embedded NOR Flash at the same technology node, respectively. Moreover, a 28nm 32-bit RISC-V microcontroller unit embedded with a 2Mb NanoBridge non-voltage memory is fabricated and achieves 80MHz operation frequency.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"85 5","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138954365","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-20DOI: 10.35848/1347-4065/ad1776
Yang-Shou Hou, Chun-Yu Lin
Electrostatic Discharge (ESD) and electromigration are critical issues that significantly impact the reliability of integrated circuits (ICs). While both of these phenomena have been studied independently, the combination of the two, ESD-induced electromigration, has received less attention. This work analyzes various types of metal with different lengths, widths, and angles commonly used in ESD protection circuits in the CMOS process. The objective is to observe their behavior under continuous ESD zapping. The ESD-induced electromigration of metallization in the CMOS process has been analyzed, and metal sensitivity to system-level ESD events has also been identified. It is also analyzed from the perspective of energy that the ESD energy that metal can withstand will decrease as the ESD voltage increases, which will be even more detrimental to the ESD reliability of ICs. The findings from this study aim to provide valuable insights for designing metal lines in ICs to enhance ESD protection.
{"title":"Characterization of ESD-Induced Electromigration on CMOS Metallization in On-Chip ESD Protection Circuit","authors":"Yang-Shou Hou, Chun-Yu Lin","doi":"10.35848/1347-4065/ad1776","DOIUrl":"https://doi.org/10.35848/1347-4065/ad1776","url":null,"abstract":"\u0000 Electrostatic Discharge (ESD) and electromigration are critical issues that significantly impact the reliability of integrated circuits (ICs). While both of these phenomena have been studied independently, the combination of the two, ESD-induced electromigration, has received less attention. This work analyzes various types of metal with different lengths, widths, and angles commonly used in ESD protection circuits in the CMOS process. The objective is to observe their behavior under continuous ESD zapping. The ESD-induced electromigration of metallization in the CMOS process has been analyzed, and metal sensitivity to system-level ESD events has also been identified. It is also analyzed from the perspective of energy that the ESD energy that metal can withstand will decrease as the ESD voltage increases, which will be even more detrimental to the ESD reliability of ICs. The findings from this study aim to provide valuable insights for designing metal lines in ICs to enhance ESD protection.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"16 7","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138955298","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-20DOI: 10.35848/1347-4065/ad1778
Jin Miura, F. Inamura, T. Ikuta, K. Maehashi, Kenji Ikushima
The accumulation of photoinduced carriers at the SiO2/Si interface was observed via graphene transport. Chemical vapor deposition graphene was transferred to a lightly p-doped silicon substrate with a SiO2 dielectric layer and served as a charge sensor for detecting the accumulation of photoinduced carriers at the SiO2/Si interface. The sample was cooled to 4.2 K to realize an undoped silicon substrate without intrinsic carriers. Photoexcited carriers in the undoped silicon substrate were collected at the SiO2/Si interface via a gate voltage and the carrier polarity was controlled well by the polarity of the gate voltage set during the light illumination. The photoinduced carrier density was determined by the number of photons incident on the silicon substrate with a photon-electron conversion efficiency of about 0.036. These results may provide polarity control of the conduction channel (n- or p-type) in standard Si-MOS structures, paving the way for optically programmable Si-CMOS.
通过石墨烯传输观察了二氧化硅/硅界面上光诱导载流子的积累。化学气相沉积石墨烯被转移到带有二氧化硅介电层的轻度 p 掺杂硅衬底上，并用作电荷传感器来检测二氧化硅/硅界面上光诱导载流子的积累。将样品冷却到 4.2 K 以实现无本征载流子的未掺杂硅衬底。未掺杂硅衬底中的光激发载流子通过栅极电压被收集到二氧化硅/硅界面上，载流子极性由光照时设置的栅极电压极性控制。光诱导载流子密度由入射到硅衬底上的光子数量决定，光子-电子转换效率约为 0.036。这些结果可为标准硅-MOS 结构中的传导沟道（n 型或 p 型）提供极性控制，从而为光可编程硅-CMOS 铺平道路。
{"title":"Accumulation of photoinduced carriers at the SiO2/Si interface observed through graphene transport","authors":"Jin Miura, F. Inamura, T. Ikuta, K. Maehashi, Kenji Ikushima","doi":"10.35848/1347-4065/ad1778","DOIUrl":"https://doi.org/10.35848/1347-4065/ad1778","url":null,"abstract":"\u0000 The accumulation of photoinduced carriers at the SiO2/Si interface was observed via graphene transport. Chemical vapor deposition graphene was transferred to a lightly p-doped silicon substrate with a SiO2 dielectric layer and served as a charge sensor for detecting the accumulation of photoinduced carriers at the SiO2/Si interface. The sample was cooled to 4.2 K to realize an undoped silicon substrate without intrinsic carriers. Photoexcited carriers in the undoped silicon substrate were collected at the SiO2/Si interface via a gate voltage and the carrier polarity was controlled well by the polarity of the gate voltage set during the light illumination. The photoinduced carrier density was determined by the number of photons incident on the silicon substrate with a photon-electron conversion efficiency of about 0.036. These results may provide polarity control of the conduction channel (n- or p-type) in standard Si-MOS structures, paving the way for optically programmable Si-CMOS.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"129 22","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138953452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-20DOI: 10.35848/1347-4065/ad1777
Keisuke Kimura, Noriyuki Taoka, A. Ohta, K. Makihara, S. Miyazaki
We have demonstrated formation of ultrathin Ni-silicide on SiO2 by annealing Si/Ni/Si structures and have systematically evaluated impacts of the Si layer thickness on oxidation, surface roughening, and silicidation reaction. As a result, XPS analyses revealed that suppression of Ni oxidation due to the top Si layer makes it possible to form the ultrathin Ni-silicide layer with a thickness of around 2 nm. Then, it turned out that composition ratio of Ni and Si depends on not only the annealing temperature but also the initial thickness ratio of the top Si and the bottom Si layers. Furthermore, this work clarified that the ultra-thin top Si layer has the large impact on the surface morphology during the Ni-silicide formation with the diffusion and the preferential oxidation.
{"title":"Formation of ultra-thin nickel silicide on SiO2 using Si/Ni/Si structures for oxidation control","authors":"Keisuke Kimura, Noriyuki Taoka, A. Ohta, K. Makihara, S. Miyazaki","doi":"10.35848/1347-4065/ad1777","DOIUrl":"https://doi.org/10.35848/1347-4065/ad1777","url":null,"abstract":"\u0000 We have demonstrated formation of ultrathin Ni-silicide on SiO2 by annealing Si/Ni/Si structures and have systematically evaluated impacts of the Si layer thickness on oxidation, surface roughening, and silicidation reaction. As a result, XPS analyses revealed that suppression of Ni oxidation due to the top Si layer makes it possible to form the ultrathin Ni-silicide layer with a thickness of around 2 nm. Then, it turned out that composition ratio of Ni and Si depends on not only the annealing temperature but also the initial thickness ratio of the top Si and the bottom Si layers. Furthermore, this work clarified that the ultra-thin top Si layer has the large impact on the surface morphology during the Ni-silicide formation with the diffusion and the preferential oxidation.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"101 9","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138958805","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-19DOI: 10.35848/1347-4065/ad1719
Jun-ichi Inoue
Sensor applications of negatively charged nitrogen vacancy NV^{-} center in diamond are now in practical use, yet for finer sensitivity, a comprehensive understanding of various kinds of sources that cause detrimental relaxation and damping is still required. During the course of theoretical study regarding this, we found that Gaussian white noise with the zero-mean has a substantial effect, which manifests itself in a period of free induction decay (FID) oscillation. This effect is experimentally detectable through comparison with zero-field splitting fixed by, e.g., optically detected magnetic resonance (ODMR). The result is corroborated by a different analytical framework, Lindblad master equation. Our finding in FID oscillation period, or an equivalent energy shift, is concluded to fall into a class of dynamic frequency shift.
{"title":"Dynamic frequency shift in NV- center in diamond induced by anisotropic in-plane vacuum fluctuation","authors":"Jun-ichi Inoue","doi":"10.35848/1347-4065/ad1719","DOIUrl":"https://doi.org/10.35848/1347-4065/ad1719","url":null,"abstract":"\u0000 Sensor applications of negatively charged nitrogen vacancy NV^{-} center in diamond are now in practical use, yet for finer sensitivity, a comprehensive understanding of various kinds of sources that cause detrimental relaxation and damping is still required. During the course of theoretical study regarding this, we found that Gaussian white noise with the zero-mean has a substantial effect, which manifests itself in a period of free induction decay (FID) oscillation. This effect is experimentally detectable through comparison with zero-field splitting fixed by, e.g., optically detected magnetic resonance (ODMR). The result is corroborated by a different analytical framework, Lindblad master equation. Our finding in FID oscillation period, or an equivalent energy shift, is concluded to fall into a class of dynamic frequency shift.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"105 25","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138959423","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-19DOI: 10.35848/1347-4065/ad1718
Hui Zhang, Yanlin Gao, M. Maruyama, Susumu Okada
Using density functional theory, we investigated trilayer in-plane heterostructures consisting of graphene and hBN strips in terms of their interlayer stacking arrangements. The trilayer hBN/graphene superlattices possess flat dispersion bands at their band edges, the wave function distribution of which strongly depends on the interlayer stacking arrangement. The wave functions of the valence and conduction band edges of the trilayer heterostructure with AA’ stacking are distributed throughout the layers implying a two-dimensional carrier distribution. In contrast, we found one-dimensional carrier channels along the border between graphene and hBN for electrons and holes in the trilayer heterosheet with rhombohedral interlayer stacking. These unique carrier distributions are ascribed to the interlayer dipole moment arising from asymmetric arrangements of B and N atoms across the layers. Therefore, the trilayer in-plane heterostructures of graphene and hBN superlattice possess trans-dimensional carriers in terms of their interlayer stacking arrangement.
我们利用密度泛函理论研究了由石墨烯和氢化硼条带组成的三层平面异质结构的层间堆积排列。hBN/ 石墨烯三层超晶格的带边缘具有平坦的色散带，其波函数分布与层间堆叠排列密切相关。AA'堆叠的三层异质结构的价带和导带边缘的波函数分布在整个层中，这意味着存在二维载流子分布。与此相反，我们发现在具有斜方体层间堆叠的三层异质结构中，电子和空穴沿着石墨烯和氢溴之间的边界形成一维载流子通道。这些独特的载流子分布归因于层间 B 原子和 N 原子的不对称排列所产生的层间偶极矩。因此，石墨烯和 hBN 超晶格的三层平面异质结构在层间堆叠排列方面具有跨维载流子。
{"title":"Trans-dimensionality of electron/hole channels in multilayer in-plane heterostructures comprising graphene and hBN superlattice","authors":"Hui Zhang, Yanlin Gao, M. Maruyama, Susumu Okada","doi":"10.35848/1347-4065/ad1718","DOIUrl":"https://doi.org/10.35848/1347-4065/ad1718","url":null,"abstract":"\u0000 Using density functional theory, we investigated trilayer in-plane heterostructures consisting of graphene and hBN strips in terms of their interlayer stacking arrangements. The trilayer hBN/graphene superlattices possess flat dispersion bands at their band edges, the wave function distribution of which strongly depends on the interlayer stacking arrangement. The wave functions of the valence and conduction band edges of the trilayer heterostructure with AA’ stacking are distributed throughout the layers implying a two-dimensional carrier distribution. In contrast, we found one-dimensional carrier channels along the border between graphene and hBN for electrons and holes in the trilayer heterosheet with rhombohedral interlayer stacking. These unique carrier distributions are ascribed to the interlayer dipole moment arising from asymmetric arrangements of B and N atoms across the layers. Therefore, the trilayer in-plane heterostructures of graphene and hBN superlattice possess trans-dimensional carriers in terms of their interlayer stacking arrangement.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"112 47","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"138959253","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-19DOI: 10.35848/1347-4065/ad0ef3
Md. Mahfuzul Haque, Samiya Mahjabin, M. J. Rashid, Hamad F. Alharbi, Takashi Suemasu, Md. Akhtaruzzaman
Organo-metal halide perovskite solar cells (PSCs) have received a lot of attention to the photovoltaic research community, mainly due to the rapid development of their cell performances. But industry-level production of PSCs is hindered for several reasons. At present, the use of high-temperature processed electron transport layer (ETL) such as TIO2, the use of chemically unstable ETL such as ZnO and SnO2, etc. are ETL-related obstacles behind this industrialization. Aiming to remove these problems, cerium oxide (CeOx), one of the most Earth-rich metal oxides has been chosen as ETL for this study. In this study, the SCAPS-1D simulation package has been used for an intensive study on ETL/PSK interface for a methylammonium lead iodide (MAPbI3)-based PSC having CeOx as ETL. From this simulation, the effect of conduction band offset (CBO) between CeOx and MAPbI3 has been found as the key player behind the cell performances. Defects at this interface have also been introduced and varied for studying their effects on cell performance at different CBO values. The temperature stability of a PSC is another important issue that has been considered in this study to find the effect of operating temperature on the PSC. This study would enlighten the researchers in implying some fantastic techniques at the ETL/PSK interface for improving the cell performance that will forward the research community a few steps to use CeOx as a promising ETL in PSC.
{"title":"Exploring the effect of interface properties between CeO x electron transport layer and MAPbI3 perovskite layer on solar cell performances through numerical simulation","authors":"Md. Mahfuzul Haque, Samiya Mahjabin, M. J. Rashid, Hamad F. Alharbi, Takashi Suemasu, Md. Akhtaruzzaman","doi":"10.35848/1347-4065/ad0ef3","DOIUrl":"https://doi.org/10.35848/1347-4065/ad0ef3","url":null,"abstract":"Organo-metal halide perovskite solar cells (PSCs) have received a lot of attention to the photovoltaic research community, mainly due to the rapid development of their cell performances. But industry-level production of PSCs is hindered for several reasons. At present, the use of high-temperature processed electron transport layer (ETL) such as TIO<sub>2</sub>, the use of chemically unstable ETL such as ZnO and SnO<sub>2</sub>, etc. are ETL-related obstacles behind this industrialization. Aiming to remove these problems, cerium oxide (CeO<sub>\u0000<italic toggle=\"yes\">x</italic>\u0000</sub>), one of the most Earth-rich metal oxides has been chosen as ETL for this study. In this study, the SCAPS-1D simulation package has been used for an intensive study on ETL/PSK interface for a methylammonium lead iodide (MAPbI<sub>3</sub>)-based PSC having CeO<italic toggle=\"yes\">\u0000<sub>x</sub>\u0000</italic> as ETL. From this simulation, the effect of conduction band offset (CBO) between CeO<italic toggle=\"yes\">\u0000<sub>x</sub>\u0000</italic> and MAPbI<sub>3</sub> has been found as the key player behind the cell performances. Defects at this interface have also been introduced and varied for studying their effects on cell performance at different CBO values. The temperature stability of a PSC is another important issue that has been considered in this study to find the effect of operating temperature on the PSC. This study would enlighten the researchers in implying some fantastic techniques at the ETL/PSK interface for improving the cell performance that will forward the research community a few steps to use CeO<italic toggle=\"yes\">\u0000<sub>x</sub>\u0000</italic> as a promising ETL in PSC.","PeriodicalId":14741,"journal":{"name":"Japanese Journal of Applied Physics","volume":"29 1","pages":""},"PeriodicalIF":1.5,"publicationDate":"2023-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139056221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-12-18DOI: 10.35848/1347-4065/ad1699
Utana Yamaoka, Yuuki Kaneda, Masaaki Oshita, Shiro Saito, T. Kan
We proposed a near-infrared spectroscopy system that measures multiple types of gases using a plasmonic photodetector. We formed a gold diffraction grating on a silicon substrate to create a plasmonic photodetector and conducted gas spectral measurements in the near-infrared region. As a result, we could measure the transmission spectrum of water vapor gas at a concentration of 2%. Furthermore, we could measure ethanol gas transmittance at different concentrations of 4.5% and 2.7%, and change in transmission depending on concentration. Lastly, the transmission spectrum of 10% NH3 gas was measured. Since these results are consistent with evaluations using Fourier Transform Infrared Spectroscopy, it was confirmed that the proposed gas measurement can be applied to multiple types of gas sensing.
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