Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401619
R. Shu, A. Hamidian, A. Malignaggi, M. K. Ali, G. Boeck
The design of a 40 GHz voltage-controlled oscillator (VCO) in 90 nm CMOS technology has been presented in this paper. An optimized topology of resonated negative-conductance cell was utilized to relax the serious trade-off in the design of millimeter-wave VCO. From On-wafer measurement results, the fabricated 40 GHz VCO achieves 8.9 % frequency tuning range and -96.7 dBc/Hz phase noise at 1 MHz offset, while consuming only 1.65 mW dc power. An excellent balance of all critical performance parameters has been realized, resulting in a FOMT (figure-of-merit) of -185.4 dBc/Hz.
{"title":"A 40 GHz CMOS VCO with resonated negative-conductance cell","authors":"R. Shu, A. Hamidian, A. Malignaggi, M. K. Ali, G. Boeck","doi":"10.1109/RFIT.2012.6401619","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401619","url":null,"abstract":"The design of a 40 GHz voltage-controlled oscillator (VCO) in 90 nm CMOS technology has been presented in this paper. An optimized topology of resonated negative-conductance cell was utilized to relax the serious trade-off in the design of millimeter-wave VCO. From On-wafer measurement results, the fabricated 40 GHz VCO achieves 8.9 % frequency tuning range and -96.7 dBc/Hz phase noise at 1 MHz offset, while consuming only 1.65 mW dc power. An excellent balance of all critical performance parameters has been realized, resulting in a FOMT (figure-of-merit) of -185.4 dBc/Hz.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"52 ","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120976032","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401670
Jin He, Jiankang Li, Debin Hou, Y. Xiong, D. Yan, M. A. Arasu, M. Je
A 20-GHz voltage-controlled oscillator (VCO) for phase-locked loop (PLL) synthesizer is presented in this paper. The VCO and PLL synthesizer have been implemented using only CMOS devices of a 0.13-μm SiGe BiCMOS technology with the chip area of 0.22 mm2 and 0.48 mm2, respectively. The measured tuning range of the VCO is 2.21 GHz from 19.9 to 22.11 GHz; the PLL synthesizer can generate output frequencies from 20.51 to 21.27 GHz successfully and the measured phase noise at 100-kHz and 1-MHz offset frequencies is -68.66 dBc/Hz and -97.17 dBc/Hz, respectively. At a 1.5-V supply, the power dissipation of the VCO and PLL synthesizer is 27 mW and 40 mW, respectively.
{"title":"A 20-GHz VCO for PLL synthesizer in 0.13-μm BiCMOS","authors":"Jin He, Jiankang Li, Debin Hou, Y. Xiong, D. Yan, M. A. Arasu, M. Je","doi":"10.1109/RFIT.2012.6401670","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401670","url":null,"abstract":"A 20-GHz voltage-controlled oscillator (VCO) for phase-locked loop (PLL) synthesizer is presented in this paper. The VCO and PLL synthesizer have been implemented using only CMOS devices of a 0.13-μm SiGe BiCMOS technology with the chip area of 0.22 mm2 and 0.48 mm2, respectively. The measured tuning range of the VCO is 2.21 GHz from 19.9 to 22.11 GHz; the PLL synthesizer can generate output frequencies from 20.51 to 21.27 GHz successfully and the measured phase noise at 100-kHz and 1-MHz offset frequencies is -68.66 dBc/Hz and -97.17 dBc/Hz, respectively. At a 1.5-V supply, the power dissipation of the VCO and PLL synthesizer is 27 mW and 40 mW, respectively.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121268817","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401607
Bonghyuk Park, Seunghyun Jang, Jaeho Jung
A high voltage driver for Class-S power amplifier using SiGe BiCMOS process is presented in this paper. This high voltage driver is applied for making high voltage swing at the input of a power amplifier. The input of this driver is 600 mVp-p then the measured output is 780 mVp-p for single-ended. This driver dissipates 202 mW and it is suited for processing a bit stream of 2.4 Gbps and can be used as a driver stage for switching power amplifier. This high voltage driver is measured with fabricated delta-sigma modulator module.
{"title":"A SiGe BiCMOS high voltage driver for Class-S power amplifier","authors":"Bonghyuk Park, Seunghyun Jang, Jaeho Jung","doi":"10.1109/RFIT.2012.6401607","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401607","url":null,"abstract":"A high voltage driver for Class-S power amplifier using SiGe BiCMOS process is presented in this paper. This high voltage driver is applied for making high voltage swing at the input of a power amplifier. The input of this driver is 600 mVp-p then the measured output is 780 mVp-p for single-ended. This driver dissipates 202 mW and it is suited for processing a bit stream of 2.4 Gbps and can be used as a driver stage for switching power amplifier. This high voltage driver is measured with fabricated delta-sigma modulator module.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126136561","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401632
Sung-Hun Jo, Soon-Jae Kweon, Soo-Hwan Shin, Hyung-Joun Yoo
A discrete-time channel-selection filter with flat passband characteristic that satisfies the LTE specification is proposed. To improve the flatness in passband, a second order IIR filter and a compensation filter are adopted. High stopband attenuation is achieved by using the moving average filters. Through the control of sampling frequency, the proposed discrete-time filter chain satisfies the required specifications for all the channels in LTE. The filter is implemented using TSMC 65-nm CMOS process. The simulation shows that proposed discrete-time filter chain has flatness degradation lower than about 4 dB at passband edge.
{"title":"A discrete-time channel-selection filter with flat passband characteristic for LTE","authors":"Sung-Hun Jo, Soon-Jae Kweon, Soo-Hwan Shin, Hyung-Joun Yoo","doi":"10.1109/RFIT.2012.6401632","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401632","url":null,"abstract":"A discrete-time channel-selection filter with flat passband characteristic that satisfies the LTE specification is proposed. To improve the flatness in passband, a second order IIR filter and a compensation filter are adopted. High stopband attenuation is achieved by using the moving average filters. Through the control of sampling frequency, the proposed discrete-time filter chain satisfies the required specifications for all the channels in LTE. The filter is implemented using TSMC 65-nm CMOS process. The simulation shows that proposed discrete-time filter chain has flatness degradation lower than about 4 dB at passband edge.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"55 216 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125951464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401645
M. Kanamura, T. Ohki, T. Kikkawa, K. Imanishi, K. Watanabe, K. Joshin
In this paper, we describe the recent progress in GaN HEMT technology for high-frequency and high-power applications. First, we present the GaN HEMT technology for base-station applications. Then, we discuss the current drift phenomena during RF operation. We also present the device technology for normally off GaN HEMTs.
{"title":"Recent progress in GaN HEMT for high-frequency and high-power applications","authors":"M. Kanamura, T. Ohki, T. Kikkawa, K. Imanishi, K. Watanabe, K. Joshin","doi":"10.1109/RFIT.2012.6401645","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401645","url":null,"abstract":"In this paper, we describe the recent progress in GaN HEMT technology for high-frequency and high-power applications. First, we present the GaN HEMT technology for base-station applications. Then, we discuss the current drift phenomena during RF operation. We also present the device technology for normally off GaN HEMTs.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131424408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401629
Dong Han, Yuanjin Zheng, M. Je
A 1.8V 0.18μm CMOS analog front end consists of a chopper stabilized low noise preamplifier, a capacitive negative feedback gain stage and a variable gain amplifier with digital tunable low pass filter bank is presented. With optimized gain distribution, the analog front end eliminates the 1/f noise by chopper stabilization without the DC offset cancellation servo loops in conventional chopper amplifier, combines the advantages from chopper stabilization and capacitive negative feedback to achieve both low 1/f noise and compact structure. The simulation results show that the proposed analog front end achieves 32nV/Hz1/2 input referred thermal noise floor with 1.8μA total current from a 1.8V supply, 20kHz chopping frequency, and in-band gain of 400 and 2000, is suitable for electrocardiograph, electroencephalograph, and neural spike recording applications.
{"title":"A 0.18μm front end for ECG/EEG/neural sensor interface","authors":"Dong Han, Yuanjin Zheng, M. Je","doi":"10.1109/RFIT.2012.6401629","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401629","url":null,"abstract":"A 1.8V 0.18μm CMOS analog front end consists of a chopper stabilized low noise preamplifier, a capacitive negative feedback gain stage and a variable gain amplifier with digital tunable low pass filter bank is presented. With optimized gain distribution, the analog front end eliminates the 1/f noise by chopper stabilization without the DC offset cancellation servo loops in conventional chopper amplifier, combines the advantages from chopper stabilization and capacitive negative feedback to achieve both low 1/f noise and compact structure. The simulation results show that the proposed analog front end achieves 32nV/Hz1/2 input referred thermal noise floor with 1.8μA total current from a 1.8V supply, 20kHz chopping frequency, and in-band gain of 400 and 2000, is suitable for electrocardiograph, electroencephalograph, and neural spike recording applications.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"60 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115724219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401642
M. Raja, D. Yan, B. Zhao, R. Singh, H. Zhang, M. Je, V. Navaneethan, X. Chen, W. Peh, L. Tey
This paper describes a 0.18-μm CMOS ASIC, featuring a low power and highly integrated 802.15.4 transceiver with MAC support, a 100-μA programmable signal conditioning, and an inductor-less power management circuit. A compact sensor node for wireless ambulatory blood pressure monitoring (ABPM) using this ASIC is demonstrated. The whole ASIC including the Zigbee transceiver shows state of the art performance in terms of high level of integration and low power consumption.
{"title":"ASIC for wireless ambulatory blood pressure monitoring based on applanation tonometry","authors":"M. Raja, D. Yan, B. Zhao, R. Singh, H. Zhang, M. Je, V. Navaneethan, X. Chen, W. Peh, L. Tey","doi":"10.1109/RFIT.2012.6401642","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401642","url":null,"abstract":"This paper describes a 0.18-μm CMOS ASIC, featuring a low power and highly integrated 802.15.4 transceiver with MAC support, a 100-μA programmable signal conditioning, and an inductor-less power management circuit. A compact sensor node for wireless ambulatory blood pressure monitoring (ABPM) using this ASIC is demonstrated. The whole ASIC including the Zigbee transceiver shows state of the art performance in terms of high level of integration and low power consumption.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114070873","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401674
Fei Jia, Dong Huang, Shengxi Diao, Z. Fu, F. Lin
A class AB power amplifier (PA) with output power digital controllability for WSNs is implemented in 65nm CMOS technology. The programmable output power is realized by altering the number of working cells and adjusting the load through a tunable matching network, which can increase the back-off efficiency significantly. Dummy FETs are used for neutralization to increase reverse isolation. The measurement results show a peak output power of 3dBm and a PAE of 40% with a 1.2V supply. Drain efficiency at back off (above 3dB) increases by more than 10%, comparing to traditional digital controlled PA.
{"title":"A digitally controlled PA with tunable matching network","authors":"Fei Jia, Dong Huang, Shengxi Diao, Z. Fu, F. Lin","doi":"10.1109/RFIT.2012.6401674","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401674","url":null,"abstract":"A class AB power amplifier (PA) with output power digital controllability for WSNs is implemented in 65nm CMOS technology. The programmable output power is realized by altering the number of working cells and adjusting the load through a tunable matching network, which can increase the back-off efficiency significantly. Dummy FETs are used for neutralization to increase reverse isolation. The measurement results show a peak output power of 3dBm and a PAE of 40% with a 1.2V supply. Drain efficiency at back off (above 3dB) increases by more than 10%, comparing to traditional digital controlled PA.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"188 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128704877","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401662
I. E. Kotb, R. Ghoname, H. H. Ghoz, H. Kaldass
A design for a novel compact microstrip planar MIMO antenna system suitable for 4G application is presented. A decoupling network was introduced to improve the MIMO antenna port isolation. The MIMO system resonates at 5.1GHz, 5.29GHz, 6GHz, 6.1GHz, 11.4GHz, and 11.92 GHz for VSWR ≤ 2 and good port isolation. The MIMO antenna can be configured to be a two-port or three-port system. A prototype of the antenna was fabricated and measured.
{"title":"Compact three port MIMO antenna for 4G application","authors":"I. E. Kotb, R. Ghoname, H. H. Ghoz, H. Kaldass","doi":"10.1109/RFIT.2012.6401662","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401662","url":null,"abstract":"A design for a novel compact microstrip planar MIMO antenna system suitable for 4G application is presented. A decoupling network was introduced to improve the MIMO antenna port isolation. The MIMO system resonates at 5.1GHz, 5.29GHz, 6GHz, 6.1GHz, 11.4GHz, and 11.92 GHz for VSWR ≤ 2 and good port isolation. The MIMO antenna can be configured to be a two-port or three-port system. A prototype of the antenna was fabricated and measured.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"139 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125822875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401597
K. Araki, Y. Morishita
In 1990's a concept of software-defined radio has been proposed by Mitola. A reconfigurability of the operating parameters; center frequency, bandwidth and power level in transceivers only altered by software is one of the most important features in the software-defined radio to realize a versatile transceiver. Here we will review research and development in the field of reconfigurable transceiver, and discuss the future trend of this technology. In addition, our work of direct sampling receivers will be introduced on the context of reconfigurability of several characteristics such as image rejection, pass-band widening, etc.
{"title":"Past, current, and future trend in reconfigurable transceiver research and development","authors":"K. Araki, Y. Morishita","doi":"10.1109/RFIT.2012.6401597","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401597","url":null,"abstract":"In 1990's a concept of software-defined radio has been proposed by Mitola. A reconfigurability of the operating parameters; center frequency, bandwidth and power level in transceivers only altered by software is one of the most important features in the software-defined radio to realize a versatile transceiver. Here we will review research and development in the field of reconfigurable transceiver, and discuss the future trend of this technology. In addition, our work of direct sampling receivers will be introduced on the context of reconfigurability of several characteristics such as image rejection, pass-band widening, etc.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127561061","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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