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2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)最新文献

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System integration using silicon-based integrated passive device technology 系统集成采用硅基集成无源器件技术
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401626
Liguo Sun, Yinchao Chen, K. Sun
In this paper, the system on chip (SOC) and system in package (SiP) are discussed as two main approaches for system integration. The system on package (SOP) is introduced with the discussion of the integrated passive device (IPD). IPD based on silicon with high resistance is investigated and the SOP using silicon-based IPD is analyzed. It is found that the silicon-based IPD is a good candidate for the system integration, especially in radio frequency (RF) applications.
本文讨论了系统集成的两种主要方式——片上系统(SOC)和封装系统(SiP)。介绍了封装系统(SOP),并对集成无源器件(IPD)进行了讨论。研究了高阻硅基IPD,分析了硅基IPD的SOP。研究发现,硅基IPD是系统集成的理想选择,特别是在射频应用中。
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引用次数: 7
A 60nW voltage reference circuit generating 1.0V using BJTs and subthreshold MOSFET 一个60nW电压基准电路,使用BJTs和亚阈值MOSFET产生1.0V
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401631
A. Bansal, M. Raja, J. Minkyu
An ultra low power voltage reference circuit generating 1.0V and consuming 60nW from power supply of 1.3V is fabricated in 0.13um CMOS 1P6M process. It can work from battery voltage of 1.3V to 3.6V. The proposed reference circuit uses BJTs and a MOSFET operating in subthreshold region to generate temperature stable reference voltage. The reference circuit proposed in this work generates 1.0V unlike the conventional bandgap circuit where it is 1.2V. Conventional bandgap circuits use baseemitter voltage (VBE) of BJT as CTAT signal while proposed reference circuit uses gate-source voltage (VGS) of a sub-threshold region biased MOSFET. The reference voltage is an estimate of threshold voltage extrapolated up to 0°K. Subthreshold MOSFET used in this circuit is a high voltage transistor having threshold voltage of 0.65V at room temperature, hence it generates 1.0V. Using a low voltage MOSFET having threshold voltage 0.35V, this circuit generates reference voltage of 0.5V.
采用0.13um CMOS 1P6M工艺,制作了产生1.0V、功耗为60nW的超低功耗电压基准电路。它可以在1.3V到3.6V的电池电压下工作。该参考电路使用BJTs和工作在亚阈值区域的MOSFET来产生温度稳定的参考电压。本文提出的参考电路产生的电压为1.0V,而传统带隙电路产生的电压为1.2V。传统带隙电路使用BJT的基极发射极电压(VBE)作为CTAT信号,而参考电路使用亚阈值区域偏置MOSFET的栅极源电压(VGS)作为CTAT信号。参考电压是阈值电压的估计外推到0°K。本电路中使用的亚阈值MOSFET是一种高压晶体管,在室温下阈值电压为0.65V,因此产生1.0V。使用阈值电压为0.35V的低压MOSFET,该电路产生0.5V的参考电压。
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引用次数: 1
45 GHz low power static frequency divider in 90 nm CMOS 45 GHz低功耗静态分频器在90纳米CMOS
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401615
M. K. Ali, A. Hamidian, R. Shu, A. Malignaggi, G. Boeck
This work presents the design of a Q-band static frequency divider with quadrature signal output suitable for 60 GHz application. The RF performance improvement and power consumption reduction is achieved by using inductive peaking, resistor splitting techniques as well as proper transistor sizing. The static frequency divider is realized in a 90 nm CMOS technology with a chip area of 0.60×0.75 mm2. The self-oscillation frequency is 20.5 GHz with 12 GHz locking range. -16 dBm output power with less than -1 dBm input sensitivity were measured. The static frequency divider core and the output buffers consume 6.9 mW and 1.2 mW respectively from a 1.2 V power supply.
本文设计了一种适合60ghz应用的q波段静态分频器。射频性能的提高和功耗的降低是通过使用感应峰值、电阻分裂技术以及适当的晶体管尺寸来实现的。静态分频器采用90 nm CMOS技术实现,芯片面积为0.60×0.75 mm2。自振荡频率为20.5 GHz,锁定范围为12 GHz。测量了- 16dbm输出功率,输入灵敏度小于- 1dbm。静态分频器核心和输出缓冲器分别从1.2 V电源消耗6.9 mW和1.2 mW。
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引用次数: 6
GaN-on-Silicon integration technology 硅基氮化镓集成技术
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401646
G. Ng, S. Arulkumaran, S. Vicknesh, H. Wang, K. Ang, C. M. Kumar, K. Ranjan, G. Lo, S. Tripathy, C. Boon, W. M. Lim
This work presents our recent progress on addressing two major challenges to realizing GaN-Silicon integration namely epitaxial growth of GaN-on-Silicon and CMOS-compatible process. We have successfully demonstrated 0.3-μm gate-length GaN HEMTs on 8-inch Si(111) substrate with fT of 28GHz and fmax of of 64GHz. These device performances are comparable to our reported devices fabricated on 4-inch Si substrate. We have also developed a GaN HEMT process with CMOS-compatible non-gold metal scheme. Excellent ohmic contacts (Rc=0.24 Ω-mm) with smooth surface morphology have been achieved which are comparable to those using conventional III-V gold-based ohmic contacts. 0.15-μm gate-length GaN HEMTs fabricated with this process achieved fT and fmax of 51 GHz and 50GHz respectively. The 5nm-thick AlGaN barrier HEMT exhibited three terminal OFF-state breakdown voltage (BVgd) of 83 V. Our results demonstrate the feasibility of realizing CMOS-compatible high performance GaN HEMTs on 8-inch silicon substrates for future GaN-on-Si integration.
这项工作介绍了我们在解决实现GaN-Silicon集成的两个主要挑战方面的最新进展,即GaN-on-Silicon的外延生长和cmos兼容工艺。我们已经成功地在8英寸Si(111)衬底上演示了0.3 μm栅长GaN hemt, fT为28GHz, fmax为64GHz。这些器件的性能与我们报道的在4英寸Si衬底上制造的器件相当。我们还开发了一种具有cmos兼容非金金属方案的GaN HEMT工艺。优异的欧姆触点(Rc=0.24 Ω-mm)具有光滑的表面形貌,可与传统的III-V金基欧姆触点相媲美。利用该工艺制备的0.15 μm栅极长GaN hemt的fT和fmax分别达到51 GHz和50GHz。5nm厚的AlGaN势垒HEMT的三端off击穿电压(BVgd)为83 V。我们的研究结果证明了在8英寸硅衬底上实现cmos兼容的高性能GaN hemt的可行性,以实现未来的GaN-on- si集成。
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引用次数: 9
Measurement of input impedance of differential microstrip antenna by balun method 差动微带天线输入阻抗的平衡测量
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401639
Y. Zhang, Tu Zhihong
This paper reports the measurement of the input impedance of a differential microstrip antenna by the balun method for the first time. The balun method is described and obtained experimental results are discussed.
本文首次用平衡法测量了差分微带天线的输入阻抗。介绍了平衡法,并对得到的实验结果进行了讨论。
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引用次数: 5
On the choice of cascade de-embedding methods for on-wafer S-parameter measurement 片上s参数测量中级联反嵌入方法的选择
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401638
S. Amakawa, K. Takano, K. Katayama, M. Motoyoshi, T. Yoshida, M. Fujishima
Performance of thru-only cascade de-embedding methods and their variants that use a Π- or a T-equivalent to represent and bisect a symmetric THRU is assessed. The results from the Π- and T-based methods are reasonable at low frequencies. However they are shown to deviate noticeably from the correct results as the frequency gets high or, equivalently, when the length of the THRU approaches an effective wavelength λ. A better alternative at high frequencies is TSD (thru-short-delay), which, when THRU is symmetric, requires only THRU and LINE. TSD gives correct results except in the periodically appearing `dead zones', provided that the characteristic impedance, Zχ, of the transmission line (TL) in the LINE is known. A Π-based method could be used to extract Zχ at low frequencies, from which Zχ can be extrapolated to higher frequencies.
仅通过级联反嵌入方法及其变体的性能进行了评估,这些方法使用Π-或t等效来表示和平分对称THRU。Π-和-based方法的结果在低频下是合理的。然而,当频率变高时,或者当THRU的长度接近有效波长λ时,它们会明显偏离正确的结果。在高频率下,一个更好的选择是TSD(过短延迟),当THRU是对称的时,它只需要THRU和LINE。TSD给出正确的结果,除了周期性出现的“死区”,只要已知line中传输线(TL)的特性阻抗Zχ。可以使用Π-based方法提取低频的Zχ,从中可以外推到更高的频率。
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引用次数: 9
High temperature bandgap reference in PDSOI CMOS with operating temperature up to 300°C 高温带隙参考PDSOI CMOS,工作温度高达300°C
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401630
J. Pathrose, Xiaohui Gong, L. Zou, J. Koh, K. Chai, M. Je, Y. Xu
This paper describes a bandgap reference with temperature range up to 300°C. Fabricated in a PDSOI CMOS technology, the bandgap reference achieves a box model temperature coefficient of 138ppm from 25 to 300°C, and line regulation less than 1.5mv/V. The minimum operating voltage is 2V and consumes merely 285μW at room temperature over several samples.
本文描述了一种温度范围高达300°C的带隙基准。该带隙基准器件采用PDSOI CMOS技术制造,在25 ~ 300℃范围内,盒型温度系数为138ppm,线路调节小于1.5mv/V。几个样品的最小工作电压为2V,室温下功耗仅为285μW。
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引用次数: 6
Enhanced dielectric properties of alumina ceramic substrate for microwave application 微波用氧化铝陶瓷衬底介电性能的提高
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401627
Dai Zhou, Pang Xueman, Cheng Kai, W. Ziliang
Alumina ceramic with enhanced dielectric property was reported in this paper, which indicates its microwave application. Commercial A1203 powder and sintering aids including MgO were utilized to fabricate alumina ceramic substrate. Liquid deposit was introduced to wrap the surface of A1203 powder with MgO additives uniformly. The prepared composite powder was shaped by tape casting and sintered by two-step sintering to ensure density and suitable microstructure. It is shown that MgO addition restrains gain growing and decreases porosity in scanning electron micrograph. MgA1204 spinel, formed by MgO was detected by XRD. The dielectric loss of the alumina ceramic substrate is 6.84 × 10-4.
本文报道了一种具有增强介电性能的氧化铝陶瓷,并对其微波应用前景进行了展望。利用A1203粉末和烧结助剂(MgO)制备氧化铝陶瓷基板。采用液态沉积法将MgO添加剂均匀包裹在A1203粉体表面。制备的复合粉末采用带式铸造成型,采用两步烧结工艺进行烧结,以保证粉末的密度和合适的显微组织。扫描电镜结果表明,MgO的加入抑制了材料的增益增长,降低了孔隙率。用XRD对MgO形成的MgA1204尖晶石进行了表征。氧化铝陶瓷衬底的介电损耗为6.84 × 10-4。
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引用次数: 2
From filter to mid-range wireless power transfer system 从滤波器到中程无线电力传输系统
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401635
Sheng Sun, Danting Xu, Q. S. Liu, F. Lin
In this paper, a wireless power transfer (WPT) system based on two spiral magnetic-coupled resonators is studied and realized on the printed circuit board (PCB). For the mid-range energy transfer, the microwave filter design theory can be employed to explain the basic principle of magnetic induction in WPT system. Based on the filtering transfer function, the power transfer efficiency is defined by Scattering matrix. In particular, the transfer distance between two resonators can be easily optimized according to the filtering specifications. As an example, Chebyshev function is selected to synthesize the two-pole transmission peaks, which is so-called frequency splitting in power community. Then, the transfer distances can be determined from the required external Q-factor and coupling coefficient. Finally, a PCB-based WPT system fed by two loops is designed, implemented, and verified experimentally.
本文研究并在印刷电路板(PCB)上实现了基于两个螺旋磁耦合谐振器的无线电力传输系统。对于中程能量传递,微波滤波器设计理论可以用来解释WPT系统中磁感应的基本原理。在滤波传递函数的基础上,用散射矩阵来定义功率传递效率。特别是,两个谐振器之间的传输距离可以根据滤波规格轻松优化。以切比雪夫函数合成两极传输峰为例,即电力共同体中的分频。然后,可以根据所需的外部q因子和耦合系数确定传输距离。最后,设计、实现了一个基于pcb的双回路馈电WPT系统,并进行了实验验证。
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引用次数: 3
Application of multi-switch in wireless power system 多开关在无线供电系统中的应用
Pub Date : 2012-11-01 DOI: 10.1109/RFIT.2012.6401603
Xue Zhang, Shengyang Tian, Hongxi Xue
In a traditional Inverter Circuit, using parallel power MOSFETs is a common practice to improve the performance of the circuit. However, in a wireless power transfer system using magnetic resonance coupling technique, the method of parallel MOSFET would cause a lot of problems: the speed of the MOSFET converter would decrease; the switching loss would increase. The worst situation is that the switch would not be able to meet the operating frequency of the Magnetic Resonance system. As a result, we introduce the Multi-switch Method to solve the problem above. From simulation, this method could reduce the loss of an individual switch. In this paper, we design a multi-switch circuit, and compare it with the traditional inverter circuit in a magnetic resonance system. Then we analyzed the individual switch loss in these two circuits by a comparative experiment to verify the effectiveness of this new circuit. The result suggests that, this multi-switch circuit improve the individual performance of the switch, and reduce the voltage oscillating waveform of the switch significantly.
在传统的逆变电路中,使用并联功率mosfet是提高电路性能的一种常见做法。然而,在采用磁共振耦合技术的无线电力传输系统中,并联MOSFET的方法会导致许多问题:MOSFET转换器的速度会降低;开关损耗会增加。最坏的情况是开关不能满足磁共振系统的工作频率。因此,我们引入多开关方法来解决上述问题。仿真结果表明,该方法可以降低单个开关的损耗。本文设计了一种多开关电路,并与传统的磁共振系统逆变电路进行了比较。然后通过对比实验分析了两种电路中单个开关损耗,验证了新电路的有效性。结果表明,该多开关电路提高了开关的个体性能,并显著减小了开关的电压振荡波形。
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引用次数: 0
期刊
2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)
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