The methodology suggested in this research provides the great possibility of creating nanostructures composed of various materials, such as soft polymer, hard polymer, and metal, as well as Si. Such nanostructures are required for a vast range of optical and display devices, photonic components, physical devices, energy devices including electrodes of secondary batteries, fuel cells, solar cells, and energy harvesters, biological devices including biochips, biomimetic or biosimilar structured devices, and mechanical devices including micro- or nano-scale sensors and actuators.
{"title":"Reversible nano-lithography for commercial approaches","authors":"Jae Hyun Kim, C. Ahn","doi":"10.1117/12.2205065","DOIUrl":"https://doi.org/10.1117/12.2205065","url":null,"abstract":"The methodology suggested in this research provides the great possibility of creating nanostructures composed of various materials, such as soft polymer, hard polymer, and metal, as well as Si. Such nanostructures are required for a vast range of optical and display devices, photonic components, physical devices, energy devices including electrodes of secondary batteries, fuel cells, solar cells, and energy harvesters, biological devices including biochips, biomimetic or biosimilar structured devices, and mechanical devices including micro- or nano-scale sensors and actuators.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126732449","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
K. Schmidt, H. Osaki, Kota Nishino, M. Sanchez, Chi-Chun Liu, Tsuyoshi Furukawa, C. Chi, J. Pitera, N. Felix, D. Sanders
In recent years major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCP). DSA is now widely regarded as a leading complementary patterning technique for future node integrated circuit (IC) device manufacturing and is considered for the 7 nm node. One of the most straightforward approaches for implementation of DSA is via patterning by graphoepitaxy. In this approach, the guiding pattern dictates the location and pitch of the resulting hole structures while the material properties of the BCP control the feature size and uniformity. Tight pitches need to be available for a successful implementation of DSA for future node via patterning which requires DSA in small guiding pattern CDs. Here, we show strategies how to enable the desired CD shrink in these small guiding pattern vias by utilizing high χ block copolymers and/or controlling the surface properties of the template, i.e. sidewall and bottom affinity to the blocks.
{"title":"Strategies to enable directed self-assembly contact hole shrink for tight pitches","authors":"K. Schmidt, H. Osaki, Kota Nishino, M. Sanchez, Chi-Chun Liu, Tsuyoshi Furukawa, C. Chi, J. Pitera, N. Felix, D. Sanders","doi":"10.1117/12.2219213","DOIUrl":"https://doi.org/10.1117/12.2219213","url":null,"abstract":"In recent years major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCP). DSA is now widely regarded as a leading complementary patterning technique for future node integrated circuit (IC) device manufacturing and is considered for the 7 nm node. One of the most straightforward approaches for implementation of DSA is via patterning by graphoepitaxy. In this approach, the guiding pattern dictates the location and pitch of the resulting hole structures while the material properties of the BCP control the feature size and uniformity. Tight pitches need to be available for a successful implementation of DSA for future node via patterning which requires DSA in small guiding pattern CDs. Here, we show strategies how to enable the desired CD shrink in these small guiding pattern vias by utilizing high χ block copolymers and/or controlling the surface properties of the template, i.e. sidewall and bottom affinity to the blocks.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125630353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Harumoto, H. Stokes, Yuji Tanaka, K. Kaneyama, C. Pieczulewski, M. Asai, I. Servin, M. Argoud, A. Gharbi, C. Lapeyre, R. Tiron, C. Monget
Directed Self-Assembly (DSA) is a well-known candidate for next generation sub-15nm half-pitch lithography. [1-2] DSA processes on 300mm wafers have been demonstrated for several years, and have given a strong impression due to finer pattern results. [3-4] On t he other hand, specific issues with DSA processes have begun to be clear as a result of these recent challenges. [5-6] Pattern placement error, which means the pattern shift after DSA fabrication, is recognized as one of these typical issues. Coat-Develop Track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performance.[4] In this study, the placement error was investigated using a simple contact-hole pattern and subsequent contact-hole shrink process implemented on the SOKUDO DUO track. Thus, we will show the placement error of contact-hole shrink using a DSA process and discuss the difference between DSA and other shrink methods.
{"title":"Investigation of coat-develop track system for placement error of contact hole shrink process","authors":"M. Harumoto, H. Stokes, Yuji Tanaka, K. Kaneyama, C. Pieczulewski, M. Asai, I. Servin, M. Argoud, A. Gharbi, C. Lapeyre, R. Tiron, C. Monget","doi":"10.1117/12.2219925","DOIUrl":"https://doi.org/10.1117/12.2219925","url":null,"abstract":"Directed Self-Assembly (DSA) is a well-known candidate for next generation sub-15nm half-pitch lithography. [1-2] DSA processes on 300mm wafers have been demonstrated for several years, and have given a strong impression due to finer pattern results. [3-4] On t he other hand, specific issues with DSA processes have begun to be clear as a result of these recent challenges. [5-6] Pattern placement error, which means the pattern shift after DSA fabrication, is recognized as one of these typical issues. Coat-Develop Track systems contribute to the DSA pattern fabrication and also influence the DSA pattern performance.[4] In this study, the placement error was investigated using a simple contact-hole pattern and subsequent contact-hole shrink process implemented on the SOKUDO DUO track. Thus, we will show the placement error of contact-hole shrink using a DSA process and discuss the difference between DSA and other shrink methods.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123609050","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nano-imprinting lithography (NIL) technology, as one of the most promising fabrication technologies, has been demonstrated to be a powerful tool for large-area replication up to wafer-level, with features down to nanometer scale. The cost of resists used for NIL is important for wafer-level large-area replication. This study aims to develop capabilities in patterning larger area structure using thermal NIL. The commercial available Poly (Methyl Methacrylate) (PMMA) and Polystyrene (PS) polymers possess a variety of characteristics desirable for NIL, such as low material cost, low bulkvolumetric shrinkage, high spin coating thickness uniformity, high process stability, and acceptable dry-etch resistance. PMMA materials have been utilized for positive electron beam lithography for many years, offering high resolution capability and wide process latitude. In addition, it is preferable to have a negative resist like PMMA, which is a simple polymer with low cost and practically unlimited shelf life, and can be dissolved easily using commercial available Propylene glycol methyl ether acetate (PGMEA) safer solvent to give the preferred film thickness. PS is such a resist, as it undergoes crosslinking when exposed to deep UV light or an electron beam and can be used for NIL. The result is a cost effective patterning larger area structure using thermal nano-imprint lithography (NIL) by using commercial available PMMA and PS ploymers as NIL resists.
{"title":"Nano-imprint lithography using poly (methyl methacrylate) (PMMA) and polystyrene (PS) polymers","authors":"Y. Ting, S. Shy","doi":"10.1117/12.2218594","DOIUrl":"https://doi.org/10.1117/12.2218594","url":null,"abstract":"Nano-imprinting lithography (NIL) technology, as one of the most promising fabrication technologies, has been demonstrated to be a powerful tool for large-area replication up to wafer-level, with features down to nanometer scale. The cost of resists used for NIL is important for wafer-level large-area replication. This study aims to develop capabilities in patterning larger area structure using thermal NIL. The commercial available Poly (Methyl Methacrylate) (PMMA) and Polystyrene (PS) polymers possess a variety of characteristics desirable for NIL, such as low material cost, low bulkvolumetric shrinkage, high spin coating thickness uniformity, high process stability, and acceptable dry-etch resistance. PMMA materials have been utilized for positive electron beam lithography for many years, offering high resolution capability and wide process latitude. In addition, it is preferable to have a negative resist like PMMA, which is a simple polymer with low cost and practically unlimited shelf life, and can be dissolved easily using commercial available Propylene glycol methyl ether acetate (PGMEA) safer solvent to give the preferred film thickness. PS is such a resist, as it undergoes crosslinking when exposed to deep UV light or an electron beam and can be used for NIL. The result is a cost effective patterning larger area structure using thermal nano-imprint lithography (NIL) by using commercial available PMMA and PS ploymers as NIL resists.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123712247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Yoshida, K. Yoshimoto, M. Ohshima, K. Kodera, Y. Naka, H. Kanai, S. Kobayashi, S. Maeda, Phubes Jiravanichsakul, Katsutoshi Kobayashi, H. Aoyama
In this study, we investigated a directed self-assembly (DSA) flow that could include a non-periodic pattern (i.e., wide line) lying in between the periodic line/space patterns, in a relatively simple and inexpensive way. A symmetric poly(styrene-block-methyl methacrylate) (PS-b-PMMA) with the natural periodicity (L0) of 30 nm was employed here. Our DSA flow has two key features. First, we used a hybrid approach that combined chemoepitaxy and graphoepitaxy methods to generate PMMA-attractive pinning guide patterns directly from ArF resist. Second, we attempted to utilize both the perpendicular lamellae in the periodic regions and the horizontal lamellae on the non-periodic pattern as an etch template. The advantage of this process will be a reduction of the number of lithographic processes, whereas the challenge is how to control the mixed morphologies at the boundary between the periodic and non-periodic regions. Our preliminary results from simulations and experiments showed that, in order to generate the horizontal lamellae on the non-periodic pattern, the PS-b-PMMA thickness on top of the non-periodic guide pattern should roughly match to ~1 L0, and the width of the non-periodic pattern should be larger than ~3-4 L0. In addition, the space between the periodic and non-periodic regions was found to be critical and it should be basically equal to the space between the guiding pins in the periodic regions (~75 nm) to minimize the formation of fingerprint morphology at the boundaries.
{"title":"Control of morphological defects at the boundary between the periodic and non-periodic patterns in directed self-assembly process","authors":"A. Yoshida, K. Yoshimoto, M. Ohshima, K. Kodera, Y. Naka, H. Kanai, S. Kobayashi, S. Maeda, Phubes Jiravanichsakul, Katsutoshi Kobayashi, H. Aoyama","doi":"10.1117/12.2218234","DOIUrl":"https://doi.org/10.1117/12.2218234","url":null,"abstract":"In this study, we investigated a directed self-assembly (DSA) flow that could include a non-periodic pattern (i.e., wide line) lying in between the periodic line/space patterns, in a relatively simple and inexpensive way. A symmetric poly(styrene-block-methyl methacrylate) (PS-b-PMMA) with the natural periodicity (L0) of 30 nm was employed here. Our DSA flow has two key features. First, we used a hybrid approach that combined chemoepitaxy and graphoepitaxy methods to generate PMMA-attractive pinning guide patterns directly from ArF resist. Second, we attempted to utilize both the perpendicular lamellae in the periodic regions and the horizontal lamellae on the non-periodic pattern as an etch template. The advantage of this process will be a reduction of the number of lithographic processes, whereas the challenge is how to control the mixed morphologies at the boundary between the periodic and non-periodic regions. Our preliminary results from simulations and experiments showed that, in order to generate the horizontal lamellae on the non-periodic pattern, the PS-b-PMMA thickness on top of the non-periodic guide pattern should roughly match to ~1 L0, and the width of the non-periodic pattern should be larger than ~3-4 L0. In addition, the space between the periodic and non-periodic regions was found to be critical and it should be basically equal to the space between the guiding pins in the periodic regions (~75 nm) to minimize the formation of fingerprint morphology at the boundaries.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131342868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Keisuke Yagawa, Kunihiro Ugajin, M. Suenaga, S. Kanamitsu, T. Motokawa, Kazuki Hagihara, Yukiyasu Arisawa, S. Kobayashi, M. Saito, Masamitsu Ito
Nanoimprint lithography (NIL) technology is in the spotlight as a next-generation semiconductor manufacturing technique for integrated circuits at 22 nm and beyond. NIL is the unmagnified lithography technique using template which is replicated from master templates. On the other hand, master templates are currently fabricated by electron-beam (EB) lithography[1]. In near future, finer patterns less than 15nm will be required on master template and EB data volume increases exponentially. So, we confront with a difficult challenge. A higher resolution EB mask writer and a high performance fabrication process will be required. In our previous study, we investigated a potential of photomask fabrication process for finer patterning and achieved 15.5nm line and space (L/S) pattern on template by using VSB (Variable Shaped Beam) type EB mask writer and chemically amplified resist. In contrast, we found that a contrast loss by backscattering decreases the performance of finer patterning. For semiconductor devices manufacturing, we must fabricate complicated patterns which includes high and low density simultaneously except for consecutive L/S pattern. Then it’s quite important to develop a technique to make various size or coverage patterns all at once. In this study, a small feature pattern was experimentally formed on master template with dose modulation technique. This technique makes it possible to apply the appropriate exposure dose for each pattern size. As a result, we succeed to improve the performance of finer patterning in bright field area. These results show that the performance of current EB lithography process have a potential to fabricate NIL template.
{"title":"Improvement of sub-20nm pattern quality with dose modulation technique for NIL template production","authors":"Keisuke Yagawa, Kunihiro Ugajin, M. Suenaga, S. Kanamitsu, T. Motokawa, Kazuki Hagihara, Yukiyasu Arisawa, S. Kobayashi, M. Saito, Masamitsu Ito","doi":"10.1117/12.2218809","DOIUrl":"https://doi.org/10.1117/12.2218809","url":null,"abstract":"Nanoimprint lithography (NIL) technology is in the spotlight as a next-generation semiconductor manufacturing technique for integrated circuits at 22 nm and beyond. NIL is the unmagnified lithography technique using template which is replicated from master templates. On the other hand, master templates are currently fabricated by electron-beam (EB) lithography[1]. In near future, finer patterns less than 15nm will be required on master template and EB data volume increases exponentially. So, we confront with a difficult challenge. A higher resolution EB mask writer and a high performance fabrication process will be required. In our previous study, we investigated a potential of photomask fabrication process for finer patterning and achieved 15.5nm line and space (L/S) pattern on template by using VSB (Variable Shaped Beam) type EB mask writer and chemically amplified resist. In contrast, we found that a contrast loss by backscattering decreases the performance of finer patterning. For semiconductor devices manufacturing, we must fabricate complicated patterns which includes high and low density simultaneously except for consecutive L/S pattern. Then it’s quite important to develop a technique to make various size or coverage patterns all at once. In this study, a small feature pattern was experimentally formed on master template with dose modulation technique. This technique makes it possible to apply the appropriate exposure dose for each pattern size. As a result, we succeed to improve the performance of finer patterning in bright field area. These results show that the performance of current EB lithography process have a potential to fabricate NIL template.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114548241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Pathangi, M. Stokhof, W. Knaepen, Varun Vaid, A. Mallik, B. T. Chan, N. Vandenbroeck, J. Maes, R. Gronheid
This manuscript first presents a cost model to compare the cost of ownership of DSA and SAQP for a typical front end of line (FEoL) line patterning exercise. Then, we proceed to a feasibility study of using a vertical furnace to batch anneal the block co-polymer for DSA applications. We show that the defect performance of such a batch anneal process is comparable to the process of record anneal methods. This helps in increasing the cost benefit for DSA compared to the conventional multiple patterning approaches.
{"title":"Improved cost-effectiveness of the block co-polymer anneal process for DSA","authors":"H. Pathangi, M. Stokhof, W. Knaepen, Varun Vaid, A. Mallik, B. T. Chan, N. Vandenbroeck, J. Maes, R. Gronheid","doi":"10.1117/12.2220043","DOIUrl":"https://doi.org/10.1117/12.2220043","url":null,"abstract":"This manuscript first presents a cost model to compare the cost of ownership of DSA and SAQP for a typical front end of line (FEoL) line patterning exercise. Then, we proceed to a feasibility study of using a vertical furnace to batch anneal the block co-polymer for DSA applications. We show that the defect performance of such a batch anneal process is comparable to the process of record anneal methods. This helps in increasing the cost benefit for DSA compared to the conventional multiple patterning approaches.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"2012 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114748913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
T. Matsumiya, Takehiro Seshimo, T. Kurosawa, H. Yamano, K. Miyagi, T. Yamada, K. Ohmori
Directed self-assembly (DSA) of block copolymers (BCPs) with conventional lithography is being thought as one of the potential patterning solution for future generation devices manufacturing. New BCP platform is required to obtain resolution below 10nm half pitch (HP), better roughness, and defect characteristics than PS-b-PMMA. In this study, we will introduce the newly developed Si-containing high chi BCP which can apply perpendicular lamellar orientation with topcoat free, mild thermal annealing under nitrogen process conditions. It will be also shown in experimental results of graphoepitaxy demonstration for L/S multiplication using new high chi BCP.
{"title":"Directed self-assembly of Si-containing and topcoat free block copolymer","authors":"T. Matsumiya, Takehiro Seshimo, T. Kurosawa, H. Yamano, K. Miyagi, T. Yamada, K. Ohmori","doi":"10.1117/12.2218243","DOIUrl":"https://doi.org/10.1117/12.2218243","url":null,"abstract":"Directed self-assembly (DSA) of block copolymers (BCPs) with conventional lithography is being thought as one of the potential patterning solution for future generation devices manufacturing. New BCP platform is required to obtain resolution below 10nm half pitch (HP), better roughness, and defect characteristics than PS-b-PMMA. In this study, we will introduce the newly developed Si-containing high chi BCP which can apply perpendicular lamellar orientation with topcoat free, mild thermal annealing under nitrogen process conditions. It will be also shown in experimental results of graphoepitaxy demonstration for L/S multiplication using new high chi BCP.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"36 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114013015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
M. Hanabata, S. Takei, Kigen Sugahara, S. Nakajima, Naoto Sugino, T. Kameda, J. Fukushima, Y. Matsumoto, A. Sekiguchi
A novel nanoimprint lithography process using disposable biomass template having gas permeability was investigated. It was found that a disposable biomass template derived from cellulose materials shows an excellent gas permeability and decreases transcriptional defects in conventional templates such as quartz, PMDS, DLC that have no gas permeability. We believe that outgasses from imprinted materials are easily removed through the template. The approach to use a cellulose for template material is suitable as the next generation of clean separation technology. It is expected to be one of the defect-less thermal nanoimprint lithographic technologies. It is also expected that volatile materials and solvent including materials become available that often create defects and peelings in conventional temples that have no gas permeability.
{"title":"Nanoimprint lithography using disposable biomass template","authors":"M. Hanabata, S. Takei, Kigen Sugahara, S. Nakajima, Naoto Sugino, T. Kameda, J. Fukushima, Y. Matsumoto, A. Sekiguchi","doi":"10.1117/12.2217483","DOIUrl":"https://doi.org/10.1117/12.2217483","url":null,"abstract":"A novel nanoimprint lithography process using disposable biomass template having gas permeability was investigated. It was found that a disposable biomass template derived from cellulose materials shows an excellent gas permeability and decreases transcriptional defects in conventional templates such as quartz, PMDS, DLC that have no gas permeability. We believe that outgasses from imprinted materials are easily removed through the template. The approach to use a cellulose for template material is suitable as the next generation of clean separation technology. It is expected to be one of the defect-less thermal nanoimprint lithographic technologies. It is also expected that volatile materials and solvent including materials become available that often create defects and peelings in conventional temples that have no gas permeability.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123499354","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Angélique Raley, S. Thibaut, N. Mohanty, Kal Subhadeep, Satoru Nakamura, Akiteru Ko, D. O'meara, K. Tapily, S. Consiglio, P. Biolsi
Multiple patterning integrations for sub 193nm lithographic resolution are becoming increasingly creative in pursuit of cost reduction and achieving desired critical dimension. Implementing these schemes into production can be a challenge. Aimed at reducing cost associated with multiple patterning for the 10nm node and beyond, we will present a self-aligned quadruple patterning strategy which uses 193nm immersion lithography resist pattern as a first mandrel and a spacer on spacer integration to enable a final pitch of 30nm. This option could be implemented for front end or back end critical layers such as Fin and Mx. Investigation of combinations of low temperature ALD films such as TiO, Al2O3 and SiO2 will be reviewed to determine the best candidates to meet the required selectivities, LER/LWR and CDs.
{"title":"Self-aligned quadruple patterning integration using spacer on spacer pitch splitting at the resist level for sub-32nm pitch applications","authors":"Angélique Raley, S. Thibaut, N. Mohanty, Kal Subhadeep, Satoru Nakamura, Akiteru Ko, D. O'meara, K. Tapily, S. Consiglio, P. Biolsi","doi":"10.1117/12.2219321","DOIUrl":"https://doi.org/10.1117/12.2219321","url":null,"abstract":"Multiple patterning integrations for sub 193nm lithographic resolution are becoming increasingly creative in pursuit of cost reduction and achieving desired critical dimension. Implementing these schemes into production can be a challenge. Aimed at reducing cost associated with multiple patterning for the 10nm node and beyond, we will present a self-aligned quadruple patterning strategy which uses 193nm immersion lithography resist pattern as a first mandrel and a spacer on spacer integration to enable a final pitch of 30nm. This option could be implemented for front end or back end critical layers such as Fin and Mx. Investigation of combinations of low temperature ALD films such as TiO, Al2O3 and SiO2 will be reviewed to determine the best candidates to meet the required selectivities, LER/LWR and CDs.","PeriodicalId":193904,"journal":{"name":"SPIE Advanced Lithography","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2016-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133699128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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