Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546338
Francesco Settino, T. Brandtner, V. Subotskaya, Antonio Levanto, M. Faricelli, F. Praemassing, Luca Della Ricca, Harald Koffler, P. Palestri, F. Crupi
In this paper a co-design methodology is proposed to investigate the crosstalk at package-level between the DC/DC converter and the sensitive analog-to-digital converter (ADC) analog input channels of a micro-controller for automotive applications. System-level simulations validated against measurement data confirm that the loop mutual inductance can be used to identify potential crosstalk issue via package nets coupling. Furthermore, a simulation approach at different levels of abstraction is proposed to estimate the rms-noise performance of the ADC when the DC/DC converter is enabled.
{"title":"Chip/Package/Board Co-Simulation Methodology for Crosstalk between DC/DC Converter and ADC Input Channels","authors":"Francesco Settino, T. Brandtner, V. Subotskaya, Antonio Levanto, M. Faricelli, F. Praemassing, Luca Della Ricca, Harald Koffler, P. Palestri, F. Crupi","doi":"10.1109/ESTC.2018.8546338","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546338","url":null,"abstract":"In this paper a co-design methodology is proposed to investigate the crosstalk at package-level between the DC/DC converter and the sensitive analog-to-digital converter (ADC) analog input channels of a micro-controller for automotive applications. System-level simulations validated against measurement data confirm that the loop mutual inductance can be used to identify potential crosstalk issue via package nets coupling. Furthermore, a simulation approach at different levels of abstraction is proposed to estimate the rms-noise performance of the ADC when the DC/DC converter is enabled.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123188885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546406
H. Nishikawa, Ryo Matsunobu
With the miniaturization of electronic productions and the use of heat sensitive electronic components,the traditional reflow soldering often has difficulties. As an alternativesoldering process, a laser reflow process has been recently proposed and a laser process has been introduced into the industry for practical use because of its unique properties such as localized and noncontact heating, rapid rise and fall in temperature, and ease of automation and robotization. However, there has been limited discussion for the basic phenomena and performance of the joints heated by this laser process. In this study, Sn-3.0 mass%Ag-0.5 mass% Cu solder and Sn-3.0 mass%Ag-0.5 Cu-0.1Ni solder balls with a diameter of 0.76 mm were used. Cu pads that had a thickness of 35 $mu$m and a diameter of 0.6 mm and were used as the substrate. The interfacial reaction between a Ni added solder and a Cu pad heated by laser process and the microstructure of soldered joint after heating and after isothermal aging was investigated. In the as-heated condition, a quite thin IMC layer was formed at the interface and Ni element was included in the IMC in the case of the laser process. It was found that the growth of Cu3 Sn layer between the Cu pad and Cu6 Sn5 layer during isothermal aging was suppressed in the case of Sn-Ag-Cu-Ni solder.
{"title":"Interfacial reaction of Sn-Ag-Cu-Ni solder/Cu joints by laser process","authors":"H. Nishikawa, Ryo Matsunobu","doi":"10.1109/ESTC.2018.8546406","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546406","url":null,"abstract":"With the miniaturization of electronic productions and the use of heat sensitive electronic components,the traditional reflow soldering often has difficulties. As an alternativesoldering process, a laser reflow process has been recently proposed and a laser process has been introduced into the industry for practical use because of its unique properties such as localized and noncontact heating, rapid rise and fall in temperature, and ease of automation and robotization. However, there has been limited discussion for the basic phenomena and performance of the joints heated by this laser process. In this study, Sn-3.0 mass%Ag-0.5 mass% Cu solder and Sn-3.0 mass%Ag-0.5 Cu-0.1Ni solder balls with a diameter of 0.76 mm were used. Cu pads that had a thickness of 35 $mu$m and a diameter of 0.6 mm and were used as the substrate. The interfacial reaction between a Ni added solder and a Cu pad heated by laser process and the microstructure of soldered joint after heating and after isothermal aging was investigated. In the as-heated condition, a quite thin IMC layer was formed at the interface and Ni element was included in the IMC in the case of the laser process. It was found that the growth of Cu3 Sn layer between the Cu pad and Cu6 Sn5 layer during isothermal aging was suppressed in the case of Sn-Ag-Cu-Ni solder.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116202793","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546352
G. Gadhiya, Birgit Brämer, S. Rzepka
A modular system of parametric FE models is created using ANSYS parametric design language (APDL) for automated virtual prototyping of current and future System-inPackage (SiP) solutions based on fan-out-wafer-level-packaging (FOWLP) technologies. The principles of the hierarchical architecture are described and instructive examples are given for all levels, i.e., from the part models to the four demonstrator packages. Further, the results of first simulations addressing the typical load case of temperature cycling between - 40 °C and 125 °C clearly demonstrate the validity of the approach as they agree to the experimental finding. The system of models is now applicable to a large variety of future SiP products based on FOWLP. It will allow virtual prototyping, i.e., replace time consuming experimental tests during the product definition phase.
{"title":"Automated Virtual Prototyping for Fastest Time-to-Market of New System in Package Solutions","authors":"G. Gadhiya, Birgit Brämer, S. Rzepka","doi":"10.1109/ESTC.2018.8546352","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546352","url":null,"abstract":"A modular system of parametric FE models is created using ANSYS parametric design language (APDL) for automated virtual prototyping of current and future System-inPackage (SiP) solutions based on fan-out-wafer-level-packaging (FOWLP) technologies. The principles of the hierarchical architecture are described and instructive examples are given for all levels, i.e., from the part models to the four demonstrator packages. Further, the results of first simulations addressing the typical load case of temperature cycling between - 40 °C and 125 °C clearly demonstrate the validity of the approach as they agree to the experimental finding. The system of models is now applicable to a large variety of future SiP products based on FOWLP. It will allow virtual prototyping, i.e., replace time consuming experimental tests during the product definition phase.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131931711","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546339
Shoude Chang, Yanguang Zhang, Badrou-Réda Aich, Ye Tao
In this paper, a compact testing system is developed to read/write a printed flexible FE (Ferroelectric) memory arrays and evaluate individual FE capacitors. Novel technologies, to the best of our knowledge, for random cell accessing, reading/writing,and analyzing are achieved. This compact system (both hardware and software) is controlled by LabVIEW program installed in a Laptop,and is essentially multi-functional and programmable. This system is designed for writing/reading FE memory cells, individually or in batch, as well as analyzing and displaying FE memory.
{"title":"Printed Flexible FE Memory Array Testing System","authors":"Shoude Chang, Yanguang Zhang, Badrou-Réda Aich, Ye Tao","doi":"10.1109/ESTC.2018.8546339","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546339","url":null,"abstract":"In this paper, a compact testing system is developed to read/write a printed flexible FE (Ferroelectric) memory arrays and evaluate individual FE capacitors. Novel technologies, to the best of our knowledge, for random cell accessing, reading/writing,and analyzing are achieved. This compact system (both hardware and software) is controlled by LabVIEW program installed in a Laptop,and is essentially multi-functional and programmable. This system is designed for writing/reading FE memory cells, individually or in batch, as well as analyzing and displaying FE memory.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132026151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546386
S. Liang, Xin-Ping Zhang, C. Wei, C. Ke, Changqing Liu
orientations of β-Sn grains have a big influence on the thermo-mechanical behavior of the microbump interconnect due to the obvious anisotropic features of thermal expansion coefficient (CTE) and elastic stiffness of β-Sn, especially with the dramatic decrease in the feature size of 3D ICs in electronics. Simultaneously, the elastic energy, induced by the deformation of grains with different orientations, can affect the grain morphology evolution during thermal cycling. Thus, some new concerns of reliability of the microbump interconnect are emerging due to the anisotropic behavior. In this study, dynamic evolution of grain morphology of the Cu/Sn/Cu microbump interconnect during thermal cycling is simulated using the phase field model, which incorporates the effects of temperature and elastic deformation energy in the grains induced by the thermal stress. The influence of the elastic and CTE anisotropy of β-Sn on the thermo-mechanical behavior of microbump interconnects with different grain morphologies is investigated, and the interaction effects of grain morphology evolution and thermo-mechanical behavior in the microbump interconnect are studied, with focus on the variations of the average diameter and average von Mises stress of β-Sn grains with different orientations in the solder of the microbump interconnect.
{"title":"Interaction effects between the preferred growth of β-Sn grains and thermo-mechanical response in microbump interconnects under thermal cycling","authors":"S. Liang, Xin-Ping Zhang, C. Wei, C. Ke, Changqing Liu","doi":"10.1109/ESTC.2018.8546386","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546386","url":null,"abstract":"orientations of β-Sn grains have a big influence on the thermo-mechanical behavior of the microbump interconnect due to the obvious anisotropic features of thermal expansion coefficient (CTE) and elastic stiffness of β-Sn, especially with the dramatic decrease in the feature size of 3D ICs in electronics. Simultaneously, the elastic energy, induced by the deformation of grains with different orientations, can affect the grain morphology evolution during thermal cycling. Thus, some new concerns of reliability of the microbump interconnect are emerging due to the anisotropic behavior. In this study, dynamic evolution of grain morphology of the Cu/Sn/Cu microbump interconnect during thermal cycling is simulated using the phase field model, which incorporates the effects of temperature and elastic deformation energy in the grains induced by the thermal stress. The influence of the elastic and CTE anisotropy of β-Sn on the thermo-mechanical behavior of microbump interconnects with different grain morphologies is investigated, and the interaction effects of grain morphology evolution and thermo-mechanical behavior in the microbump interconnect are studied, with focus on the variations of the average diameter and average von Mises stress of β-Sn grains with different orientations in the solder of the microbump interconnect.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132059851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546448
C. Johnston, F. Piallat
As new technology application devices are relied upon for our safety, security, ease of life and wellbeing, the reliability of such devices is imperative. Devices with unfailing performance are critical to create trustworthy and smarter solutions. The adoption of these devices to “out-of-the-box” applications brings new packaging challenges as devices must withstand and perform in a wide range of physical and environmental conditions. By a virtuous circle, dependence on these solutions will grow as they are increasingly trusted upon for our health, safety, security and to improve our way of life.
{"title":"Defect-Free Dicing for Higher Device Reliability","authors":"C. Johnston, F. Piallat","doi":"10.1109/ESTC.2018.8546448","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546448","url":null,"abstract":"As new technology application devices are relied upon for our safety, security, ease of life and wellbeing, the reliability of such devices is imperative. Devices with unfailing performance are critical to create trustworthy and smarter solutions. The adoption of these devices to “out-of-the-box” applications brings new packaging challenges as devices must withstand and perform in a wide range of physical and environmental conditions. By a virtuous circle, dependence on these solutions will grow as they are increasingly trusted upon for our health, safety, security and to improve our way of life.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134399842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546403
R. Metasch, K. Meier, M. Roellig
The authors have realized a measurement approach for the determination of thermal-mechanical characteristics of real silver-sinter joints under shear load conditions. The paper present the developed and optimized measurement setup and the manufacturing process of the lap shear based specimen with a comparatively very high stand-off of one Ag-sinter joint. Further the performed characterization routine which allows the determination of time, temperature and process depended mechanical characteristics. With the successfully produced specimen samples a first cyclic deformation experiment were carried out. For this purpose one sample were loaded with constant deformation speeds between $0.01 mu mathrm{m} /mathrm{s}$ and $1 mu mathrm{m} /mathrm{s}$ to amplitudes of $pm 3 mu mathrm{m}$. With increasing temperatures up to 200°C the measured forces amplitudes decrease and the force-displacement-hystereses show an increasingly ductile deformation behaviour.
实现了一种测定剪切载荷条件下真实银烧结接头热力学特性的测量方法。本文介绍了开发和优化的一个银烧结接头具有较高间隙的搭接剪切基试样的测量装置和制造过程。进一步执行表征程序，允许确定时间，温度和工艺依赖的机械特性。利用成功制作的试样进行了第一次循环变形试验。为此，一个样品在$0.01 mu mathrm{m} /mathrm{s}$和$1 mu mathrm{m} /mathrm{s}$之间加载恒定变形速度，振幅为$pm 3 mu mathrm{m}$。随着温度升高至200℃，测得的力幅值减小，力-位移-滞后表现出越来越强的延性变形行为。
{"title":"Thermo-Mechanical Measurement Approach of Ag-sintered Joints for Power Electronics","authors":"R. Metasch, K. Meier, M. Roellig","doi":"10.1109/ESTC.2018.8546403","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546403","url":null,"abstract":"The authors have realized a measurement approach for the determination of thermal-mechanical characteristics of real silver-sinter joints under shear load conditions. The paper present the developed and optimized measurement setup and the manufacturing process of the lap shear based specimen with a comparatively very high stand-off of one Ag-sinter joint. Further the performed characterization routine which allows the determination of time, temperature and process depended mechanical characteristics. With the successfully produced specimen samples a first cyclic deformation experiment were carried out. For this purpose one sample were loaded with constant deformation speeds between $0.01 mu mathrm{m} /mathrm{s}$ and $1 mu mathrm{m} /mathrm{s}$ to amplitudes of $pm 3 mu mathrm{m}$. With increasing temperatures up to 200°C the measured forces amplitudes decrease and the force-displacement-hystereses show an increasingly ductile deformation behaviour.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128907971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546434
M. C. Ubaldi
High coherence telecom systems and more recently data center applications require tunable external cavity lasers with very narrow linewidth and reliability over whole device lifetime. Tunability by using Liquid Crystal on Silicon component is a desirable approach with no moving part, able to grant linewidth lower than 100 KHz and Telcordia qualifiable devices. The use of subassemblies built up in parallel, together with a cheap glue-based fixing technique is attractive due to its orientation towards high volume industrial production. The issue of incomplete glue cross-linking when using curing temperatures lower than liquid crystal clearing temperature is demonstrated through a low-cost experimental approach, and a solution is given, sustained by Avrami-Erofe’ev kinetic model.
{"title":"Reliability Considerations in Discrete Optics External Cavity Tunable Laser Assemblies","authors":"M. C. Ubaldi","doi":"10.1109/ESTC.2018.8546434","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546434","url":null,"abstract":"High coherence telecom systems and more recently data center applications require tunable external cavity lasers with very narrow linewidth and reliability over whole device lifetime. Tunability by using Liquid Crystal on Silicon component is a desirable approach with no moving part, able to grant linewidth lower than 100 KHz and Telcordia qualifiable devices. The use of subassemblies built up in parallel, together with a cheap glue-based fixing technique is attractive due to its orientation towards high volume industrial production. The issue of incomplete glue cross-linking when using curing temperatures lower than liquid crystal clearing temperature is demonstrated through a low-cost experimental approach, and a solution is given, sustained by Avrami-Erofe’ev kinetic model.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131881266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/estc.2018.8546380
B. Albrecht, G. Alavi, Mourad Elsobky, S. Ferwana, U. Passlack, C. Harendt, J. Burghartz
{"title":"Multi-Chip Patch in Low Stress Polymer Foils based on an Adaptive Layout for Flexible Sensor Systems","authors":"B. Albrecht, G. Alavi, Mourad Elsobky, S. Ferwana, U. Passlack, C. Harendt, J. Burghartz","doi":"10.1109/estc.2018.8546380","DOIUrl":"https://doi.org/10.1109/estc.2018.8546380","url":null,"abstract":"","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115527787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ESTC.2018.8546411
O. Krammer, T. Hurtony
In our research the fine microstructure was compared between manganese-doped SnAgCuand traditional SAC305 (Sn96.5/Ag3/Cu0.5) solder alloys. The composition of the manganese-doped alloys was (Sn/Ag0.3/Cu0.7/Mn-x), where x is 0.1, 0.4, 0.7% wt%Solder bumps were prepared on FR4 testboards with reflow soldering technology. After the soldering, cross-sections of the samples were prepared and were investigated by Scanning Electron Microscopy. Backscattered Electrons detector was utilised and EDX (energy-dispersive Xray spectroscopy) analysis were performed. Samples were etched with selective electrochemical etching in order to reveal the fine microstructure of the samples prepared from the conventional and from manganese-doped SAC alloys. It was found that precipitates with relatively high Mn formed in the solder joint, which can influence the mechanical properties of the solder bulk. The manganese altered the formation of Cu-Sn intermetallic compounds, which were formed in very sharp, needle-like structures Additionally, particle-type Ag3 Sn intermetallic compounds readily formed next to the Mn precipitates; they are not distributed uniformly in the solder bulk at all.
{"title":"Investigating the Fine Microstructure of Mn-doped SnAgCu Solder Alloys by Selective Electrochemical Etching","authors":"O. Krammer, T. Hurtony","doi":"10.1109/ESTC.2018.8546411","DOIUrl":"https://doi.org/10.1109/ESTC.2018.8546411","url":null,"abstract":"In our research the fine microstructure was compared between manganese-doped SnAgCuand traditional SAC305 (Sn96.5/Ag3/Cu0.5) solder alloys. The composition of the manganese-doped alloys was (Sn/Ag0.3/Cu0.7/Mn-x), where x is 0.1, 0.4, 0.7% wt%Solder bumps were prepared on FR4 testboards with reflow soldering technology. After the soldering, cross-sections of the samples were prepared and were investigated by Scanning Electron Microscopy. Backscattered Electrons detector was utilised and EDX (energy-dispersive Xray spectroscopy) analysis were performed. Samples were etched with selective electrochemical etching in order to reveal the fine microstructure of the samples prepared from the conventional and from manganese-doped SAC alloys. It was found that precipitates with relatively high Mn formed in the solder joint, which can influence the mechanical properties of the solder bulk. The manganese altered the formation of Cu-Sn intermetallic compounds, which were formed in very sharp, needle-like structures Additionally, particle-type Ag3 Sn intermetallic compounds readily formed next to the Mn precipitates; they are not distributed uniformly in the solder bulk at all.","PeriodicalId":198238,"journal":{"name":"2018 7th Electronic System-Integration Technology Conference (ESTC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115744417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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