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2018 7th Electronic System-Integration Technology Conference (ESTC)最新文献

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Control for Au-Ag Nanoporous Structure by Electrodeposition and Dealloying 电沉积和合金化控制Au-Ag纳米孔结构
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546350
M. Saito, J. Mizuno, Shunichi Koga, H. Nishikawa
We investigated the composition, morphology, and dissolution behavior of an Au-Ag nanoporous structure formed by electrodeposition and dealloying. Formation of the films was carried out by changing the bath composition and the annealing temperature. The amount of Ag decreased from 70 wt. % to 45–50 wt. % after dealloying. As seen from analysis by a glow discharge optical emission spectrometer (GDOES), not only the amount of Ag, but also that of Au was decreased after dealloying, and a highly concentrated Ag layer was generated at the surface. When the Ag dissolves, an underpotential deposition (UPD) might be introduced, followed by the generation of a high concentration of Ag. From the anodic polarization measurement, the anodic current densities of the samples under 1.5 V were larger than those of the samples under 1.0 V, resulting in the generation of many nanopores. It was confirmed that dealloying involved three processes: whole film dissolution (includes Au dissolution), defects dissolution at the grain boundary, and Ag-selective dissolution.
我们研究了电沉积和合金化形成的Au-Ag纳米孔结构的组成、形貌和溶解行为。通过改变镀液成分和退火温度,实现了薄膜的形成。合金化后,银含量从70 wt. %下降到45 ~ 50 wt. %。通过辉光发射光谱仪(GDOES)分析,合金除银的含量减少外,金的含量也减少,表面形成了一层高浓度的银层。当银溶解时,可能会引入欠电位沉积(UPD),随后会产生高浓度的银。从阳极极化测量来看,1.5 V下样品的阳极电流密度大于1.0 V下样品的阳极电流密度,导致产生许多纳米孔。结果表明,合金的溶出过程包括三个过程:全膜溶出(包括Au溶出)、晶界缺陷溶出和ag选择性溶出。
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引用次数: 1
Applying Sintering and SLID Bonding for Assembly of GaN Chips Working at High Temperatures 烧结与滑动键合在高温GaN芯片组装中的应用
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546475
M. Myśliwiec, R. Kisiel
In this paper assembly techniques of monocrystalline GaN structures to DBC: sintering and hybrid: sintering + SLID are compared. As an comparison technique shear strength measurements was applied. Study was made on as-received samples, as well as structures aged in temperature above 300 °C for 500 h. Additionally metallographic cross-section of the joints were made and inspected by means of SEM and energy dispersive x-ray spectroscopy. Sintered joints are very porous and does not meet demands for assembly after long term ageing. Hybrid: sintering + SLID joints manufactured at 280 °C are far less porous and fulfil adhesion joint requirements for monocrystalline GaN assembly with excess.
本文比较了单晶GaN结构的DBC烧结和杂化烧结+ slide组装技术。作为对比技术,采用了抗剪强度测量。对接收样品和300℃以上时效500 h的组织进行了研究,并对接头的金相截面进行了扫描电镜和能量色散x射线能谱分析。烧结接头多孔性强,长期老化后不能满足装配要求。混合:烧结+滑动接头在280°C下制造的多孔性要小得多,并且满足单晶GaN组装的粘合接头要求。
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引用次数: 4
Flip-chip Die Attachment for High-temperature Pressure Sensor Packages up to 500 °C 倒装芯片芯片附件高温压力传感器封装高达500°C
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546394
N. Subbiah, Qingming Feng, K. Ramirez, N. Feil, J. Wilde, G. Bruckner
Pressure sensors working at temperatures of about 500 °C impose new challenges in packaging due to thermal cross- sensitivity and temperature induced stresses on the package. One of the major issues is the identification of stress-tolerant sensor mounting technique with stable materials at high temperature. This research-based work will mainly focus on developing a flip-chip die attachment technique for pressure sensor assembly for applications up to 500 °C. A concept for this application was developed based on a deforming ceramic membrane. A micro- strain gauge is patterned onto a Langasite (LGS) crystal. It is attached to a ceramic substrate with a membrane (Al2O3) like a cantilever by flip-chip interconnection and glass. The deforming membrane induces a pressure dependent displacement at the free end of the cantilever. The strain produced on the cantilever is measured by the change of resistance of the microstrain gauge. This special design concept aims for the elimination of thermal stresses by having no constraints for thermal expansion at the free end of the cantilever. LGS is a well-established material for Surface Acoustic Wave (SAW) based applications. Later this resistive strain gauge could be replaced by a SAW delay line. In order to mount the sensing element like a cantilever, one side of the LGS strain gauge chip is fabricated with gold stud bumps on its contact pads. Additionally, the flip-chip attachment is underfilled with glass solder and cured at 780 °C. Due to the high process temperature and anisotropic Thermal Coefficient of Expansion (TCE) of the LGS crystal it will tend to expand. By allowing it to expand freely at one end, the potential thermal stresses developed in the package is reduced. In this paper, processes to develop high temperature stable flip-chip die attachment using stud bumps and glass solder underfill is presented. The free expansion of the LGS crystal at its free end is determined using Digital Image Correlation (DIC) technique for temperatures up to 500 °C. With the same construction, a Lithiumniobate (LN) crystal is also introduced for applications up to 300 °C. The thermal expansion behavior of the die attachment is characterized using DIC. Strength of the cantilever die attachment is measured using shear tests and results are presented.
由于热交叉敏感和温度引起的应力,工作在约500°C温度下的压力传感器对封装提出了新的挑战。其中一个主要问题是确定高温下稳定材料的耐应力传感器安装技术。这项基于研究的工作将主要集中在开发一种倒装芯片芯片连接技术,用于高达500°C的应用压力传感器组件。该应用的概念是基于变形陶瓷膜开发的。在Langasite (LGS)晶体上刻印了一个微应变计。它是通过倒装芯片与玻璃互连,用薄膜(Al2O3)像悬臂一样附着在陶瓷基板上。变形的薄膜在悬臂梁的自由端引起压力相关的位移。通过微应变计的电阻变化来测量悬臂梁上产生的应变。这种特殊的设计理念旨在通过在悬臂的自由端没有热膨胀的限制来消除热应力。LGS是一种基于表面声波(SAW)应用的成熟材料。后来,这种电阻应变计可以由SAW延迟线代替。为了像悬臂一样安装传感元件,LGS应变计芯片的一侧在其接触垫上制造了金螺柱凸起。此外,倒装芯片附件用玻璃焊料填充,并在780°C下固化。由于高的工艺温度和各向异性的热膨胀系数(TCE), LGS晶体会趋于膨胀。通过允许它在一端自由膨胀,减少了封装中产生的潜在热应力。本文介绍了利用螺柱凸点和玻璃钎料下填充来开发高温稳定倒装芯片附件的工艺。使用数字图像相关(DIC)技术在温度高达500°C时确定LGS晶体自由端的自由膨胀。具有相同的结构,铌酸锂(LN)晶体也引入了高达300°C的应用。利用DIC对模具附件的热膨胀行为进行了表征。采用剪切试验的方法对悬臂模具附件的强度进行了测量,并给出了测试结果。
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引用次数: 2
Implementation of 3D gesture control system for environmental control 实现了用于环境控制的三维手势控制系统
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546342
Madalin Moise, A. Mazare, P. Svasta
The paper presents an explicit and complete implementation of a platform which includes an embedded system and the software necessary to recognize hand gestures on the basis of which an environment is controlled. The platform is developed using an ATmega328P controller and it is based on active infrared (IR) proximity sensor. The proposed platform will be used to detect hand gesture and also approximate the distance with a higher accuracy. This deployment provides the beginner developer with a platform for understanding, testing and learning the concepts of an embedded system, human machine interface (HMI) and a closed loop controller that works in real time. The experimental results were obtained using four active infrared (IR) proximity sensor, a temperature sensor, a buzzer and a relay, all connected to the Atmega328P microcontroller. They are used to demonstrate the functionality of the platform. The main purpose is realization of a reliable gesture sensor which is easy to build and understand, also facilitating future improvements and capabilities.
本文提出了一个明确而完整的平台实现,该平台包括一个嵌入式系统和识别手势所需的软件,在此基础上控制环境。该平台采用ATmega328P控制器开发,基于主动红外(IR)接近传感器。所提出的平台将用于检测手势,并以更高的精度近似距离。此部署为初学者开发人员提供了一个平台,用于理解,测试和学习嵌入式系统,人机界面(HMI)和实时工作的闭环控制器的概念。实验结果采用四个主动红外(IR)接近传感器、一个温度传感器、一个蜂鸣器和一个继电器,全部连接到Atmega328P微控制器上。它们用于演示平台的功能。主要目的是实现一个可靠的手势传感器,易于构建和理解,也便于未来的改进和功能。
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引用次数: 0
Heat Capacitive PCB 热容式PCB
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546379
J. Sousa, Sabine Liebfahrt, B. Reitmaier, Maria Prutti, Bernd Schuscha, Q. Tao, J. Nicolics, M. Unger, P. Fulmek
This paper describes a heat capacitive PCB concept where phase change materials (PCMs) embedded in an epoxy resin matrix is used. A heat dissipating component is installed on the surface of the PCB containing phase change material filled cavities. During phase change, part of the dissipated heat is absorbed by the PCB with the effect of reducing the operational temperature for the component and expanding the time until the system has reached steady state maximum temperature.
本文描述了一种热容性PCB概念,其中相变材料(PCMs)嵌入环氧树脂基体中。在含有相变材料填充空腔的PCB表面上安装散热元件。在相变过程中,部分散失的热量被PCB吸收,从而降低了组件的工作温度,并延长了系统达到稳态最高温度的时间。
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引用次数: 0
Numerical estimation of localized transient temperature and strain fields in soldering process 焊接过程局部瞬态温度场和应变场的数值估计
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546365
A. Satheesh, Midhun Kattisseri, V. Vijayan
Selective soldering is ubiquitous in electronic manufacturing industry for the soldering of through-hole components on printed circuit boards. During the process the PCB and components are subjected to high temperatures and induced thermal strains. Accurate estimation and monitoring of these temperatures and strains is necessary since it can lead to failure of SMD components, ceramic chip capacitors in particular.Finite element analysis in industry uses a two-step methodology to predict the maximum strains during this process. A transient thermal analysis is carried out for the estimation of temperature profiles away from the nozzle region. Input for this analysis is the temperature load profile that is applied over an approximate area where the nozzle comes in contact with PCB. Temperature contours from this analysis is used as an input for static structural analysis for the determination of maximum strains induced in the PCB. These maximum strains are compared with the strain limits of the ceramic chip capacitors which are most susceptible to failure. One of the drawbacks in this approach is direct application of temperature loads in the pin region on the PCB leading to over-prediction of local thermal strains. In reality, the solder establishes contact with the PCB through capillary action and transfers heat circumferentially while it fills the annular cavity between pin and PCB.In this work, solder filling is modeled by element birth and death technique. Temperature dependent material properties are used to model the phase change of solder in the process. An uncoupled transient thermo-mechanical finite element analysis in ANSYS is carried out for the evaluation of transient temperature, strain and stress fields.
选择性焊接在电子制造业中普遍存在,用于印刷电路板上通孔元件的焊接。在此过程中,PCB和组件受到高温和诱发热应变。准确估计和监测这些温度和应变是必要的,因为它可能导致SMD组件,特别是陶瓷芯片电容器的故障。工业上的有限元分析采用两步法来预测这一过程中的最大应变。为了估计远离喷嘴区域的温度分布,进行了瞬态热分析。该分析的输入是施加在喷嘴与PCB接触的近似区域上的温度负荷曲线。从这个分析得到的温度轮廓被用作静态结构分析的输入,以确定PCB中引起的最大应变。这些最大应变与最容易失效的陶瓷片电容器的应变极限进行了比较。这种方法的缺点之一是直接在PCB上的引脚区域施加温度载荷,导致对局部热应变的过度预测。实际上,焊料通过毛细管作用与PCB建立接触,并在填充引脚和PCB之间的环形腔时沿周向传递热量。在这项工作中,焊料填充采用元素生与死技术建模。温度相关的材料特性被用来模拟焊接过程中焊料的相变。在ANSYS中进行了非耦合的瞬态热-力有限元分析,以评估瞬态温度场、应变场和应力场。
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引用次数: 4
Corrosion mechanism in metallization systems for printed circuit boards 印刷电路板金属化系统中的腐蚀机理
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546401
S. Klengel, T. Stephan, Bolko Mühs-Portius, R. Klengel
This paper presents and discusses the results for electrochemical corrosion testing in comparison to mixed flow gas testing (MFG) and salt spray testing for metallization systems of printed circuit boards. High resolution microstructural analyses are giving evidence for the running corrosion mechanism. We will show results of Scanning Electron Microscopy (SEM) and element analyses (EDS) for samples after standard testing and after applying an electrochemical test method. Additionally, also black pad formation will be studied by microstructural analyses and electrochemical testing.
本文介绍并讨论了电化学腐蚀试验与混合流气体试验和盐雾试验对印刷电路板金属化系统的影响。高分辨率显微组织分析为运行腐蚀机理提供了证据。我们将展示标准测试和应用电化学测试方法后样品的扫描电子显微镜(SEM)和元素分析(EDS)结果。此外,还将通过微观结构分析和电化学测试来研究黑垫的形成。
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引用次数: 0
Development of PEB Face-Down Interconnect Process for Wearable Device 可穿戴设备PEB面朝下互连工艺的开发
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546418
Jae Hak Lee, C. Lee, Y. J. Kim, S. Kim, J. Song
System in Foil (SiF) package could realize flexible, multi-functional and higher performance package using flexible substrate and ultra-thin heterogeneous chip integration. In this study, PEB(polymer elastic bump) bonding process is suggested newly, whichcould reduce stress concentration remarkably near bump and chip face by soft polymer bump material with electroconductive metal linepattern and usage of NCF(non-conductive adhesive film) and also lower bonding temperature during facedown interconnect process between flexible substrate and ultrathin chip. Compared to conventional bonding process by metal bumps, it improves flexibility of package because PEB is softer than metal bump and NCF adhesive film keeps mechanical contact between PEB and pad. Elastic deformation and restoration behavior of PEB bump during bonding process are investigated using FEM analysis to calculate bump-to-pad contact area related to electrical contact resistance. Through experiments PEB fabrication process is developed using thermal reflow process and spiraltype and spoke type PEB are developed in order to solve the Au cap metal line crack problem due to excessive deformation of PEB. We find optimal bonding conditions and effect of bonding parameters.
System in Foil (SiF)封装利用柔性衬底和超薄异质芯片集成实现了柔性、多功能和更高性能的封装。本研究提出了一种新的PEB(聚合物弹性凸点)键合工艺,采用具有导电金属线型的软质聚合物凸点材料和非导电胶膜,可以显著降低凸点和芯片表面附近的应力集中,并降低柔性衬底与超薄芯片面朝下互连过程中的键合温度。与传统的金属碰撞粘接工艺相比,由于PEB比金属碰撞更柔软,NCF胶膜使PEB与衬垫之间保持机械接触,从而提高了封装的灵活性。采用有限元分析方法计算了与接触电阻相关的碰触面积,研究了PEB碰触在粘接过程中的弹性变形和恢复行为。通过实验,开发了热回流法制备PEB的工艺,开发了螺旋型和辐条型PEB,解决了由于PEB变形过大导致的Au帽金属线裂纹问题。我们找到了最佳的键合条件和键合参数的影响。
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引用次数: 1
Multilayer plastic substrate for electronics 电子产品用多层塑料衬底
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546335
Arttu Huttunen, Timo Kurkela, Kaisa-Leena Väisänen, E. Juntunen
This work demonstrates the making of four-layer wiring design on a flexible plastic substrate by laminating together individualprinted sheets. Overmolding of the device into plastic is also experimented. In printed electronics, multilayer wiring is oftenavoided because of the technological difficulties in making several conductor layers. Yet many electrical designs require multiple layersand are therefore out of reach for printed and plastic electronics. In this work, multilayer wiring in the form of four-layer laminated structure was studied. Via filling in plastic foils was studied with different silver based pastes and it was found that most pastes fill vias well while simultaneously printing the wiring. Method for making multilayer boards by laminating polymer sheetstogether was explored by testing a range of plastic materials for their lamination adhesion and then producing a test structure on polyethylene terephthalate (PET) with wiring running through the substrate. Finally, this demo device with LED components was overmolded with thermoplastic polyurethane (TPU) to form a sealed structure with integrated lenses for LEDs. The final structure is sealed,flexible and transparent, which is desirable for example in display applications.
这项工作展示了在柔性塑料基板上通过层压单独的印刷板来制作四层布线设计。还对该装置的塑料复模进行了实验。在印刷电子产品中,多层布线通常是避免的,因为在制造多个导体层方面存在技术困难。然而,许多电气设计需要多层,因此印刷和塑料电子产品无法达到。本文对四层叠层结构形式的多层布线进行了研究。研究了不同银基浆料在塑料薄膜上的通孔填充,发现大多数浆料在印刷布线的同时都能很好地填充通孔。通过测试一系列塑料材料的层压附着力,然后在聚对苯二甲酸乙二醇酯(PET)上制作一个测试结构,并在基板上布线,探索了通过聚合物片层压制成多层板的方法。最后,用热塑性聚氨酯(TPU)覆盖这个带有LED组件的演示装置,形成一个带有LED集成透镜的密封结构。最终结构是密封的,灵活的和透明的,这是理想的,例如在显示应用中。
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引用次数: 3
Characterization of Moisture Uptake in Microelectronics Packaging Materials 微电子封装材料吸湿特性研究
Pub Date : 2018-09-01 DOI: 10.1109/ESTC.2018.8546489
Fabian Huber, H. Etschmaier, A. Wolfberger, A. Singulani, P. Hadley
Moisture uptake of materials, used in optoelectronic sensor packaging for the purpose of component attach or for encapsulation, is investigated. The diffusion behavior of these mostly epoxide-based polymer compounds is characterized under various temperature and humidity loads and described using analytical models. The water uptake during soak tests was determined and the data can be fit assuming multistep diffusion behavior. It is assumed that this behavior can be assigned to the formation of hydrogen bonds and moisture absorption in the free volume of the polymer matrix [1]. To investigate this assumption further, in addition to gravimetric methods, the evolution of the O-H stretch modes are measured by Attenuated Total Reflection Fourier Transform Infrared Spectroscopy (ATR-FTIR).
研究了光电传感器封装中用于组件附加或封装的材料的吸湿性。这些主要以环氧化物为基础的聚合物化合物在不同温度和湿度载荷下的扩散行为进行了表征,并使用分析模型进行了描述。测定了浸渍试验的吸水率,并在多步扩散条件下拟合数据。假设这种行为可以归因于氢键的形成和聚合物基体自由体积中的吸湿作用[1]。为了进一步验证这一假设,除了采用重量法,还采用衰减全反射傅立叶变换红外光谱(ATR-FTIR)测量了O-H拉伸模式的演变。
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引用次数: 1
期刊
2018 7th Electronic System-Integration Technology Conference (ESTC)
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