Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012434
R. Sommet, D. Lopez, R. Quéré
As the size of the semiconductor devices is getting smaller and as the power density is getting higher with advanced technology, self-heating effects in power devices are becoming important. Electrothermal models of whole power devices are necessary for an accurate analysis of their performances. This paper deals with the integration of a reduced thermal model based on a three-dimensional finite element (FE) thermal simulation into circuit simulator for an accurate prediction of the electrothermal behavior of power devices. The reduced thermal model based on the Ritz vectors approach can be easily implemented in any kind of circuit simulator because it is described by a SPICE format subcircuit. The model has been successfully experimented with the Advanced Design Simulator (ADS). Electrical based thermal measurements of transient temperature response have successfully validated the approach. Coupled to a distributed electrical model, this electrothermal model has been used in order to simulate the instability phenomenon known as "the current collapse phenomenon" which can occur in multi-finger heterojunction bipolar transistors (HBTs).
{"title":"From 3D thermal simulation of HBT devices to their thermal model integration into circuit simulators via Ritz vectors reduction technique","authors":"R. Sommet, D. Lopez, R. Quéré","doi":"10.1109/ITHERM.2002.1012434","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012434","url":null,"abstract":"As the size of the semiconductor devices is getting smaller and as the power density is getting higher with advanced technology, self-heating effects in power devices are becoming important. Electrothermal models of whole power devices are necessary for an accurate analysis of their performances. This paper deals with the integration of a reduced thermal model based on a three-dimensional finite element (FE) thermal simulation into circuit simulator for an accurate prediction of the electrothermal behavior of power devices. The reduced thermal model based on the Ritz vectors approach can be easily implemented in any kind of circuit simulator because it is described by a SPICE format subcircuit. The model has been successfully experimented with the Advanced Design Simulator (ADS). Electrical based thermal measurements of transient temperature response have successfully validated the approach. Coupled to a distributed electrical model, this electrothermal model has been used in order to simulate the instability phenomenon known as \"the current collapse phenomenon\" which can occur in multi-finger heterojunction bipolar transistors (HBTs).","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126118491","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012485
S. Heffington, W. Black, A. Glezer
This paper describes a unique two-phase cooling method that includes a closed heat transfer cell, similar to a thermosyphon that can be used to cool microelectronic packages. The cooling method is based upon a Vibration-Induced Droplet Atomization, or VIDA, process that can generate small liquid droplets inside a closed cell and propel them onto a heated surface. The VIDA technique involves the violent break-up of a liquid film into a shower of droplets by vibrating a piezoelectric actuator and accelerating the liquid film at resonant conditions. The droplets continually coat the surface with a thin liquid film, which evaporates on the heated surface, and the vapor is condensed on the internal surfaces of the heat transfer cell as well as the liquid working fluid. The condensed liquid is returned via gravity to the piezoelectric actuator where it is again atomized. A VIDA heat transfer cell 50 mm in diameter and 20 mm thick was constructed. Test data described in this study include the heat transfer characteristics and cooling capabilities for a small-scale cell that is suitable for cooling a desktop microprocessor during the burn-in portion of the manufacturing process. The VIDA process produces droplets of relatively uniform diameter, and the droplets have sufficient momentum to reach the remotely located heated source. Heat fluxes as high as 200 W/cm/sup 2/ have been measured when a chilled water heat exchanger is used as the external heat removal device.
{"title":"Vibration-induced droplet atomization heat transfer cell for high-heat flux applications","authors":"S. Heffington, W. Black, A. Glezer","doi":"10.1109/ITHERM.2002.1012485","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012485","url":null,"abstract":"This paper describes a unique two-phase cooling method that includes a closed heat transfer cell, similar to a thermosyphon that can be used to cool microelectronic packages. The cooling method is based upon a Vibration-Induced Droplet Atomization, or VIDA, process that can generate small liquid droplets inside a closed cell and propel them onto a heated surface. The VIDA technique involves the violent break-up of a liquid film into a shower of droplets by vibrating a piezoelectric actuator and accelerating the liquid film at resonant conditions. The droplets continually coat the surface with a thin liquid film, which evaporates on the heated surface, and the vapor is condensed on the internal surfaces of the heat transfer cell as well as the liquid working fluid. The condensed liquid is returned via gravity to the piezoelectric actuator where it is again atomized. A VIDA heat transfer cell 50 mm in diameter and 20 mm thick was constructed. Test data described in this study include the heat transfer characteristics and cooling capabilities for a small-scale cell that is suitable for cooling a desktop microprocessor during the burn-in portion of the manufacturing process. The VIDA process produces droplets of relatively uniform diameter, and the droplets have sufficient momentum to reach the remotely located heated source. Heat fluxes as high as 200 W/cm/sup 2/ have been measured when a chilled water heat exchanger is used as the external heat removal device.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"275 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123061734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012435
G. Peng, M. Ishizuka
The thermal performance of a temple package air cooling model composed of a 672-pin plastic ball grid array (PBGA) package mounted on a printed circuit board (PCB) and a compact system box has been investigated by numerical simulations of heat transfer. A geometry model resembling the PBGA/PCB package with directional homogeneous solid blocks was constructed, and a three-dimensional computational approach of thermal flow simulation was developed considering conduction and convection modes of heat transfer. Having been verified by experimental results, the approach was applied to the analysis of heat transfer in the package air cooling system. Computational results show that the thermal resistance of PGBA/PCB package model under the condition of natural air cooling is about 27.0 K/W and closes to 25.0 K/W gradually with the increase of heat spreading. Under the condition of forced air cooling, its thermal resistance decreases with the increase of airflow velocity, and the reasonable velocity of air cooling is revealed to be about 0.8 m/s.
{"title":"Numerical analysis of heat transfer in a compact plastic ball grid array package air cooling model","authors":"G. Peng, M. Ishizuka","doi":"10.1109/ITHERM.2002.1012435","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012435","url":null,"abstract":"The thermal performance of a temple package air cooling model composed of a 672-pin plastic ball grid array (PBGA) package mounted on a printed circuit board (PCB) and a compact system box has been investigated by numerical simulations of heat transfer. A geometry model resembling the PBGA/PCB package with directional homogeneous solid blocks was constructed, and a three-dimensional computational approach of thermal flow simulation was developed considering conduction and convection modes of heat transfer. Having been verified by experimental results, the approach was applied to the analysis of heat transfer in the package air cooling system. Computational results show that the thermal resistance of PGBA/PCB package model under the condition of natural air cooling is about 27.0 K/W and closes to 25.0 K/W gradually with the increase of heat spreading. Under the condition of forced air cooling, its thermal resistance decreases with the increase of airflow velocity, and the reasonable velocity of air cooling is revealed to be about 0.8 m/s.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131552249","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012489
H.Y. Zhang, D. Pinjala, O.K. Navas, M. Iyer, P. Chan, X.P. Liu, H. Hayashi, J. Han
In this research project, advanced thermal solutions for high performance laptop computer have been developed. This development involves design and implementation of a heat sink assembly, application of a heat pipe and thermal evaluation by modeling and measurement. The heat sink assembly has been designed and the thermal performance has been examined by measurements. A heat pipe assembly with two heat spreaders has been designed as the heat transport medium from microprocessor to the heat sink. In the system modeling, a compact model for the flip chip BGA package has been developed. Implementation of the compact model for the packages in the system modeling greatly reduces the grid size and thus makes the system simulation feasible. System measurements are performed with thermal solutions. Measurement results show that present thermal solutions are able to dissipate a power of 25 to 30 W from the microprocessor. The predicted junction temperatures by system simulation are compared with measurements and an agreement within 4% has been attained. Parametric studies have been conducted with the validated system level model.
{"title":"Development of thermal solutions for high performance laptop computers","authors":"H.Y. Zhang, D. Pinjala, O.K. Navas, M. Iyer, P. Chan, X.P. Liu, H. Hayashi, J. Han","doi":"10.1109/ITHERM.2002.1012489","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012489","url":null,"abstract":"In this research project, advanced thermal solutions for high performance laptop computer have been developed. This development involves design and implementation of a heat sink assembly, application of a heat pipe and thermal evaluation by modeling and measurement. The heat sink assembly has been designed and the thermal performance has been examined by measurements. A heat pipe assembly with two heat spreaders has been designed as the heat transport medium from microprocessor to the heat sink. In the system modeling, a compact model for the flip chip BGA package has been developed. Implementation of the compact model for the packages in the system modeling greatly reduces the grid size and thus makes the system simulation feasible. System measurements are performed with thermal solutions. Measurement results show that present thermal solutions are able to dissipate a power of 25 to 30 W from the microprocessor. The predicted junction temperatures by system simulation are compared with measurements and an agreement within 4% has been attained. Parametric studies have been conducted with the validated system level model.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129958856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012564
Jing Pang, T. H. Low
Finite element modeling and simulation of thermal cycling and thermal shock tests for Flip-Chip-On-Board (FCOB) solder joint life prediction was conducted. Firstly, a phenomenological approach using an elastic-plastic-creep analysis model simulates time independent plasticity and time dependent creep deformations in the solder joints. Temperature and strain rate dependent properties for eutectic solder (63Sn/37Pb) were incorporated into the finite element models. Secondly, a state-variable approach using a viscoplastic analysis based on the Anand model simulates the strain rate dependent inelastic deformations in the solder joints. Thermal cycling and thermal shock loading for -50 C to +150 C were investigated for ramp rates of 10 C/min and 100 C/min respectively. Solder joint fatigue models were used for life prediction analysis employing the inelastic strain range and inelastic energy density parameters derived from the finite element results.
{"title":"Modeling thermal cycling and thermal shock tests for FCOB","authors":"Jing Pang, T. H. Low","doi":"10.1109/ITHERM.2002.1012564","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012564","url":null,"abstract":"Finite element modeling and simulation of thermal cycling and thermal shock tests for Flip-Chip-On-Board (FCOB) solder joint life prediction was conducted. Firstly, a phenomenological approach using an elastic-plastic-creep analysis model simulates time independent plasticity and time dependent creep deformations in the solder joints. Temperature and strain rate dependent properties for eutectic solder (63Sn/37Pb) were incorporated into the finite element models. Secondly, a state-variable approach using a viscoplastic analysis based on the Anand model simulates the strain rate dependent inelastic deformations in the solder joints. Thermal cycling and thermal shock loading for -50 C to +150 C were investigated for ramp rates of 10 C/min and 100 C/min respectively. Solder joint fatigue models were used for life prediction analysis employing the inelastic strain range and inelastic energy density parameters derived from the finite element results.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134033247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012547
M. Chengalva
Flip chip assemblies are widely used in the electronics industry, in a range of electronic systems from low-end consumer products to high performance automotive controllers. However, residual stresses of a high magnitude are present in the structure due to differential thermal contraction rates of the various members of the assembly. This can lead to the problem of flip chip die cracking during manufacture or service, particularly if the exposed surface of the die is scratched or damaged. The need to easily predict die cracking potential in flip chip assemblies is therefore of considerable interest to the industry, especially for automotive electronics applications where the reliability requirements coupled with the field environment create a need for highly robust products. In this investigation, the problem of flip chip die cracking is approached from an industry perspective from two separate angles. The first involves the determination of the intrinsic strength of production-intent flip chip die using bend testing. The second angle involves the determination of stress levels in flip chip assemblies during manufacture and service using simulations. By comparing die strength with induced stresses, the potential for die cracking can be readily evaluated. Moreover, the impact of damage on the die surface can be quantified and the damage tolerance in a given design can be estimated.
{"title":"Flip chip die cracking - a simplified approach utilizing experimentation and simulations","authors":"M. Chengalva","doi":"10.1109/ITHERM.2002.1012547","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012547","url":null,"abstract":"Flip chip assemblies are widely used in the electronics industry, in a range of electronic systems from low-end consumer products to high performance automotive controllers. However, residual stresses of a high magnitude are present in the structure due to differential thermal contraction rates of the various members of the assembly. This can lead to the problem of flip chip die cracking during manufacture or service, particularly if the exposed surface of the die is scratched or damaged. The need to easily predict die cracking potential in flip chip assemblies is therefore of considerable interest to the industry, especially for automotive electronics applications where the reliability requirements coupled with the field environment create a need for highly robust products. In this investigation, the problem of flip chip die cracking is approached from an industry perspective from two separate angles. The first involves the determination of the intrinsic strength of production-intent flip chip die using bend testing. The second angle involves the determination of stress levels in flip chip assemblies during manufacture and service using simulations. By comparing die strength with induced stresses, the potential for die cracking can be readily evaluated. Moreover, the impact of damage on the die surface can be quantified and the damage tolerance in a given design can be estimated.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"270 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134035452","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012576
C.C. Wong, S. Graham
This paper discusses the thermal analysis of a fully integrated micro-switch for surety applications. Specifically, this study focuses on the temperature increase of a micromachined optical shutter with spot heating from a micro-laser. To analyze the shutter response, a 'Design-to-Analysis' interface has been built that generates an accurate 3-D solid geometry from the 2-D mask layout. Besides performing analysis, engineers can also use this solid modeler to virtually prototype and verify a design before fabrication. A parametric study is performed to determine the effects of thermal conductivity and contact resistance on the thermal response of this passively cooled device.
{"title":"Investigating the thermal response of a micro-optical shutter","authors":"C.C. Wong, S. Graham","doi":"10.1109/ITHERM.2002.1012576","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012576","url":null,"abstract":"This paper discusses the thermal analysis of a fully integrated micro-switch for surety applications. Specifically, this study focuses on the temperature increase of a micromachined optical shutter with spot heating from a micro-laser. To analyze the shutter response, a 'Design-to-Analysis' interface has been built that generates an accurate 3-D solid geometry from the 2-D mask layout. Besides performing analysis, engineers can also use this solid modeler to virtually prototype and verify a design before fabrication. A parametric study is performed to determine the effects of thermal conductivity and contact resistance on the thermal response of this passively cooled device.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133554614","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012572
T. Smekal, D. Rhine, D. Weston, P. Grodzinski
We discuss the design, integration and testing of thermal components in a microfluidic device designed for on-chip genetic sample preparation. A typical microdevice must perform several operations to be capable of analyzing a sample of body fluid (blood, urine, saliva), extracting DNA from concentrated cells, hybridization, purifying and amplifying DNA, and finally detecting DNA fragments of interest. Reduction of the sample volume down to a few /spl mu/Ls and improvement of the ramp times between temperature steps makes micro-PCR devices desirable. Thermal components such as heaters and resistive thermal devices (RTDs) are fabricated as an integral part of a complete genetic sample preparation micro-system. The ability to precisely control the temperature is a critical component of most microfluidic devices intended for on-chip genetic sample preparation Devices were fabricated and demonstrated a temperature variation of /spl sim/1/spl deg/C over the entire sample volume. The design of a device, including chamber dimensions, and placement of the heating and cooling elements is presented. The results of temperature cycling experiments are shown. We have measured a heating rate of /spl sim/2.4/spl deg/C/s and a cooling rate of /spl sim/2.0/spl deg/C/s for devices tested under active heating/cooling control. A brief overview of relevant microfabrication methods is also presented.
{"title":"Design, fabrication and testing of thermal components and their integration into a microfluidic device","authors":"T. Smekal, D. Rhine, D. Weston, P. Grodzinski","doi":"10.1109/ITHERM.2002.1012572","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012572","url":null,"abstract":"We discuss the design, integration and testing of thermal components in a microfluidic device designed for on-chip genetic sample preparation. A typical microdevice must perform several operations to be capable of analyzing a sample of body fluid (blood, urine, saliva), extracting DNA from concentrated cells, hybridization, purifying and amplifying DNA, and finally detecting DNA fragments of interest. Reduction of the sample volume down to a few /spl mu/Ls and improvement of the ramp times between temperature steps makes micro-PCR devices desirable. Thermal components such as heaters and resistive thermal devices (RTDs) are fabricated as an integral part of a complete genetic sample preparation micro-system. The ability to precisely control the temperature is a critical component of most microfluidic devices intended for on-chip genetic sample preparation Devices were fabricated and demonstrated a temperature variation of /spl sim/1/spl deg/C over the entire sample volume. The design of a device, including chamber dimensions, and placement of the heating and cooling elements is presented. The results of temperature cycling experiments are shown. We have measured a heating rate of /spl sim/2.4/spl deg/C/s and a cooling rate of /spl sim/2.0/spl deg/C/s for devices tested under active heating/cooling control. A brief overview of relevant microfabrication methods is also presented.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"113 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116431895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012545
J. Parry, C. Marooney, M. Warner, C. Bailey, K. Pericleous
The future success of many electronics companies will depend to a large extent on their ability to initiate techniques that bring schedules, performance, tests, support, production, life-cycle-costs, reliability prediction and quality control into the earliest stages of the product creation process. Earlier papers have discussed the benefits of an integrated analysis environment for system-level thermal, stress and EMC prediction. This paper focuses on developments made to the stress analysis module and presents results obtained for an SMT resistor. Lifetime predictions are made using the Coffin-Manson equation. Comparison with the creep strain energy based models of Darveaux (1997) shows the shear strain based method to underestimate the solder joint life. Conclusions are also made about the capabilities of both approaches to predict the qualitative and quantitative impact of design changes.
{"title":"An integrated approach to flow, thermal and mechanical modeling of electronics devices","authors":"J. Parry, C. Marooney, M. Warner, C. Bailey, K. Pericleous","doi":"10.1109/ITHERM.2002.1012545","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012545","url":null,"abstract":"The future success of many electronics companies will depend to a large extent on their ability to initiate techniques that bring schedules, performance, tests, support, production, life-cycle-costs, reliability prediction and quality control into the earliest stages of the product creation process. Earlier papers have discussed the benefits of an integrated analysis environment for system-level thermal, stress and EMC prediction. This paper focuses on developments made to the stress analysis module and presents results obtained for an SMT resistor. Lifetime predictions are made using the Coffin-Manson equation. Comparison with the creep strain energy based models of Darveaux (1997) shows the shear strain based method to underestimate the solder joint life. Conclusions are also made about the capabilities of both approaches to predict the qualitative and quantitative impact of design changes.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134483443","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2002-08-07DOI: 10.1109/ITHERM.2002.1012445
R. Huang, D. L. Chung
A procedure for solving the thermal problems of a fan-cooled disk-array system is developed for industrial application. The procedure requires both the measurements of the temperatures of key components at various air flow rates across a single hard-disk and the computational simulations of isothermal flows for a preliminarily designed mechanical configuration of a system by employing a commercial CFD software package. The flow rate and pressure drop of the air stream across a single-disk are measured with an AMCA 210 flow bench. The temperatures of the components are detected by the fine-wire thermocouples. The methodology of the development of the disk array and the like is illustrated by an example. The results show that the single-disk experiment can provide the designer with the means to determine the air flow rate for desired operation temperatures of key components. The calculated flow rate and pressure drop can be used to match selected fans to the system. The prediction correlates well with the experimental values. The calculated flow patterns can be used to improve the preliminary design of the system mechanical configuration.
{"title":"Thermal design of a disk-array system","authors":"R. Huang, D. L. Chung","doi":"10.1109/ITHERM.2002.1012445","DOIUrl":"https://doi.org/10.1109/ITHERM.2002.1012445","url":null,"abstract":"A procedure for solving the thermal problems of a fan-cooled disk-array system is developed for industrial application. The procedure requires both the measurements of the temperatures of key components at various air flow rates across a single hard-disk and the computational simulations of isothermal flows for a preliminarily designed mechanical configuration of a system by employing a commercial CFD software package. The flow rate and pressure drop of the air stream across a single-disk are measured with an AMCA 210 flow bench. The temperatures of the components are detected by the fine-wire thermocouples. The methodology of the development of the disk array and the like is illustrated by an example. The results show that the single-disk experiment can provide the designer with the means to determine the air flow rate for desired operation temperatures of key components. The calculated flow rate and pressure drop can be used to match selected fans to the system. The prediction correlates well with the experimental values. The calculated flow patterns can be used to improve the preliminary design of the system mechanical configuration.","PeriodicalId":299933,"journal":{"name":"ITherm 2002. Eighth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.02CH37258)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133724645","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：