Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978532
A. Tessmann, A. Leuther, V. Hurm, H. Massler, S. Wagner, M. Kuri, M. Zink, M. Riessle, H. Stulz, M. Schlechtweg, O. Ambacher
In this paper, we present the development of an ultra-broadband H-band (220 - 325 GHz) submillimeter-wave monolithic integrated circuit (S-MMIC) medium power amplifier (MPA) module for use in next generation high-resolution imaging systems and communication links operating around 300 GHz. Therefore, a variety of compact amplifier circuits has been developed by using an advanced 35 nm InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor (mHEMT) technology in combination with grounded coplanar waveguide (GCPW) circuit topology. A three-stage amplifier S-MMIC based on compact cascode devices was realized, demonstrating a maximum gain of 22.2 dB at 294 GHz and a small-signal gain of more than 16 dB over the frequency range from 184 to 312 GHz. Finally, mounting and packaging of the monolithic amplifier chip into a WR-3.4 waveguide module was accomplished with only minor reduction in circuit performance.
{"title":"A Broadband 220-320 GHz Medium Power Amplifier Module","authors":"A. Tessmann, A. Leuther, V. Hurm, H. Massler, S. Wagner, M. Kuri, M. Zink, M. Riessle, H. Stulz, M. Schlechtweg, O. Ambacher","doi":"10.1109/CSICS.2014.6978532","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978532","url":null,"abstract":"In this paper, we present the development of an ultra-broadband H-band (220 - 325 GHz) submillimeter-wave monolithic integrated circuit (S-MMIC) medium power amplifier (MPA) module for use in next generation high-resolution imaging systems and communication links operating around 300 GHz. Therefore, a variety of compact amplifier circuits has been developed by using an advanced 35 nm InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor (mHEMT) technology in combination with grounded coplanar waveguide (GCPW) circuit topology. A three-stage amplifier S-MMIC based on compact cascode devices was realized, demonstrating a maximum gain of 22.2 dB at 294 GHz and a small-signal gain of more than 16 dB over the frequency range from 184 to 312 GHz. Finally, mounting and packaging of the monolithic amplifier chip into a WR-3.4 waveguide module was accomplished with only minor reduction in circuit performance.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122705872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978529
K. T. Ng, Y. Choi, Keh-Chung Wang
A common-cathode VCSEL driver is presented in this paper. Overcoming the large parasitics introduced by the current source at the output node, this VCSEL driver is able to operate at data rate of 25Gb/s. With different rising/falling edge speed, it is able to address the non-linear issues of VCSEL diode. The VCSEL driver was fabricated using IBM8HP BiCMOS technology, dissipating less than 60mW and featuring a core area of 0.45mmX200mm.
{"title":"A 25Gb/s Common-Cathode VCSEL Driver","authors":"K. T. Ng, Y. Choi, Keh-Chung Wang","doi":"10.1109/CSICS.2014.6978529","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978529","url":null,"abstract":"A common-cathode VCSEL driver is presented in this paper. Overcoming the large parasitics introduced by the current source at the output node, this VCSEL driver is able to operate at data rate of 25Gb/s. With different rising/falling edge speed, it is able to address the non-linear issues of VCSEL diode. The VCSEL driver was fabricated using IBM8HP BiCMOS technology, dissipating less than 60mW and featuring a core area of 0.45mmX200mm.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130407197","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978525
K. Schmalz, J. Borngraber, W. Debski, M. Elkhouly, Ruoyu Wang, P. Neumaier, H. Hubers
A 245 GHz transmitter (TX) array with an integrated antenna-array for a gas spectroscopy system has been realized, which consists of a push-push VCO with a 1/64 frequency divider, power amplifiers, frequency doublers, and on-chip antennas with localized backside etching. The TX-frequency is tunable in the range from 238 GHz to 252 GHz. The TX-array is fabricated in 0.13 μm SiGe:C BiCMOS technology with fT/fmax of 300GHz/500GHz. Its estimated output power is 7 dBm at 245 GHz, and the EIRP reaches 18 dBm at 245 GHz. The 245 GHz spectroscopy system includes a TX and a receiver in SiGe. The sensitivity of this spectroscopy system is demonstrated by the high-resolution absorption spectrum of methanol and will be increased further by this TX-array.
{"title":"245 GHz SiGe Transmitter Array for Gas Spectroscopy","authors":"K. Schmalz, J. Borngraber, W. Debski, M. Elkhouly, Ruoyu Wang, P. Neumaier, H. Hubers","doi":"10.1109/CSICS.2014.6978525","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978525","url":null,"abstract":"A 245 GHz transmitter (TX) array with an integrated antenna-array for a gas spectroscopy system has been realized, which consists of a push-push VCO with a 1/64 frequency divider, power amplifiers, frequency doublers, and on-chip antennas with localized backside etching. The TX-frequency is tunable in the range from 238 GHz to 252 GHz. The TX-array is fabricated in 0.13 μm SiGe:C BiCMOS technology with fT/fmax of 300GHz/500GHz. Its estimated output power is 7 dBm at 245 GHz, and the EIRP reaches 18 dBm at 245 GHz. The 245 GHz spectroscopy system includes a TX and a receiver in SiGe. The sensitivity of this spectroscopy system is demonstrated by the high-resolution absorption spectrum of methanol and will be increased further by this TX-array.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130526384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978581
Ankur Prasad, C. Fager, M. Thorsell, C. M. Andersson, K. Yhland
This paper presents a symmetrical small signal model for GaN HEMTs valid for both positive and negative Vds. The model takes advantage of the intrinsic symmetry of the devices typically used for switches. The parameters of the model are extracted using a new symmetrical optimization based extraction method, optimizing simultaneously for both positive and negative drain-source bias points. This ensures a symmetrical small signal model with lower modeling error. The small signal model can be further used to simplify the development of a large-signal model. The small signal model is validated with measured S- parameters of a commercial GaN HEMT.
{"title":"Symmetrical Modeling of GaN HEMTS","authors":"Ankur Prasad, C. Fager, M. Thorsell, C. M. Andersson, K. Yhland","doi":"10.1109/CSICS.2014.6978581","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978581","url":null,"abstract":"This paper presents a symmetrical small signal model for GaN HEMTs valid for both positive and negative Vds. The model takes advantage of the intrinsic symmetry of the devices typically used for switches. The parameters of the model are extracted using a new symmetrical optimization based extraction method, optimizing simultaneously for both positive and negative drain-source bias points. This ensures a symmetrical small signal model with lower modeling error. The small signal model can be further used to simplify the development of a large-signal model. The small signal model is validated with measured S- parameters of a commercial GaN HEMT.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129808510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978533
Y. Karandikar, H. Zirath, Yu Yan, V. Vassilev
For linear multi-pixel imaging systems, a linear stack of pixels comprising of an antenna and a heterodyne receiver are needed. Such pixels can be realized using MMIC processes. The main constraint for such multi-pixel system is a compact array of pixels giving high coupling to quasi-optics used for focusing. This paper addresses this trade-off and presents a novel solution based on beam synthesis of two consecutive subarrays. One such sub-array along with heterodyne receiver is described as half-pixel in this paper and it is realized using 2×4 patch array and Gilbert core sub-harmonic mixer using a 250nm DHBT process. The patch array has ohmic loss better than 8 dB and mixer conversion loss is 6-8 dB over 320-350 GHz RF band. The chip size is 1mm × 2mm and therefore for 7 simultaneous beams a MMIC of 8 half-pixels is foreseen.
{"title":"A Compact 340 GHz 2x4 Patch Array with Integrated Subharmonic Gilber Core Mixer as a Building Block for Multi-Pixel Imaging Frontends","authors":"Y. Karandikar, H. Zirath, Yu Yan, V. Vassilev","doi":"10.1109/CSICS.2014.6978533","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978533","url":null,"abstract":"For linear multi-pixel imaging systems, a linear stack of pixels comprising of an antenna and a heterodyne receiver are needed. Such pixels can be realized using MMIC processes. The main constraint for such multi-pixel system is a compact array of pixels giving high coupling to quasi-optics used for focusing. This paper addresses this trade-off and presents a novel solution based on beam synthesis of two consecutive subarrays. One such sub-array along with heterodyne receiver is described as half-pixel in this paper and it is realized using 2×4 patch array and Gilbert core sub-harmonic mixer using a 250nm DHBT process. The patch array has ohmic loss better than 8 dB and mixer conversion loss is 6-8 dB over 320-350 GHz RF band. The chip size is 1mm × 2mm and therefore for 7 simultaneous beams a MMIC of 8 half-pixels is foreseen.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117047484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978583
Jungwan Cho, Y. Won, D. Francis, M. Asheghi, K. Goodson
The performance of high-power gallium nitride (GaN) high-electron-mobility transistors (HEMTs) is limited by self-heating effects. High thermal resistances within micrometers of the active device junction often dominate the junction temperature rise and fundamentally limit the device power handling capability. The use of high-thermal-conductivity diamond in close proximity to the transistor junction can mitigate this thermal constraint, but careful attention is required to the quality of the thermal interface between the GaN and diamond. Here we apply time-domain thermoreflectance (TDTR) to two GaN-on-diamond composite substrates with varying GaN thicknesses to measure the thermal interface resistance between the GaN and diamond (29 m2 K GW-1) as well as the thermal conductivity of the GaN buffer layer (112 W m-1 K-1) at room temperature. Informed by these data, we perform finite-element analysis to quantify the relative impact of the GaN-diamond thermal interface resistance, diamond substrate thermal conductivity, and a convective cooling solution on the device channel temperature rise.
大功率氮化镓(GaN)高电子迁移率晶体管(hemt)的性能受到自热效应的限制。有源器件结的高热阻往往在微米范围内主导结温升，从根本上限制了器件的功率处理能力。在晶体管结附近使用高导热金刚石可以减轻这种热约束，但需要仔细注意氮化镓和金刚石之间的热界面的质量。在这里，我们将时域热反射(TDTR)应用于具有不同GaN厚度的两种GaN-on-金刚石复合衬底，以测量GaN和金刚石之间的热界面电阻(29 m2 K GW-1)以及GaN缓冲层的导热系数(112 W m-1 K-1)。根据这些数据，我们进行了有限元分析，以量化gan -金刚石热界面电阻、金刚石衬底导热系数和对流冷却溶液对器件通道温升的相对影响。
{"title":"Thermal Interface Resistance Measurements for GaN-on-Diamond Composite Substrates","authors":"Jungwan Cho, Y. Won, D. Francis, M. Asheghi, K. Goodson","doi":"10.1109/CSICS.2014.6978583","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978583","url":null,"abstract":"The performance of high-power gallium nitride (GaN) high-electron-mobility transistors (HEMTs) is limited by self-heating effects. High thermal resistances within micrometers of the active device junction often dominate the junction temperature rise and fundamentally limit the device power handling capability. The use of high-thermal-conductivity diamond in close proximity to the transistor junction can mitigate this thermal constraint, but careful attention is required to the quality of the thermal interface between the GaN and diamond. Here we apply time-domain thermoreflectance (TDTR) to two GaN-on-diamond composite substrates with varying GaN thicknesses to measure the thermal interface resistance between the GaN and diamond (29 m2 K GW-1) as well as the thermal conductivity of the GaN buffer layer (112 W m-1 K-1) at room temperature. Informed by these data, we perform finite-element analysis to quantify the relative impact of the GaN-diamond thermal interface resistance, diamond substrate thermal conductivity, and a convective cooling solution on the device channel temperature rise.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128866633","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-18DOI: 10.1109/CSICS.2014.6978539
S. Shopov, S. Voinigescu
An 8-bit power-DAC cell is demonstrated for the first time at D-band in a production 45-nm SOI CMOS technology. The circuit proves the scalability of the transmitter array architecture with antenna segmentation from the W-band to the D-band. The last two stages of the power-DAC cell employ a novel two-stage common-gate Gilbert-cell topology with series-stacking to directly modulate a 125-144 GHz carrier in phase and in amplitude. The measured gain, saturated output power, and PAE of the power- DAC cell are 14.9 dB, 13.2 dBm, and 2.8%, respectively.
{"title":"An 8-Bit 140-GHz Power-DAC Cell for IQ Transmitter Arrays with Antenna Segmentation","authors":"S. Shopov, S. Voinigescu","doi":"10.1109/CSICS.2014.6978539","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978539","url":null,"abstract":"An 8-bit power-DAC cell is demonstrated for the first time at D-band in a production 45-nm SOI CMOS technology. The circuit proves the scalability of the transmitter array architecture with antenna segmentation from the W-band to the D-band. The last two stages of the power-DAC cell employ a novel two-stage common-gate Gilbert-cell topology with series-stacking to directly modulate a 125-144 GHz carrier in phase and in amplitude. The measured gain, saturated output power, and PAE of the power- DAC cell are 14.9 dB, 13.2 dBm, and 2.8%, respectively.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117046325","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-05DOI: 10.1109/CSICS.2014.6978563
F. L. Ogboi, P. Tasker, Muhammad Akmal, J. Lees, J. Benedikt, S. Bensmida, K. Morris, M. Beach, J. Mcgeehan
In [1] a new formulation for quantifying the linearizing baseband voltage signal, injected at the output bias port, to linearize a device behaviour was introduced. A key feature of this approach is that since it is formulated in the envelope domain the number of linearization coefficient required is independent of the envelope shape, complexity. This property is validated by performing baseband linearization investigations on a 10W Cree GaN HEMT device. Modulated signals with increasing complexity 3, 5, and 9-tone modulated stimulus, at 1.5dB of compression, were utilized. In all cases just two-linearization coefficients needed to be determined in order to compute the output baseband signal envelope necessary. Intermodulation distortion was reduced to around -50dBc, a value very close to the dynamic range limit of the measurement system.
在[1]中，引入了一种新的公式，用于量化在输出偏置端口注入的线性化基带电压信号，以线性化器件行为。这种方法的一个关键特征是，由于它是在包络域中制定的，所需的线性化系数的数量与包络形状、复杂性无关。通过对10W Cree GaN HEMT器件进行基带线性化研究，验证了该特性。在1.5dB的压缩下，采用了3、5和9音调制刺激。在所有情况下，为了计算必要的输出基带信号包络线，只需要确定两个线性化系数。互调失真降低到-50dBc左右，这个值非常接近测量系统的动态范围极限。
{"title":"Investigation of Various Envelope Complexity Linearity under Modulated Stimulus Using a New Envelope Formulation Approach","authors":"F. L. Ogboi, P. Tasker, Muhammad Akmal, J. Lees, J. Benedikt, S. Bensmida, K. Morris, M. Beach, J. Mcgeehan","doi":"10.1109/CSICS.2014.6978563","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978563","url":null,"abstract":"In [1] a new formulation for quantifying the linearizing baseband voltage signal, injected at the output bias port, to linearize a device behaviour was introduced. A key feature of this approach is that since it is formulated in the envelope domain the number of linearization coefficient required is independent of the envelope shape, complexity. This property is validated by performing baseband linearization investigations on a 10W Cree GaN HEMT device. Modulated signals with increasing complexity 3, 5, and 9-tone modulated stimulus, at 1.5dB of compression, were utilized. In all cases just two-linearization coefficients needed to be determined in order to compute the output baseband signal envelope necessary. Intermodulation distortion was reduced to around -50dBc, a value very close to the dynamic range limit of the measurement system.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116424215","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-05DOI: 10.1109/CSICS.2014.6978572
J. Pomeroy, Martin Kuball
Recent thermography measurements have demonstrated the potential of GaN-on-diamond transistors to offer significantly reduced thermal resistance with respect to equivalent GaN-on-SiC devices. However, measurements performed to date have focused on smaller transistors which are not representative of larger power devices and do not take full advantage of the superior heat spreading provided by high thermal conductivity diamond substrates. In order to explore the possible gain in output power for AlGaN/GaN HEMTs on diamond substrates we have developed a parametric thermal model for optimizing the geometry of a GaN-on-diamond transistor cell. We use simulation input parameters that have been experimentally validated against measurements, giving a high confidence in the modelling results. We demonstrate that by optimizing the geometry of GaN-on-diamond transistors, combined which additional diamond heat spreading layers, a ~3× increase in total output power can be gained with respect to GaN-on-SiC.
{"title":"Optimizing GaN-on-Diamond Transistor Geometry for Maximum Output Power","authors":"J. Pomeroy, Martin Kuball","doi":"10.1109/CSICS.2014.6978572","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978572","url":null,"abstract":"Recent thermography measurements have demonstrated the potential of GaN-on-diamond transistors to offer significantly reduced thermal resistance with respect to equivalent GaN-on-SiC devices. However, measurements performed to date have focused on smaller transistors which are not representative of larger power devices and do not take full advantage of the superior heat spreading provided by high thermal conductivity diamond substrates. In order to explore the possible gain in output power for AlGaN/GaN HEMTs on diamond substrates we have developed a parametric thermal model for optimizing the geometry of a GaN-on-diamond transistor cell. We use simulation input parameters that have been experimentally validated against measurements, giving a high confidence in the modelling results. We demonstrate that by optimizing the geometry of GaN-on-diamond transistors, combined which additional diamond heat spreading layers, a ~3× increase in total output power can be gained with respect to GaN-on-SiC.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-12-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130750203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-22DOI: 10.1109/CSICS.2014.6978531
Johan C. J. G. Withagen, A. Annema, B. Nauta, F. V. van Vliet
An 8-bit 360o sawtooth modulated phase shifter is used to apply very small frequency offsets to RF signals between 7 and 8 GHz. Offsets between 6 Hz and 10MHz can be obtained. Such frequency offsets can be used to generate orthogonal signals, which are required in e.g. MIMO applications. Each undesired frequency component is suppressed to below -30 dBc. The phase modulator is realized in a 250 nm SiGe BICMOS technology.
{"title":"A 7-8 GHz Serrodyne Modulator in SiGe for MIMO Signal Generation","authors":"Johan C. J. G. Withagen, A. Annema, B. Nauta, F. V. van Vliet","doi":"10.1109/CSICS.2014.6978531","DOIUrl":"https://doi.org/10.1109/CSICS.2014.6978531","url":null,"abstract":"An 8-bit 360o sawtooth modulated phase shifter is used to apply very small frequency offsets to RF signals between 7 and 8 GHz. Offsets between 6 Hz and 10MHz can be obtained. Such frequency offsets can be used to generate orthogonal signals, which are required in e.g. MIMO applications. Each undesired frequency component is suppressed to below -30 dBc. The phase modulator is realized in a 250 nm SiGe BICMOS technology.","PeriodicalId":309722,"journal":{"name":"2014 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2014-10-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133111480","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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