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2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)最新文献

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Multiphysics modeling and simulation of ultra-thin channel Germanium on insulator (GeOI) MOSFETs 超薄沟道锗绝缘体(GeOI) mosfet的多物理场建模与仿真
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8276997
Wenchao Chen, Manxi Wang, W. Yin, Erping Li
Multi-physical study of self-heating effect in GeOI MOSFET with 4nm channel thickness and 300nm channel length for digital integrated circuit is carried out by using finite element algorithm to solve carrier transport equations, Poisson equation, current continuity equations and thermal conduction equation. The simulated J-V curve is obtained by solving diffusive carrier transport equations. The time-dependent thermal conduction equation is solved to get the transient temperature response of the GeOI MOSFET. Due to the small size of the simulated structure, temperature response is in the scale of nanosecond according to our simulation results.
采用有限元算法求解载流子输运方程、泊松方程、电流连续性方程和热传导方程,对4nm沟道厚度、300nm沟道长度的数字集成电路GeOI MOSFET的自热效应进行了多物理研究。通过求解扩散载流子输运方程,得到了模拟的J-V曲线。求解了随时间变化的热传导方程,得到了GeOI MOSFET的瞬态温度响应。由于模拟结构的尺寸较小,根据我们的模拟结果,温度响应在纳秒级。
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引用次数: 2
EMC analysis on field and circuit of PCB PCB现场及电路的电磁兼容分析
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8276943
Aixin Chen, Li Wang, Xiangwei Ning, Yue Zhao
In this paper, electromagnetic compatibility (EMC) of a four-layer printed circuit board (PCB) with the function of Digital-to-Analog conversion (DAC) is analyzed. The characteristic is explored by the method of combination of field and circuit. Resonance of power layer is simulated in SIwave and noise of critical signal lines are simulated in Designer. Based on the result of simulation, some improvement approaches are put forward and applied to the PCB design. Finally, the DAC of the board has accomplished and the frequency spectrum of analog waveform is measured by network analyzer. The result of measurement shows a pure sine spectrum with noise lower than − 45dBm.
本文分析了具有数模转换(DAC)功能的四层印刷电路板(PCB)的电磁兼容性。采用场路相结合的方法对其特性进行了探索。在SIwave中模拟了功率层的谐振,在Designer中模拟了关键信号线的噪声。根据仿真结果,提出了一些改进方法,并将其应用到PCB设计中。最后,完成了电路板的DAC,并通过网络分析仪对模拟波形的频谱进行了测量。测量结果显示为纯正弦频谱,噪声低于- 45dBm。
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引用次数: 1
A compact ku-band 6-bit attenuator in 0.35um SiGe BiCMOS technology 一个紧凑的ku波段6位衰减器,采用0.35um SiGe BiCMOS技术
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8276988
Wenbo Shi, Kaixue Ma, Shouxian Mou, F. Meng
This paper presents a compact 14–18 GHz 6-bit attenuator in 0.35-μm SiGe BiCMOS technology. To realize size miniaturization, large attenuation range and low insertion loss, the switched Pi/T attenuator topology is employed. It adopts serial and shunt single-pole-single-throw switches merged with a resistive network to control attenuation accurately. In addition, the proposed attenuators use a novel inductive low-pass filter for phase correction to compensate the phase error in difference states. The designed prototype achieves an attenuation range of 31.5 dB in a 0.5-dB step size with 64 states, average insertion loss of 8±0.6 dB, P1dB of better than 10 dBm, input/output return losses of better than −10/-11 dB in all states, and chip size of 0.80×0.34 mm2 only excluding testing pads. The calculated root-mean-square (rms) amplitude error is less than 0.29 dB, with rms phase error is less than 3.9o in the designed frequency range.
提出了一种采用0.35 μm SiGe BiCMOS技术的14-18 GHz 6位衰减器。为了实现小型化、大衰减范围和低插入损耗,采用开关Pi/T衰减器拓扑结构。它采用串联和并联的单极单投开关与电阻网络合并,以精确控制衰减。此外,所提出的衰减器使用一种新颖的电感低通滤波器进行相位校正,以补偿不同状态下的相位误差。设计的样机在64个状态下,在0.5 dB步长下实现了31.5 dB的衰减范围,平均插入损耗为8±0.6 dB, P1dB优于10 dBm,所有状态下的输入/输出回波损耗均优于−10/-11 dB,芯片尺寸为0.80×0.34 mm2(不包括测试垫)。在设计频率范围内,计算得到的幅值均方根误差小于0.29 dB,相位误差均方根误差小于3.90。
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引用次数: 4
Integration of a 60 GHz packaged LTCC grid array antenna with an amplifier 60 GHz封装LTCC网格阵列天线与放大器的集成
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8277055
Pengfei Sun, Tang Liu, Jian Zhang, Linpu Huang
This paper presents an integration of a 60 GHz packaged low-temperature cofired ceramic (LTCC) grid array antenna (GAA) with a power amplifier under the concept of antenna-in-package. The demonstrated single GAA has a measured maximum gain of 15.12dB at 60GHz, with an accepted impedance bandwidth from 58 to 61 GHz and ±15° half-power beam width (HPBW). Vertical vias and wire-bonding are used to realize low-loss interconnection between the amplifier and the GAA. The measured results indicate that the maximum gain is 26.4dB when the packaged GAA is working as the transmitter, and the maximum gain is 25.69dB when the packaged GAA is working as the receiver, which is 11.28dB and 10.57dB respectively higher than the single GAA. These results clearly demonstrate the feasibility and potential of the solution for the 60 GHz front-end integration and package.
本文提出了一种60 GHz封装低温共烧陶瓷(LTCC)栅格阵列天线(GAA)与功率放大器在封装天线概念下的集成。所演示的单GAA在60GHz时的测量最大增益为15.12dB,可接受的阻抗带宽为58至61 GHz,半功率波束宽度(HPBW)为±15°。采用垂直通孔和线键连接实现放大器与GAA之间的低损耗互连。测量结果表明,封装GAA作为发射器时的最大增益为26.4dB,封装GAA作为接收器时的最大增益为25.69dB,分别比单个GAA高11.28dB和10.57dB。这些结果清楚地证明了该解决方案在60ghz前端集成和封装方面的可行性和潜力。
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引用次数: 2
Comparisons of power to failure for low-noise amplifiers under high-power microwave pulses 高功率微波脉冲下低噪声放大器的功率失效比较
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8276920
Xiang Chen, Liang Zhou, J. Mao, W. Yin
This study demonstrates comparisons of power to failure for SiGe based low noise amplifiers under the injection of high-power microwave (HPM) pulses. A general equation was derived to calculate power to failure. The pulse thermal resistance and breakdown temperature are calculated and determined. It is found that although these two transistors have close structure, their power to failure depend on the number of slots, pulse thermal resistance, thermal capacitance and breakdown temperature. Calculated and measured results show close correlations.
本研究展示了在高功率微波(HPM)脉冲注入下,基于SiGe的低噪声放大器的功率与故障的比较。导出了计算失效功率的一般方程。计算并确定了脉冲热阻和击穿温度。研究发现,虽然这两种晶体管结构紧密,但它们的失效功率与槽数、脉冲热阻、热电容和击穿温度有关。计算结果与实测结果具有密切的相关性。
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引用次数: 1
Research on self-powered short-circuit fault alarming system in power grid 电网自供电短路故障报警系统的研究
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8277053
Shulin Liu, Dandan Xu
Aim to the existing shortages of fault monitoring technology in power grid, this paper presents a kind of self-powered short-circuit fault detection system based on current transformer (CT) to acquire power and GSM module to realize fault wireless remote alarming. The system utilizes the energy generated at the moment of short-circuit fault in grid, Combing the switching power supply technology, CT couples short-circuit energy to the secondary-side to supply power for the entire system, it can achieve zero power consumption; The ultra low power microprocessor controls the GSM wireless communication module to send fault signal to the monitoring terminal; super capacitor (SC) as the uninterrupted power supply, when the fault signal is to be sent, the stored energy is released instantaneously. The system eliminates the dependence on the dry battery and display screen, short-circuit fault information can be obtained in a distance of thousands of miles in time. At last, experiment results verify that the designed system can detect short-circuit fault quickly and effectively.
针对目前电网故障监测技术存在的不足,提出了一种基于电流互感器(CT)获取电力和GSM模块实现故障无线远程报警的自供电型短路故障检测系统。该系统利用电网短路故障瞬间产生的能量,结合开关电源技术,将短路能量耦合到二次侧为整个系统供电,可实现零功耗;超低功耗微处理器控制GSM无线通信模块向监控终端发送故障信号;超级电容器(SC)作为不间断电源,在发送故障信号时,所存储的能量瞬间释放。该系统消除了对干电池和显示屏的依赖,可以在千里之外及时获取短路故障信息。最后,实验结果验证了所设计的系统能够快速有效地检测出短路故障。
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引用次数: 0
The influence of anti-pad array on the inductance of PCB power net area fill 反垫阵列对PCB电网面积填充电感的影响
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8277012
Qixuan Sun, S. Bai, J. Drewniak, E. Li
A low impedance power distribution network (PDN) is essential for the functionality of high speed printed circuit boards. A pre-layout impedance calculation can avoid time consuming changes on the design during post-layout stage. Design curves for inductance estimation are convenient to use in pre-layout stage. However, the high density voids on the power plane, which is caused by the anti-pads, are not considered in those design curves. This short paper discussed the extra inductance caused by the anti-pads, in two common situations.
低阻抗配电网络(PDN)对于高速印刷电路板的功能至关重要。布局前阻抗计算可以避免在布局后阶段进行耗时的设计变更。电感估计的设计曲线便于在预布置阶段使用。然而,在这些设计曲线中没有考虑到由反垫引起的功率平面高密度空隙。本文讨论了两种常见情况下由反焊片引起的额外电感。
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引用次数: 0
Simulation of graphene nanoribbon interconnects by boltzmann-poisson approach under relaxation time approximation 在松弛时间近似下用玻尔兹曼-泊松方法模拟石墨烯纳米带互连
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8277049
M. Tang, J. Mao
An effective approach for simulating electronic transport in graphene nanoribbon (GNR) interconnects is presented based on the Boltzmann-Poisson formalism. The Boltzmann transport equation (BTE) is solved under the relaxation time approximation (RTA). Using this method, the current-voltage (I-V) characteristics of metallic GNRs are investigated in detail. The proposed method can provide accurate prediction of I-V characteristics of GNR interconnects.
基于玻尔兹曼-泊松形式,提出了一种模拟石墨烯纳米带(GNR)互连中电子输运的有效方法。在松弛时间近似下求解了玻尔兹曼输运方程(BTE)。利用这种方法,对金属gnr的电流-电压特性进行了详细的研究。该方法可以准确预测GNR互连的I-V特性。
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引用次数: 0
Multi-GHz microstrip transmission lines realised by screen printing on flexible substrates 在柔性基板上丝网印刷实现多ghz微带传输线
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8277038
Yi-Xiao Shi, Zhenzhen Jiang, S. Lam, M. Leach, Jingchen Wang, E. Lim
This paper reports experimental work on 50 Ω microstrip transmission lines implemented by screen-printing low-cost silver paste onto thin flexible polyethylene terephthalate (PET) substrates of varying thickness. The microstrip line designs are based on PET substrates with thicknesses of 1.4 mm, 0.7 mm and 0.5 mm, leading to conductive track widths of 3.8 mm, 1.7 mm and 1.2 mm respectively for a 50 Ω line; these designs were then realised. The S-parameter measurements show that the insertion loss of the microstrip transmission lines on each substrate can be as low as 0.2 dB/cm, 0.17 dB/cm, and 0.14 dB/cm up to a frequency of 5 GHz in spite of the average quality of the silver paste used. The experimental results also show that the screen-printed transmission lines still work quite well in bent condition and wearable electronics application at GHz is possible.
本文报道了50条Ω微带传输线的实验工作,该微带传输线是通过丝网印刷低成本的银浆在不同厚度的柔性聚乙烯对苯二甲酸乙二醇酯(PET)衬底上实现的。微带线设计基于厚度为1.4 mm, 0.7 mm和0.5 mm的PET衬底,导致50 Ω线的导电轨道宽度分别为3.8 mm, 1.7 mm和1.2 mm;这些设计后来实现了。s参数测量结果表明,在5 GHz频率下,无论所用银浆的平均质量如何,每块衬底上微带传输线的插入损耗均可低至0.2 dB/cm、0.17 dB/cm和0.14 dB/cm。实验结果还表明,丝网印刷的传输线在弯曲条件下仍然可以很好地工作,并且可以在GHz下应用于可穿戴电子设备。
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引用次数: 1
Optimization model for flexible piezoelectric film in self-powered pressure sensor 自供电压力传感器柔性压电薄膜的优化模型
Pub Date : 2017-12-01 DOI: 10.1109/EDAPS.2017.8276925
Jiatong Huang, Yiping Zhu, Zerun Yin, Zhijie Zhang, Shaohui Xu, D. Xiong, P. Yang, Lianwei Wang, P. Chu
A flexible pyramidal piezoelectric structure composed of a PVDF-TrFE piezoelectric film which can generate high output voltage is simulated and fabricated. Compared to the flat, square columnar and trigonal-line micropatterned thin films, the pyramidal structure has stronger variation strain and produces higher piezoelectric signals. When they are subjected to the same mechanical load, the pyramidal structure generates output voltage that is 9 times larger than that of the planar film. The optimized flexible piezoelectric film has broad application in self-powered pressure sensors.
模拟并制作了一种由PVDF-TrFE压电薄膜组成的具有高输出电压的柔性锥体压电结构。与扁平、方形柱状和三角线微图薄膜相比,锥体结构具有更强的变应变,产生更高的压电信号。当它们受到相同的机械载荷时,锥体结构产生的输出电压是平面薄膜的9倍。优化后的柔性压电薄膜在自供电压力传感器中具有广泛的应用前景。
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引用次数: 3
期刊
2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS)
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