— This article presents various experimental studies on fatigue evaluation of wire bond interconnects and interfaces in electronic devices using an accelerated mechanical fatigue testing system. This dedicated experimental setup is designed to induce fatigue failure in the weak sites of the wire bond by reproducing the thermomechanical failure modes occurring during operation. An exceptional highly test acceleration is achieved by increasing the mechanical testing frequency into the kHz regimen enabling the determination of lifetime curves in a very short time. A comparison of this method to conventional testing methods such as power cycling, a shear testing exploits the potential of customized accelerated mechanical testing. Exemplary studies on the degra- dation and fatigue failure of heavy Al wire bonds typically used in power electronics and novel Cu wire bonds are presented and advantages and some restrictions of the proposed method are discussed.
{"title":"Highly Accelerated Mechanical Lifetime Testing for Wire Bonds in Power Electronics","authors":"B. Czerny, G. Khatibi","doi":"10.4071/imaps.1717134","DOIUrl":"https://doi.org/10.4071/imaps.1717134","url":null,"abstract":"— This article presents various experimental studies on fatigue evaluation of wire bond interconnects and interfaces in electronic devices using an accelerated mechanical fatigue testing system. This dedicated experimental setup is designed to induce fatigue failure in the weak sites of the wire bond by reproducing the thermomechanical failure modes occurring during operation. An exceptional highly test acceleration is achieved by increasing the mechanical testing frequency into the kHz regimen enabling the determination of lifetime curves in a very short time. A comparison of this method to conventional testing methods such as power cycling, a shear testing exploits the potential of customized accelerated mechanical testing. Exemplary studies on the degra- dation and fatigue failure of heavy Al wire bonds typically used in power electronics and novel Cu wire bonds are presented and advantages and some restrictions of the proposed method are discussed.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70525786","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The reliability of electronic assemblies is a vital criterion used to assure product quality over its lifetime. Weibull distribution is the most common distribution utilized to describe the reliability data. Most of the studies use the Weibull scale parameter, or characteristic life, to compare alternatives and make a selective decision. This may not lead to achieving the optimal parameters which can be problematic because this method doesn’t consider the variability behavior of the fatigue life. In this study, a new approach for process parameters selection is proposed to find the optimal parameter values that improve the micro-optimality selection process based on reliability data. In this study, a new approach is proposed based on examining the solder joint reliability by using a multi criteria analysis. The fuzzy logic is utilized as a tool to solve the multi criteria problem that is presented from the proposed approach. The reliability of microelectronic connections in thermal cycling operating conditions is used as a validation case study. In the validation case study, the optimal process parameters are found for ball grid array electronic components. Two levels of the solder sphere materials, three levels of the surface finish, and 10 levels of solder paste alloys are studied as process parameters. Using the proposed approach, four quality responses are employed to assess the reliability data, including the scale parameter, the B10 (life at 10% of the population failure), mean-standard deviation response, and the signal to noise ratio (SNR). The fuzzy logic is applied to solve the multiresponse problem. An optimal process parameter setting that considers different quality characteristics was found for the validation case study. ENIG surface finish, SAC305 solder sphere, and material six were the optimal factor levels that are obtained for the aged CABGA208 component using the proposed approach.
{"title":"A New Approach for Assessing the Reliability of Electronic Assemblies Using Fuzzy Logic for Multi-criteria Optimization","authors":"Raed Al Al Athamneh, F. Akkara, S. Hamasha","doi":"10.4071/imaps.1665996","DOIUrl":"https://doi.org/10.4071/imaps.1665996","url":null,"abstract":"\u0000 The reliability of electronic assemblies is a vital criterion used to assure product quality over its lifetime. Weibull distribution is the most common distribution utilized to describe the reliability data. Most of the studies use the Weibull scale parameter, or characteristic life, to compare alternatives and make a selective decision. This may not lead to achieving the optimal parameters which can be problematic because this method doesn’t consider the variability behavior of the fatigue life. In this study, a new approach for process parameters selection is proposed to find the optimal parameter values that improve the micro-optimality selection process based on reliability data. In this study, a new approach is proposed based on examining the solder joint reliability by using a multi criteria analysis. The fuzzy logic is utilized as a tool to solve the multi criteria problem that is presented from the proposed approach. The reliability of microelectronic connections in thermal cycling operating conditions is used as a validation case study. In the validation case study, the optimal process parameters are found for ball grid array electronic components. Two levels of the solder sphere materials, three levels of the surface finish, and 10 levels of solder paste alloys are studied as process parameters. Using the proposed approach, four quality responses are employed to assess the reliability data, including the scale parameter, the B10 (life at 10% of the population failure), mean-standard deviation response, and the signal to noise ratio (SNR). The fuzzy logic is applied to solve the multiresponse problem. An optimal process parameter setting that considers different quality characteristics was found for the validation case study. ENIG surface finish, SAC305 solder sphere, and material six were the optimal factor levels that are obtained for the aged CABGA208 component using the proposed approach.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49092176","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this study, the recent advances and trends of chip-let design and heterogeneous integration packaging will be investigated. Emphasis is placed on the definition, kinds, advantages and disadvantages, lateral interconnects, and examples of chiplet design and heterogeneous integration packaging. Also, emphasis is placed on the fundamental and examples of hybrid bonding.
{"title":"State-of-the-Art and Outlooks of Chiplets Heterogeneous Integration and Hybrid Bonding","authors":"J. Lau","doi":"10.4071/imaps.1542066","DOIUrl":"https://doi.org/10.4071/imaps.1542066","url":null,"abstract":"\u0000 In this study, the recent advances and trends of chip-let design and heterogeneous integration packaging will be investigated. Emphasis is placed on the definition, kinds, advantages and disadvantages, lateral interconnects, and examples of chiplet design and heterogeneous integration packaging. Also, emphasis is placed on the fundamental and examples of hybrid bonding.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48861445","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Laser ultrasonic inspection is a novel, noncontact, and nondestructive technique to evaluate the quality of solder interconnections in microelectronic packages. In this technique, identification of defects or failures in solder interconnections is performed by comparing the out-of-plane displacement signals, which are produced from the propagation of ultrasonic waves, from a known good reference sample and sample under test. The laboratory-scale dual-fiber array laser ultrasonic inspection system has successfully demonstrated identifying the defects and failures in the solder interconnections in advanced microelectronic packages such as chip-scale packages, plastic ball grid array packages, and flip-chip ball grid array packages. However, the success of any metrology system depends upon precise and accurate data to be useful in the microelectronic industry. This paper has demonstrated the measurement capability of the dual-fiber array laser ultrasonic inspection system using gage repeatability and reproducibility analysis. Industrial flip-chip ball grid array packages have been used for conducting experiments using the laser ultrasonic inspection system and the inspection data are used to perform repeatability and reproducibility analysis. Gage repeatability and reproducibility studies have also been used to choose a known good reference sample for comparing the samples under test.
{"title":"Measurement Capability of Laser Ultrasonic Inspection System for Evaluation of Ball-Grid Array Package Solder Balls","authors":"Vishnu V. B. Reddy, J. Williamson, S. Sitaraman","doi":"10.4071/imaps.1501802","DOIUrl":"https://doi.org/10.4071/imaps.1501802","url":null,"abstract":"\u0000 Laser ultrasonic inspection is a novel, noncontact, and nondestructive technique to evaluate the quality of solder interconnections in microelectronic packages. In this technique, identification of defects or failures in solder interconnections is performed by comparing the out-of-plane displacement signals, which are produced from the propagation of ultrasonic waves, from a known good reference sample and sample under test. The laboratory-scale dual-fiber array laser ultrasonic inspection system has successfully demonstrated identifying the defects and failures in the solder interconnections in advanced microelectronic packages such as chip-scale packages, plastic ball grid array packages, and flip-chip ball grid array packages. However, the success of any metrology system depends upon precise and accurate data to be useful in the microelectronic industry. This paper has demonstrated the measurement capability of the dual-fiber array laser ultrasonic inspection system using gage repeatability and reproducibility analysis. Industrial flip-chip ball grid array packages have been used for conducting experiments using the laser ultrasonic inspection system and the inspection data are used to perform repeatability and reproducibility analysis. Gage repeatability and reproducibility studies have also been used to choose a known good reference sample for comparing the samples under test.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47868896","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Compact power electronic circuits and higher operating temperatures of switching devices call for an analysis and verification on the impact of the parasitic components in these devices. The found drift mechanisms in a gallium-nitride field effect transistors (GaN-FET) are studied by literature and related to measurement results. The measurements in extreme temperature conditions are far beyond the manufacturer-recommended operating range. Influences to parasitic elements in both static and dynamic operation of the GaN-FETs are investigated and related toward device losses in switch-mode power electronic circuits with the example of a half-bridge circuit. In this article, static operation investigation on the effect of temperature toward resistance, leakage currents, and reverse conduction is conducted. Dynamic operation between the two states of GaN-FET is also addressed and related to the potential impact in a switching circuit losses. A thermal chamber was built to precisely measure the effect of temperature toward parasitic elements in the devices using a curve tracer. It was found that the increment in RDSon, IDSS, IGSS, and VSD can be justified by the literature and verified by measurements. Incremental COSS and decreasing VGSth was found when exposing devices to extreme temperatures. These two parameters give real challenge over designing circuits at high temperature where timing is critical. Albeit temperature challenges, it is found that investigated GaN-FETs have potential to be used in extreme temperature-operating conditions.
{"title":"Gallium-Nitride Field Effect Transistors in Extreme Temperature Conditions","authors":"M. Duraij, Yudi Xiao, Gabriel Zsurzsan, Zhe Zhang","doi":"10.4071/imaps.1545724","DOIUrl":"https://doi.org/10.4071/imaps.1545724","url":null,"abstract":"\u0000 Compact power electronic circuits and higher operating temperatures of switching devices call for an analysis and verification on the impact of the parasitic components in these devices. The found drift mechanisms in a gallium-nitride field effect transistors (GaN-FET) are studied by literature and related to measurement results. The measurements in extreme temperature conditions are far beyond the manufacturer-recommended operating range. Influences to parasitic elements in both static and dynamic operation of the GaN-FETs are investigated and related toward device losses in switch-mode power electronic circuits with the example of a half-bridge circuit. In this article, static operation investigation on the effect of temperature toward resistance, leakage currents, and reverse conduction is conducted. Dynamic operation between the two states of GaN-FET is also addressed and related to the potential impact in a switching circuit losses. A thermal chamber was built to precisely measure the effect of temperature toward parasitic elements in the devices using a curve tracer. It was found that the increment in RDSon, IDSS, IGSS, and VSD can be justified by the literature and verified by measurements. Incremental COSS and decreasing VGSth was found when exposing devices to extreme temperatures. These two parameters give real challenge over designing circuits at high temperature where timing is critical. Albeit temperature challenges, it is found that investigated GaN-FETs have potential to be used in extreme temperature-operating conditions.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45554847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This article reports a double-sided stacked wire-bondless power module package for silicon carbide (SiC) power devices to achieve low parasitic inductance and improved thermal performance for high-frequency applications. The design, simulation, fabrication, and characterization of the power module are presented. A half-bridge module based on the SiC power MOSFETs is demonstrated with minimized parasitic inductance. Double-sided cooling paths are used to maximize heat dissipation. Besides conventional packaging materials used in the power module fabrication, a low-temperature cofired ceramic (LTCC) and nickel-plated copper balls are used in this module package. The LTCC acts as an interposer providing both electrical and thermal routings. The nickel-plated copper balls replace bond wires as the electrical interconnections for the SiC power devices. The electrical and thermo-mechanical simulations of the power module are performed, and its switching performance is evaluated experimentally.
{"title":"A SiC Double-Sided Stacked Wire-Bondless Power Module for High-Frequency Power Electronic Applications","authors":"Si Huang, Zhong Chen","doi":"10.4071/imaps.1426127","DOIUrl":"https://doi.org/10.4071/imaps.1426127","url":null,"abstract":"\u0000 This article reports a double-sided stacked wire-bondless power module package for silicon carbide (SiC) power devices to achieve low parasitic inductance and improved thermal performance for high-frequency applications. The design, simulation, fabrication, and characterization of the power module are presented. A half-bridge module based on the SiC power MOSFETs is demonstrated with minimized parasitic inductance. Double-sided cooling paths are used to maximize heat dissipation. Besides conventional packaging materials used in the power module fabrication, a low-temperature cofired ceramic (LTCC) and nickel-plated copper balls are used in this module package. The LTCC acts as an interposer providing both electrical and thermal routings. The nickel-plated copper balls replace bond wires as the electrical interconnections for the SiC power devices. The electrical and thermo-mechanical simulations of the power module are performed, and its switching performance is evaluated experimentally.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45297553","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Vianco, A. Kilgo, B. McKenzie, S. Williams, R. Ferrizz, Curtis Co
The performance and reliability were documented for solder joints made between the 96.5Sn-3.0Ag-0.5Cu (wt.%, abbreviated SAC305) Pb-free solder and a Ag-Pd-Pt thick film conductor on an alumina substrate. The Sheppard’s hook pull test was used to assess the solder joint strength. The Part 1 study confirmed that the solder joint fabrication process had a wide process window. The current study determined that the SAC305 solder joints maintained that robustness after accelerated aging at temperatures of 70–205°C and time durations of 5–200 d. Short-term aging of 5–10 d caused a peak in the pull strength peak that resulted from precipitation hardening by Ag-Pd and (Pd, Pt)xSny intermetallic compound (IMC) particles. The pull strengths did not decrease significantly after longer aging times at 70°C and 100°C; those conditions were accelerations of typical service lifetimes. Longer aging times at temperatures of 135–205°C resulted in a gradual, albeit not catastrophic, strength decrease when the precipitation hardening mechanism was lost to dissolution of the particle phases and their reprecipitation at the solder/alumina interface. The failure modes were ductile fracture in the solder except for the most severe aging conditions. These findings confirmed that the SAC305 solder/Ag-Pd-Pt thick film interconnections have excellent long-term reliability for hybrid microcircuit and high-temperature electronics applications.
{"title":"Mechanical Properties and Interface Microstructure of SAC305 Solder Joints Made to a Ag-Pd-Pt Thick Film Metallization: Part 2—Isothermal Aging Effects","authors":"P. Vianco, A. Kilgo, B. McKenzie, S. Williams, R. Ferrizz, Curtis Co","doi":"10.4071/imaps.1463995","DOIUrl":"https://doi.org/10.4071/imaps.1463995","url":null,"abstract":"\u0000 The performance and reliability were documented for solder joints made between the 96.5Sn-3.0Ag-0.5Cu (wt.%, abbreviated SAC305) Pb-free solder and a Ag-Pd-Pt thick film conductor on an alumina substrate. The Sheppard’s hook pull test was used to assess the solder joint strength. The Part 1 study confirmed that the solder joint fabrication process had a wide process window. The current study determined that the SAC305 solder joints maintained that robustness after accelerated aging at temperatures of 70–205°C and time durations of 5–200 d. Short-term aging of 5–10 d caused a peak in the pull strength peak that resulted from precipitation hardening by Ag-Pd and (Pd, Pt)xSny intermetallic compound (IMC) particles. The pull strengths did not decrease significantly after longer aging times at 70°C and 100°C; those conditions were accelerations of typical service lifetimes. Longer aging times at temperatures of 135–205°C resulted in a gradual, albeit not catastrophic, strength decrease when the precipitation hardening mechanism was lost to dissolution of the particle phases and their reprecipitation at the solder/alumina interface. The failure modes were ductile fracture in the solder except for the most severe aging conditions. These findings confirmed that the SAC305 solder/Ag-Pd-Pt thick film interconnections have excellent long-term reliability for hybrid microcircuit and high-temperature electronics applications.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47050436","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Dania Bani Hani, R. Athamneh, Mohammed A. Aljarrah, S. Hamasha
SAC-based alloys are one of the most common solder materials that are utilized to provide mechanical support and electrical connection between electronic components and the printed circuit board. Enhancing the mechanical properties of solder joints can improve the life of the components. One of the mechanical properties that define the solder joint structure integrity is the shear strength. The main objective of this study is to assess the shear strength behavior of SAC305 solder joints under different aging conditions. Instron 5948 Micromechanical Tester with a customized fixture is used to perform accelerated shear tests on individual solder joints. The shear strength of SAC305 solder joints with organic solderability preservative (OSP) surface finish is investigated at constant strain rate under different aging times (2, 10, 100, and 1,000 h) and different aging temperatures (50, 100, and 150°C). The nonaged solder joints are examined as well for comparison purposes. Analysis of variance (ANOVA) is accomplished to identify the contribution of each parameter on the shear strength. A general empirical model is developed to estimate the shear strength as a function of aging conditions using the Arrhenius term. Microstructure analysis is performed at different aging conditions using scanning electron microscope (SEM). The results revealed a significant reduction in the shear strength when the aging level is increased. An increase in the precipitates coarsening and intermetallic compound (IMC) layer thickness are observed with increased aging time and temperature.
{"title":"Shear Strength Degradation Modeling of Lead-Free Solder Joints at Different Isothermal Aging Conditions","authors":"Dania Bani Hani, R. Athamneh, Mohammed A. Aljarrah, S. Hamasha","doi":"10.4071/imaps.1423793","DOIUrl":"https://doi.org/10.4071/imaps.1423793","url":null,"abstract":"\u0000 SAC-based alloys are one of the most common solder materials that are utilized to provide mechanical support and electrical connection between electronic components and the printed circuit board. Enhancing the mechanical properties of solder joints can improve the life of the components. One of the mechanical properties that define the solder joint structure integrity is the shear strength. The main objective of this study is to assess the shear strength behavior of SAC305 solder joints under different aging conditions. Instron 5948 Micromechanical Tester with a customized fixture is used to perform accelerated shear tests on individual solder joints. The shear strength of SAC305 solder joints with organic solderability preservative (OSP) surface finish is investigated at constant strain rate under different aging times (2, 10, 100, and 1,000 h) and different aging temperatures (50, 100, and 150°C). The nonaged solder joints are examined as well for comparison purposes. Analysis of variance (ANOVA) is accomplished to identify the contribution of each parameter on the shear strength. A general empirical model is developed to estimate the shear strength as a function of aging conditions using the Arrhenius term. Microstructure analysis is performed at different aging conditions using scanning electron microscope (SEM). The results revealed a significant reduction in the shear strength when the aging level is increased. An increase in the precipitates coarsening and intermetallic compound (IMC) layer thickness are observed with increased aging time and temperature.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46882560","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Vianco, A. Kilgo, B. McKenzie, S. Williams, R. Ferrizz, Curtis Co
The processibility was document for interconnections made between the 96.5Sn-3.0Ag-0.5Cu (wt.%, abbreviated SAC305) Pb-free solder and an Ag-Pd-Pt thick film conductor on an alumina substrate. The Sheppard’s hook pull test was used to assess the solder joint strength. Microanalysis techniques documented the corresponding microstructures. Excellent solderability was observed across the process parameters defined by the soldering temperatures of 240–290°C and soldering times of 15–120 s. Molten SAC305 solder dissolved the Ag-Pd-Pt thick film, leading to the precipitation of Ag (trace of Pd) and (Pd, Pt)xSny intermetallic compound (IMC) particles upon solidification. The mechanical strengths of the solder joints were excellent (10–15 N) and remained largely insensitive to the processing conditions. The failure mode was ductile fracture in the solder. These findings confirmed that the SAC305 solder/Ag-Pd-Pt thick film interconnection system had the necessary process window for use in high reliability, hybrid microcircuit (HMC) applications.
{"title":"Mechanical Properties and Interface Microstructure of SAC305 Solder Joints Made to an Ag-Pd-Pt Thick Film Metallization: Part 1—Processing Effects","authors":"P. Vianco, A. Kilgo, B. McKenzie, S. Williams, R. Ferrizz, Curtis Co","doi":"10.4071/imaps.1435232","DOIUrl":"https://doi.org/10.4071/imaps.1435232","url":null,"abstract":"\u0000 The processibility was document for interconnections made between the 96.5Sn-3.0Ag-0.5Cu (wt.%, abbreviated SAC305) Pb-free solder and an Ag-Pd-Pt thick film conductor on an alumina substrate. The Sheppard’s hook pull test was used to assess the solder joint strength. Microanalysis techniques documented the corresponding microstructures. Excellent solderability was observed across the process parameters defined by the soldering temperatures of 240–290°C and soldering times of 15–120 s. Molten SAC305 solder dissolved the Ag-Pd-Pt thick film, leading to the precipitation of Ag (trace of Pd) and (Pd, Pt)xSny intermetallic compound (IMC) particles upon solidification. The mechanical strengths of the solder joints were excellent (10–15 N) and remained largely insensitive to the processing conditions. The failure mode was ductile fracture in the solder. These findings confirmed that the SAC305 solder/Ag-Pd-Pt thick film interconnection system had the necessary process window for use in high reliability, hybrid microcircuit (HMC) applications.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48571137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Tzu-Hsuan Cheng, Kenji Nishiguchi, Y. Fukawa, B. Baliga, S. Bhattacharya, D. Hopkins
Wide-Band Gap (WBG) power devices have become a promising option for high-power applications due to the superior material properties over traditional Silicon. To not limit WBG devices’ mother nature, a rugged and high-performance power device packaging solution is necessary. This study proposes a Double-Side Cooled (DSC) 1.2 kV half-bridge power module having dual epoxy resin insulated metal substrate (eIMS) for solving convectional power module challenges and providing a cost-effective solution. The thermal performance outperforms traditional Alumina (Al2O3) Direct Bonded Copper (DBC) DSC power module due to moderate thermal conductivity (10 W/mK) and thin (120 mm) epoxy resin composite dielectric working as the IMS insulation layer. This novel organic dielectric can withstand high voltage (5 kVAC @ 120 μm) and has a Glass Transition Temperature (Tg) of 300°C, which is suitable for high-power applications. In the thermal-mechanical modeling, the organic DSC power module can pass the thermal cycling test over 1,000 cycles by optimizing the mechanical properties of the encapsulant material. In conclusion, this article not only proposes a competitive organic-based power module but also a methodology of evaluation for thermal and mechanical performance.
{"title":"Thermal and Reliability Characterization of an Epoxy Resin-Based Double-Side Cooled Power Module","authors":"Tzu-Hsuan Cheng, Kenji Nishiguchi, Y. Fukawa, B. Baliga, S. Bhattacharya, D. Hopkins","doi":"10.4071/imaps.1427774","DOIUrl":"https://doi.org/10.4071/imaps.1427774","url":null,"abstract":"\u0000 Wide-Band Gap (WBG) power devices have become a promising option for high-power applications due to the superior material properties over traditional Silicon. To not limit WBG devices’ mother nature, a rugged and high-performance power device packaging solution is necessary. This study proposes a Double-Side Cooled (DSC) 1.2 kV half-bridge power module having dual epoxy resin insulated metal substrate (eIMS) for solving convectional power module challenges and providing a cost-effective solution. The thermal performance outperforms traditional Alumina (Al2O3) Direct Bonded Copper (DBC) DSC power module due to moderate thermal conductivity (10 W/mK) and thin (120 mm) epoxy resin composite dielectric working as the IMS insulation layer. This novel organic dielectric can withstand high voltage (5 kVAC @ 120 μm) and has a Glass Transition Temperature (Tg) of 300°C, which is suitable for high-power applications. In the thermal-mechanical modeling, the organic DSC power module can pass the thermal cycling test over 1,000 cycles by optimizing the mechanical properties of the encapsulant material. In conclusion, this article not only proposes a competitive organic-based power module but also a methodology of evaluation for thermal and mechanical performance.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2021-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48406744","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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