Hongwen Zhang, Tyler Richmond, Kyle Aserian, Samuel Lytwynec, Tybarius Harter, Diego Prado
Sn-based high-temperature Pb-free (HTLF) solder pastes have been developed as a drop-in solution to replace high- Pb solder pastes in power discrete applications. The pastes were designed with Indium Corporation’s DurafuseVR technology, to combine the merits of two constituent powders. A SnSb-based Ag/ Cu-containing high-temperature powder, with a melting temperature above 320 degrees C, was designed to maintain high-temperature performance. A Sn-rich SnAgCu-Sb powder, with a melting temperature around 228 degrees C, was added to the paste to enhance wetting and improve joint ductility. In the design, the final joint will have the low-melting phase (the melting temperature >228 degrees C) in a controllable quantity embedded into the high-melting SnSb matrix. HTLF-1, one of the designs, maintained the bond shear strength up to 15 MPa, even around 290 degrees C. Another design, HTLF-2, has a similar bond shear strength as Pb92.5/Sn5/Ag2.5 around 290 degrees C, but exceeds substantially below 250 degrees C. The power discrete components had been built with both HTLF solder pastes for both die-attach and clip-bond through the traditional high-Pb process, which demonstrated the drop-in processing compatibility. The components survived three additional surface mounting (SMT) reflows (peak temperature upto 260 degrees C) and passed moisture sensitivity level 1 (MSL1). This confirmed that the maintained joint strength (comparable to or stronger than high-Pb), helped to keep the joint integrity within the encapsulated components in the following SMT process, even with the controlled quantity of the melting phases above 228 degrees C. Both HTLF solder pastes outperformed Pb92.5/Sn5/Ag2.5 in the resistance from drain to source when power is on (RDS(on)), even after 1,000 cycles of temperature cycling test (TCT) under 255/175 degrees C, which is attributed to the intrinsic lower electrical resistivity of Sn in both HTLF pastes. Microstructural observation had shown no corner cracks for both die-attach and clip-bond joints after TCT.
{"title":"A Drop-In High-Temperature Pb-Free Solder Paste That Outperforms High-Pb Pastes in Power Discrete Applications","authors":"Hongwen Zhang, Tyler Richmond, Kyle Aserian, Samuel Lytwynec, Tybarius Harter, Diego Prado","doi":"10.4071/001c.81981","DOIUrl":"https://doi.org/10.4071/001c.81981","url":null,"abstract":"Sn-based high-temperature Pb-free (HTLF) solder pastes have been developed as a drop-in solution to replace high- Pb solder pastes in power discrete applications. The pastes were designed with Indium Corporation’s DurafuseVR technology, to combine the merits of two constituent powders. A SnSb-based Ag/ Cu-containing high-temperature powder, with a melting temperature above 320 degrees C, was designed to maintain high-temperature performance. A Sn-rich SnAgCu-Sb powder, with a melting temperature around 228 degrees C, was added to the paste to enhance wetting and improve joint ductility. In the design, the final joint will have the low-melting phase (the melting temperature >228 degrees C) in a controllable quantity embedded into the high-melting SnSb matrix. HTLF-1, one of the designs, maintained the bond shear strength up to 15 MPa, even around 290 degrees C. Another design, HTLF-2, has a similar bond shear strength as Pb92.5/Sn5/Ag2.5 around 290 degrees C, but exceeds substantially below 250 degrees C. The power discrete components had been built with both HTLF solder pastes for both die-attach and clip-bond through the traditional high-Pb process, which demonstrated the drop-in processing compatibility. The components survived three additional surface mounting (SMT) reflows (peak temperature upto 260 degrees C) and passed moisture sensitivity level 1 (MSL1). This confirmed that the maintained joint strength (comparable to or stronger than high-Pb), helped to keep the joint integrity within the encapsulated components in the following SMT process, even with the controlled quantity of the melting phases above 228 degrees C. Both HTLF solder pastes outperformed Pb92.5/Sn5/Ag2.5 in the resistance from drain to source when power is on (RDS(on)), even after 1,000 cycles of temperature cycling test (TCT) under 255/175 degrees C, which is attributed to the intrinsic lower electrical resistivity of Sn in both HTLF pastes. Microstructural observation had shown no corner cracks for both die-attach and clip-bond joints after TCT.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2023-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135672471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Kappert, S. Schopferer, N. Saeidi, R. Döring, S. Ziesche, A. Olowinsky, Falk Naumann, M. Jägle, M. Spanier, A. Grabmaier
Sensors are key elements for capturing environmental properties and are today indispensable in the industry for monitoring and control of industrial processes. Many applications are demanding for highly integrated intelligent sensors to meet the requirements on safety, clean, and energy-efficient operation, or to gain process information in the context of industry 4.0. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently, the use of sensor systems is impossible due to the fact that the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical loads do not allow a reliable operation of sensitive electronic components. Eight Fraunhofer Institutes have bundled their competencies and have run the Fraunhofer Lighthouse Project “eHarsh” to overcome this situation. The project goal was to realize sensor systems for extremely harsh environments, whereby sensor systems are more than pure sensors, rather these are containing one or multiple sensing elements and integrated readout electronics. Various technologies, which are necessary for the realization of such sensor systems, have been identified, developed, and finally bundled in a technology platform. These technologies are, e.g., MEMS and ceramic-based sensors, SOI-CMOS-based integrated electronics, board assembly and laser-based joining technologies. All these developments have been accompanied by comprehensive tests, material characterization, and reliability simulations. Based on the platform, a pressure sensor for turbine applications has been realized to prove the performance of the eHarsh technology platform.
{"title":"Sensor Systems for Extremely Harsh Environments","authors":"H. Kappert, S. Schopferer, N. Saeidi, R. Döring, S. Ziesche, A. Olowinsky, Falk Naumann, M. Jägle, M. Spanier, A. Grabmaier","doi":"10.4071/001c.57715","DOIUrl":"https://doi.org/10.4071/001c.57715","url":null,"abstract":"Sensors are key elements for capturing environmental properties and are today indispensable in the industry for monitoring and control of industrial processes. Many applications are demanding for highly integrated intelligent sensors to meet the requirements on safety, clean, and energy-efficient operation, or to gain process information in the context of industry 4.0. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently, the use of sensor systems is impossible due to the fact that the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical loads do not allow a reliable operation of sensitive electronic components. Eight Fraunhofer Institutes have bundled their competencies and have run the Fraunhofer Lighthouse Project “eHarsh” to overcome this situation. The project goal was to realize sensor systems for extremely harsh environments, whereby sensor systems are more than pure sensors, rather these are containing one or multiple sensing elements and integrated readout electronics. Various technologies, which are necessary for the realization of such sensor systems, have been identified, developed, and finally bundled in a technology platform. These technologies are, e.g., MEMS and ceramic-based sensors, SOI-CMOS-based integrated electronics, board assembly and laser-based joining technologies. All these developments have been accompanied by comprehensive tests, material characterization, and reliability simulations. Based on the platform, a pressure sensor for turbine applications has been realized to prove the performance of the eHarsh technology platform.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49045510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Angelika Hable, Paul Tabatabai, H. L. Lichtenegger, Anton Scherr, T. Krivec, D. Gruber
Increasingly high demands are being placed on the quality inspection of printed circuit boards (PCBs). A full surface inspection of all produced PCBs and a high defect detection accuracy of the inspection system are becoming prerequisites for an efficient quality management. At the same time, the demand for PCBs is constantly increasing over the years due to the high demand for electrical devices. Human inspection is no longer feasible due to the high production rates and required defect detection accuracy. Therefore, automatic inspection systems are increasingly used for quality control in the various process steps of PCB production. In this article, the first automatic inspection system for detecting defects on Electroless Nickel Immersion Gold (ENIG) and Electroless Nickel Immersion Palladium Immersion Gold (ENIPIG) surfaces is presented. A pretrained convolutional neural network (CNN) and the sliding window approach are used. A training dataset consisting of six different defect types and an OK class containing only defect-free PCB images was labeled for this classification problem. The hyperparameters learning rate and batch size are varied for different training runs of the CNN, and the performance of the network in PCB defect detection is evaluated using a test dataset. The true-positive rate, truenegative rate, and F1-score were analyzed for the evaluation. Our results show that the best performances could be achieved at low batch sizes and low learning rates.
{"title":"Detection of Printed Circuit Board Defects on ENIG and ENIPIG Surface Finishes with Convolutional Neural Networks and Evaluation of Training Parameters","authors":"Angelika Hable, Paul Tabatabai, H. L. Lichtenegger, Anton Scherr, T. Krivec, D. Gruber","doi":"10.4071/001c.57717","DOIUrl":"https://doi.org/10.4071/001c.57717","url":null,"abstract":"Increasingly high demands are being placed on the quality inspection of printed circuit boards (PCBs). A full surface inspection of all produced PCBs and a high defect detection accuracy of the inspection system are becoming prerequisites for an efficient quality management. At the same time, the demand for PCBs is constantly increasing over the years due to the high demand for electrical devices. Human inspection is no longer feasible due to the high production rates and required defect detection accuracy. Therefore, automatic inspection systems are increasingly used for quality control in the various process steps of PCB production. In this article, the first automatic inspection system for detecting defects on Electroless Nickel Immersion Gold (ENIG) and Electroless Nickel Immersion Palladium Immersion Gold (ENIPIG) surfaces is presented. A pretrained convolutional neural network (CNN) and the sliding window approach are used. A training dataset consisting of six different defect types and an OK class containing only defect-free PCB images was labeled for this classification problem. The hyperparameters learning rate and batch size are varied for different training runs of the CNN, and the performance of the network in PCB defect detection is evaluated using a test dataset. The true-positive rate, truenegative rate, and F1-score were analyzed for the evaluation. Our results show that the best performances could be achieved at low batch sizes and low learning rates.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42069111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The thermal load on electronic assemblies is constantly increasing. The reasons for this increase are, on the one hand, the integration of power electronic components in an ever smaller space and, thus, an increasing power density and, on the other hand, the increasingly harsh environmental conditions with high temperature load. In addition to electronic components and substrate materials, the soldered connections are also exposed to this stress and must withstand it. The thermal stability is primarily determined by the melting temperature of the solder material or by the remelting temperature of the final solder interconnection. The remelting temperature can be purposefully increased through diffusion soldering. The advantage of diffusion soldering is that the operating temperature of the final solder joint can exceed the joining process temperatures. By using the composite soldering materials and diffusion soldering process, it is possible to produce the solder interconnections that can withstand the high thermal and thermomechanical stress. In this work, the composite solder material, consisting of the base solder alloy BiSnAg in eutectic composition with a melting point of 139 degrees C and added copper particles, was examined. The added copper particles have a direct influence on the dynamics of the diffusion process. Diffusion can also be influenced by adjusting the soldering process parameters, such as maximum temperature and time above liquidus of the base solder alloy, with the aim of achieving isothermal solidification. The solidification can take place through the parallel reactions: the reaction between tin and copper with the formation of high-melting intermetallic phases Cu3Sn and Cu6Sn5 and the growth of bismuth (Bi) crystals through coarsening of the structure and tin depletion in the original eutectic solder alloy.
{"title":"Composite Soldering Materials Based on BiSnAg for High-Temperature Stable Solder Joints","authors":"A. Novikov, M. Nowottnick","doi":"10.4071/001c.57716","DOIUrl":"https://doi.org/10.4071/001c.57716","url":null,"abstract":"The thermal load on electronic assemblies is constantly increasing. The reasons for this increase are, on the one hand, the integration of power electronic components in an ever smaller space and, thus, an increasing power density and, on the other hand, the increasingly harsh environmental conditions with high temperature load. In addition to electronic components and substrate materials, the soldered connections are also exposed to this stress and must withstand it. The thermal stability is primarily determined by the melting temperature of the solder material or by the remelting temperature of the final solder interconnection. The remelting temperature can be purposefully increased through diffusion soldering. The advantage of diffusion soldering is that the operating temperature of the final solder joint can exceed the joining process temperatures. By using the composite soldering materials and diffusion soldering process, it is possible to produce the solder interconnections that can withstand the high thermal and thermomechanical stress. In this work, the composite solder material, consisting of the base solder alloy BiSnAg in eutectic composition with a melting point of 139 degrees C and added copper particles, was examined. The added copper particles have a direct influence on the dynamics of the diffusion process. Diffusion can also be influenced by adjusting the soldering process parameters, such as maximum temperature and time above liquidus of the base solder alloy, with the aim of achieving isothermal solidification. The solidification can take place through the parallel reactions: the reaction between tin and copper with the formation of high-melting intermetallic phases Cu3Sn and Cu6Sn5 and the growth of bismuth (Bi) crystals through coarsening of the structure and tin depletion in the original eutectic solder alloy.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44284732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Towards Improvement of the Reliability of Advanced Packaging: The Pivotal Role of Uniformity of Electrolytic Deposition Processes","authors":"R. Schmidt, Jens Palm, C. Schwarz, J. Knaup","doi":"10.4071/imaps.1700218","DOIUrl":"https://doi.org/10.4071/imaps.1700218","url":null,"abstract":"","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70526105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Ricky Tsun-Sheng Chou, J. Lau, Gary Chang-Fu Chen, Jones Yu-Cheng Huang, Channing Cheng-Lin Yang, H. Liu, T. Tseng
In this study, the heterogeneous integration of two chips on a 2.3D hybrid substrate using solder joint and underfill is investigated. Emphasis is placed on the materials, design, process, fabrication, and reliability of the package. Drop test and results of the package are also provided.
{"title":"Heterogeneous Integration on 2.3D Hybrid Substrate Using Solder Joint and Underfill","authors":"Ricky Tsun-Sheng Chou, J. Lau, Gary Chang-Fu Chen, Jones Yu-Cheng Huang, Channing Cheng-Lin Yang, H. Liu, T. Tseng","doi":"10.4071/imaps.1546248","DOIUrl":"https://doi.org/10.4071/imaps.1546248","url":null,"abstract":"\u0000 In this study, the heterogeneous integration of two chips on a 2.3D hybrid substrate using solder joint and underfill is investigated. Emphasis is placed on the materials, design, process, fabrication, and reliability of the package. Drop test and results of the package are also provided.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41861966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. Kappert, Sebastian Braun, N. Kordas, Andre Kosfeld, A. Utz, C. Weber, Olaf Rämer, M. Spanier, M. Ihle, S. Ziesche, R. Kokozinski
Sensors are the key elements for capturing environmental properties and are increasingly important in the industry for the intelligent control of industrial processes. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently, the use of sensor systems is impossible, because the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical load do not allow the reliable operation of sensitive electronic components. Fraunhofer is running the Lighthouse Project “eHarsh” to overcome this hurdle. In the course of the project, an integrated sensor readout electronic has been realized based on a set of three chips. A dedicated sensor fron-tend provides the analog sensor interface for resistive sensors typically arranged in a Wheatstone configuration. Furthermore, the chipset includes a 32-bit microcontroller for signal conditioning and sensor control. Finally, it comprises an interface chip including a bus transceiver and voltage regulators. The chipset has been realized in a high-temperature 0.35-micron SOI-CMOS technology focusing operating temperatures up to 300°C. The chipset is assembled on a multilayer ceramic low-temperature cofired ceramics (LTCC) board using flip chip technology. The ceramic board consists of four layers with a total thickness of approximately 0.9 mm. The internal wiring is based on silver paste while the external contacts were alternatively manufactured in silver (sintering/soldering) or in gold alloys (wire bonding). As an interconnection technology, silver sintering has been applied. It has already been shown that a significant increase in lifetime can be reached by using silver sintering for die attach applications. Using silver sintering for flip chip technology is a new and challenging approach. By adjusting the process parameter geared to the chipset design and the design of the ceramic board high-quality flip chip interconnects can be generated.
{"title":"A High Temperature SOI-CMOS Chipset Focusing Sensor Electronics for Operating Temperatures up to 300°C","authors":"H. Kappert, Sebastian Braun, N. Kordas, Andre Kosfeld, A. Utz, C. Weber, Olaf Rämer, M. Spanier, M. Ihle, S. Ziesche, R. Kokozinski","doi":"10.4071/imaps.1547377","DOIUrl":"https://doi.org/10.4071/imaps.1547377","url":null,"abstract":"\u0000 Sensors are the key elements for capturing environmental properties and are increasingly important in the industry for the intelligent control of industrial processes. While in many everyday objects highly integrated sensor systems are already state of the art, the situation in an industrial environment is clearly different. Frequently, the use of sensor systems is impossible, because the extreme ambient conditions of industrial processes like high operating temperatures or strong mechanical load do not allow the reliable operation of sensitive electronic components. Fraunhofer is running the Lighthouse Project “eHarsh” to overcome this hurdle. In the course of the project, an integrated sensor readout electronic has been realized based on a set of three chips. A dedicated sensor fron-tend provides the analog sensor interface for resistive sensors typically arranged in a Wheatstone configuration. Furthermore, the chipset includes a 32-bit microcontroller for signal conditioning and sensor control. Finally, it comprises an interface chip including a bus transceiver and voltage regulators. The chipset has been realized in a high-temperature 0.35-micron SOI-CMOS technology focusing operating temperatures up to 300°C. The chipset is assembled on a multilayer ceramic low-temperature cofired ceramics (LTCC) board using flip chip technology. The ceramic board consists of four layers with a total thickness of approximately 0.9 mm. The internal wiring is based on silver paste while the external contacts were alternatively manufactured in silver (sintering/soldering) or in gold alloys (wire bonding). As an interconnection technology, silver sintering has been applied. It has already been shown that a significant increase in lifetime can be reached by using silver sintering for die attach applications. Using silver sintering for flip chip technology is a new and challenging approach. By adjusting the process parameter geared to the chipset design and the design of the ceramic board high-quality flip chip interconnects can be generated.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46834957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Müller, S. Letz, Flaviu Simon, C. F. Bayer, A. Schletz, J. Görlich, T. Nishimura
Despite the higher thermal conductivity and the higher lifetime offered by silver sintering technologies, most packaged GaN devices are attached using solders due to technological difficulties in the sintering process. In this work, a silver sintering process for a packaged GaN power transistor on a printed circuit board (PCB) was successfully developed. Different sintering paste types were examined regarding their suitability for this application. Electrical measurements, shear tests, and metallographic cross sections were used for the evaluation. Numerical analyses were used to study the internal stress distribution in the GaN package after sintering depending on the paste structure. In the final sintering process, a shear strength of 20 MPa for sintering at 15 MPa and 240°C, for 300 s with electrical functional devices could be obtained by using nanoscale sintering paste. The authors contribute this to the high initial stiffness of the silver layer, which is obtained much earlier in the sintering process compared with the stiffness of a microscale silver paste. This high initial stiffness counteracts the semiconductor device deflection from the applied sintering pressure and reduces the stresses inside the semiconductor.
{"title":"Silver Sintering of Packaged GaN-Devices on Printed Circuit Board","authors":"J. Müller, S. Letz, Flaviu Simon, C. F. Bayer, A. Schletz, J. Görlich, T. Nishimura","doi":"10.4071/imaps.1675410","DOIUrl":"https://doi.org/10.4071/imaps.1675410","url":null,"abstract":"\u0000 Despite the higher thermal conductivity and the higher lifetime offered by silver sintering technologies, most packaged GaN devices are attached using solders due to technological difficulties in the sintering process. In this work, a silver sintering process for a packaged GaN power transistor on a printed circuit board (PCB) was successfully developed. Different sintering paste types were examined regarding their suitability for this application. Electrical measurements, shear tests, and metallographic cross sections were used for the evaluation. Numerical analyses were used to study the internal stress distribution in the GaN package after sintering depending on the paste structure. In the final sintering process, a shear strength of 20 MPa for sintering at 15 MPa and 240°C, for 300 s with electrical functional devices could be obtained by using nanoscale sintering paste. The authors contribute this to the high initial stiffness of the silver layer, which is obtained much earlier in the sintering process compared with the stiffness of a microscale silver paste. This high initial stiffness counteracts the semiconductor device deflection from the applied sintering pressure and reduces the stresses inside the semiconductor.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46018990","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
J. Bell, L. Redmond, Kalind C. Carpenter, J. de la Croix
Rigid-flex circuit boards are becoming more prevalent as the limits are pushed on the size, mass, and geometry of electronic systems. A key aspect of designing a rigid-flex printed circuit boards (PCB) system is an assessment of the dynamic properties of the PCB and predicting system performance under dynamic loading. Among current modeling methodologies for rigid-flex PCB, a simplified modeling methodology that adequately captures the system dynamics does not exist. This article presents a novel, computationally efficient approach for modeling rigid-flex PCB systems and the calibration of the material models via modal testing. The resulting simplified model is able to capture system frequencies, mode shapes, and representative force-displacement behavior. The proposed methodology is used to model NASA Jet Propulsion Laboratory’s Pop-Up Flat Folding Explorer Robot (PUFFER) and assess the sensitivity of a system model to input parameters.
{"title":"Finite Element Modeling of Rigid-Flex PCBs for Dynamic Environments","authors":"J. Bell, L. Redmond, Kalind C. Carpenter, J. de la Croix","doi":"10.4071/imaps.1655356","DOIUrl":"https://doi.org/10.4071/imaps.1655356","url":null,"abstract":"\u0000 Rigid-flex circuit boards are becoming more prevalent as the limits are pushed on the size, mass, and geometry of electronic systems. A key aspect of designing a rigid-flex printed circuit boards (PCB) system is an assessment of the dynamic properties of the PCB and predicting system performance under dynamic loading. Among current modeling methodologies for rigid-flex PCB, a simplified modeling methodology that adequately captures the system dynamics does not exist. This article presents a novel, computationally efficient approach for modeling rigid-flex PCB systems and the calibration of the material models via modal testing. The resulting simplified model is able to capture system frequencies, mode shapes, and representative force-displacement behavior. The proposed methodology is used to model NASA Jet Propulsion Laboratory’s Pop-Up Flat Folding Explorer Robot (PUFFER) and assess the sensitivity of a system model to input parameters.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41929192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Investigation of Thermomechanical Stress Generation in Embedded-Die Substrate Package","authors":"M. Matsuura, T. Asano, H. Kanaya","doi":"10.4071/imaps.1715287","DOIUrl":"https://doi.org/10.4071/imaps.1715287","url":null,"abstract":"","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"1 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70525664","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}