Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380897
M. Cimino, H. Lapuyade, M. De matos, T. Taris, Y. Deval, J. Bégueret
A low noise amplifier designed in a 0.13 mum CMOS technology, which has self-test and high reliability capabilities, is presented. Such a LNA could be used in the design of front-end of critical nodes in wireless local area networks to ensure the data transmission. The test of the LNA is based on a built-in self test methodology that permits to monitor its behavior and its reliability is ensured by the use of redundancies. The LNA works under a 0.9 V supply voltage and the test chip has characteristics suitable for 802.11 b/g applications. Parametric faults are injected and detected that demonstrate the efficiency of the BIST circuitry. Switching on each redundant block has proven that the LNA keeps its performances.
提出了一种采用0.13 μ m CMOS工艺设计的具有自检和高可靠性的低噪声放大器。这种LNA可用于无线局域网关键节点前端的设计，以保证数据的传输。LNA的测试基于内置的自我测试方法，该方法允许监控其行为，并且通过使用冗余确保其可靠性。LNA工作在0.9 V电源电压下，测试芯片具有适合802.11 b/g应用的特性。参数故障的注入和检测证明了BIST电路的有效性。在每个冗余块上的切换已经证明LNA保持了它的性能。
{"title":"A Sub 1V CMOS LNA dedicated to 802.11b/g applications with self-test & high reliability capabilities","authors":"M. Cimino, H. Lapuyade, M. De matos, T. Taris, Y. Deval, J. Bégueret","doi":"10.1109/RFIC.2007.380897","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380897","url":null,"abstract":"A low noise amplifier designed in a 0.13 mum CMOS technology, which has self-test and high reliability capabilities, is presented. Such a LNA could be used in the design of front-end of critical nodes in wireless local area networks to ensure the data transmission. The test of the LNA is based on a built-in self test methodology that permits to monitor its behavior and its reliability is ensured by the use of redundancies. The LNA works under a 0.9 V supply voltage and the test chip has characteristics suitable for 802.11 b/g applications. Parametric faults are injected and detected that demonstrate the efficiency of the BIST circuitry. Switching on each redundant block has proven that the LNA keeps its performances.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"48 5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131004976","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380924
B. Heydari, E. Adabi, M. Bohsali, B. Afshar, A. Arbabian, A. Niknejad
An internal unilaterization technique for cas-code devices is analyzed and demonstrated in 90 nm CMOS technology. The substrate network of the device has been incorporated in a circuit technique together with an LC tank on the top gate of the cascode structure. The structure is accurately modeled and conditions for unilaterization of the cascode are derived in terms of the the LC tank parameters. An increase in the maximum stable gain from 7.5 dB to 20 dB has been verified in the measurements using this technique.
{"title":"Internal Unilaterization Technique for CMOS mm-Wave Amplifiers","authors":"B. Heydari, E. Adabi, M. Bohsali, B. Afshar, A. Arbabian, A. Niknejad","doi":"10.1109/RFIC.2007.380924","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380924","url":null,"abstract":"An internal unilaterization technique for cas-code devices is analyzed and demonstrated in 90 nm CMOS technology. The substrate network of the device has been incorporated in a circuit technique together with an LC tank on the top gate of the cascode structure. The structure is accurately modeled and conditions for unilaterization of the cascode are derived in terms of the the LC tank parameters. An increase in the maximum stable gain from 7.5 dB to 20 dB has been verified in the measurements using this technique.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128703499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380919
N. Behdad, D. Shi, W. Hong, K. Sarabandi, M. Flynn
An on-chip miniaturized slot antenna integrated with a CMOS LNA, on the same chip, is presented in this paper. The antenna operates in the 9-10 GHz frequency band, occupies a die area of only 0.3 mm2, and is fabricated in a standard 0.13 mum RF CMOS process. A LNA implemented on the same substrate is directly matched to the antenna. An efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath it. Measurement results of the fabricated prototype indicate that the antenna shows an active gain of -4.4 dBi and an efficiency of 9% in spite of its close proximity to the lossy silicon substrate.
本文提出了一种集成CMOS LNA的片上小型化槽天线。该天线工作在9-10 GHz频段，仅占用0.3 mm2的芯片面积，并采用标准的0.13 μ m RF CMOS工艺制造。在同一基板上实现的LNA直接与天线匹配。一种有效的屏蔽技术被用来屏蔽天线下面的低电阻基板。测量结果表明，尽管天线靠近有损硅衬底，但其有源增益为-4.4 dBi，效率为9%。
{"title":"A 0.3mm/sup 2/ Miniaturized X-Band On-Chip Slot Antenna in 0.13/spl mu/m CMOS","authors":"N. Behdad, D. Shi, W. Hong, K. Sarabandi, M. Flynn","doi":"10.1109/RFIC.2007.380919","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380919","url":null,"abstract":"An on-chip miniaturized slot antenna integrated with a CMOS LNA, on the same chip, is presented in this paper. The antenna operates in the 9-10 GHz frequency band, occupies a die area of only 0.3 mm2, and is fabricated in a standard 0.13 mum RF CMOS process. A LNA implemented on the same substrate is directly matched to the antenna. An efficient shielding technique is used to shield the antenna from the low-resistivity substrate underneath it. Measurement results of the fabricated prototype indicate that the antenna shows an active gain of -4.4 dBi and an efficiency of 9% in spite of its close proximity to the lossy silicon substrate.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130628465","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380965
M.T. Yang, C. Kuo, P. Ho, D.C.W. Kuo, C. Chen, T. Yeh, C. Teng, J. Jayapalan, G. Brown, G. Yeap, Yang Du, S. Liu
The experimental verification of CR018 wideband noise model for AMS/RF CMOS simulation was achieved using the BSIM3v3 flicker noise model, SPICE2 thermal noise model, and induced gate and bulk noises as well. Among which, independent flicker noise corner model scaling with device size was developed to enable low power design. Moreover, the corner frequency was measured experimentally and validated with model simulation. As to the high frequency thermal noise model, we measured the noise figure with varying gate length and compared with model simulations of SPICE2 and BSIM3v3. A good fit of SPICE2 is achieved using a theoretical value of gamma=2/3 even for the shortest channel length of 0.1 Sum. An effective gamma less than 2/3 derived from BSIM3v3 was obtained. In addition, we observed that the induced gate and bulk noises are important in high frequency as the device sized up. Finally, we sanity checked the developed wideband noise model with switched capacitor and VCO phase noise.
{"title":"CR018 Wideband Noise Model for AMS/RF CMOS Simulation","authors":"M.T. Yang, C. Kuo, P. Ho, D.C.W. Kuo, C. Chen, T. Yeh, C. Teng, J. Jayapalan, G. Brown, G. Yeap, Yang Du, S. Liu","doi":"10.1109/RFIC.2007.380965","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380965","url":null,"abstract":"The experimental verification of CR018 wideband noise model for AMS/RF CMOS simulation was achieved using the BSIM3v3 flicker noise model, SPICE2 thermal noise model, and induced gate and bulk noises as well. Among which, independent flicker noise corner model scaling with device size was developed to enable low power design. Moreover, the corner frequency was measured experimentally and validated with model simulation. As to the high frequency thermal noise model, we measured the noise figure with varying gate length and compared with model simulations of SPICE2 and BSIM3v3. A good fit of SPICE2 is achieved using a theoretical value of gamma=2/3 even for the shortest channel length of 0.1 Sum. An effective gamma less than 2/3 derived from BSIM3v3 was obtained. In addition, we observed that the induced gate and bulk noises are important in high frequency as the device sized up. Finally, we sanity checked the developed wideband noise model with switched capacitor and VCO phase noise.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126534477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380875
G. Norris, J. Staudinger, Jau-Horng Chen, C. Rey, P. Pratt, R. Sherman, H. Fraz
Low power adaptive pre-distortion (APD) techniques are applied to nonlinear RF power amplifiers for mobile devices. An APD system is demonstrated which reduces spectral regrowth products by 10-20 dB and increases modulation accuracy by 2-6X. The use of APD allows a reduction in 3 G PA supply current by 2X and provides immunity to load mismatches as high as 8:1.
{"title":"Application of Digital Adaptive Pre-distortion to Mobile Wireless Devices","authors":"G. Norris, J. Staudinger, Jau-Horng Chen, C. Rey, P. Pratt, R. Sherman, H. Fraz","doi":"10.1109/RFIC.2007.380875","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380875","url":null,"abstract":"Low power adaptive pre-distortion (APD) techniques are applied to nonlinear RF power amplifiers for mobile devices. An APD system is demonstrated which reduces spectral regrowth products by 10-20 dB and increases modulation accuracy by 2-6X. The use of APD allows a reduction in 3 G PA supply current by 2X and provides immunity to load mismatches as high as 8:1.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128151152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380841
T. Hancock, M. Straayer, A. Messier
This work presents the design and measurement of a 2 Mbps BFSK transceiver at 1.35 to 1.75 GHz for use in wireless sensor node applications. The receiver is a direct conversion architecture and has a sensitivity of -74 dBm at 2Mbps and consumes 8.0 mW. The transmitter generates orthogonal BFSK modulation through the use of digital pre-emphasis of the synthesizer frequency control word and consumes 9.7 mW including the power amplifier. The transmitter delivers >3 dBm of output power for a total transmitter power efficiency of 23% and a transmitter FOM of 4.85 nJ/bit at 2 Mbps.
{"title":"A Sub-10mW 2Mbps BFSK Transceiver at 1.35 to 1.75GHz","authors":"T. Hancock, M. Straayer, A. Messier","doi":"10.1109/RFIC.2007.380841","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380841","url":null,"abstract":"This work presents the design and measurement of a 2 Mbps BFSK transceiver at 1.35 to 1.75 GHz for use in wireless sensor node applications. The receiver is a direct conversion architecture and has a sensitivity of -74 dBm at 2Mbps and consumes 8.0 mW. The transmitter generates orthogonal BFSK modulation through the use of digital pre-emphasis of the synthesizer frequency control word and consumes 9.7 mW including the power amplifier. The transmitter delivers >3 dBm of output power for a total transmitter power efficiency of 23% and a transmitter FOM of 4.85 nJ/bit at 2 Mbps.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"35 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114035015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380896
O. Eliezer, I. Bashir, R. Staszewski, P. Balsara
We present a novel approach for built-in self-testing (BIST) of an RF wireless transmitter. This approach, based on fully-digital hardware and on software algorithms, allows the testing of the transmitter's analog/RF circuitry while providing low-cost replacements for the costly traditional RF tests. The testing approach is structural in nature and substitutes for the commonly employed RF performance testing of high-cost test equipment and extended test times. The test coverage achieved for the analog circuitry is maximized to approach 100% and the test-time and associated test costs are minimized. The presented techniques have been successfully verified in a commercial 90 nm CMOS single-chip GSM radio based on the Digital RF Processor (DRPtrade) technology.
{"title":"Built-in Self Testing of a DRP-Based GSM Transmitter","authors":"O. Eliezer, I. Bashir, R. Staszewski, P. Balsara","doi":"10.1109/RFIC.2007.380896","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380896","url":null,"abstract":"We present a novel approach for built-in self-testing (BIST) of an RF wireless transmitter. This approach, based on fully-digital hardware and on software algorithms, allows the testing of the transmitter's analog/RF circuitry while providing low-cost replacements for the costly traditional RF tests. The testing approach is structural in nature and substitutes for the commonly employed RF performance testing of high-cost test equipment and extended test times. The test coverage achieved for the analog circuitry is maximized to approach 100% and the test-time and associated test costs are minimized. The presented techniques have been successfully verified in a commercial 90 nm CMOS single-chip GSM radio based on the Digital RF Processor (DRPtrade) technology.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"60 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114041172","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380894
Junghwan Han, R. Gharpurey
A down-conversion receiver that employs a merged IF-amplifier and mixer is described. Down-converted signal at IF is fed back into the mixer transconductor for further amplification. The receiver operates at a nominal supply voltage of 1.2 V with a current requirement of 2.1 mA and provides a peak conversion-gain of 55 dB. The SSB noise figure is 13 dB at an IF of 1 MHz and 9.8 dB at an IF of 4 MHz. The receiver is implemented in a 0.13-mum CMOS process, with a core area of less than 0.1 mm2.
介绍了一种采用中频放大器和混频器合并的下变频接收机。中频处的下变频信号被反馈到混频器变换器进行进一步放大。该接收器工作在1.2 V的标称电源电压下，电流要求为2.1 mA，并提供55db的峰值转换增益。SSB噪声系数在中频为1mhz时为13db，在中频为4mhz时为9.8 dB。该接收器采用0.13 μ m CMOS工艺，核心面积小于0.1 mm2。
{"title":"A 2.5mW 900MHz Receiver Employing Multiband Feedback with Bias Current Reuse","authors":"Junghwan Han, R. Gharpurey","doi":"10.1109/RFIC.2007.380894","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380894","url":null,"abstract":"A down-conversion receiver that employs a merged IF-amplifier and mixer is described. Down-converted signal at IF is fed back into the mixer transconductor for further amplification. The receiver operates at a nominal supply voltage of 1.2 V with a current requirement of 2.1 mA and provides a peak conversion-gain of 55 dB. The SSB noise figure is 13 dB at an IF of 1 MHz and 9.8 dB at an IF of 4 MHz. The receiver is implemented in a 0.13-mum CMOS process, with a core area of less than 0.1 mm2.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123903834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380946
J. John, J. Kirchgessner, D. Morgan, J. Hildreth, M. Dawdy, R. Reuter, Hao Li
A millimeter-wave selective-epi, SiGe:C HBT is described, utilizing a novel, low-cost collector construction. A cutoff frequency (fT) of 200 GHz and a maximum oscillation frequency (fMAX) of 300 GHz is achieved using a self-aligned selective-epi base structure. For a SiGe:C HBT, this is the highest known fMAX obtained without the use of buried layer or deep trench isolation.
{"title":"Novel Collector Structure Enabling Low-Cost Millimeter-Wave SiGe:C BiCMOS Technology","authors":"J. John, J. Kirchgessner, D. Morgan, J. Hildreth, M. Dawdy, R. Reuter, Hao Li","doi":"10.1109/RFIC.2007.380946","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380946","url":null,"abstract":"A millimeter-wave selective-epi, SiGe:C HBT is described, utilizing a novel, low-cost collector construction. A cutoff frequency (fT) of 200 GHz and a maximum oscillation frequency (fMAX) of 300 GHz is achieved using a self-aligned selective-epi base structure. For a SiGe:C HBT, this is the highest known fMAX obtained without the use of buried layer or deep trench isolation.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124068406","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380954
B. Çatli, M. Hella
A novel multi-band VCO is presented, using a double-tuned, current-driven transformer load The dual frequency range oscillator (low band and high band), is based on the ON/OFF switching of current in the secondary port of the transformer. The concept is validated through measurement results from a fabricated prototype in 0.25 mum CMOS technology. The VCO has a measured tuning range of 1.94 to 2.55 GHz for the low-frequency band and 3.6 to 4.77 GHz for the high-frequency band. It draws a current of 1.0 mA from 1.8V supply with a measured phase noise of -116 dBc/Hz at 1 MHz offset from 2.55 GHz carrier. For the high frequency band, it draws 7.5 mA from the same supply with a phase noise of -106 dBc/Hz at 1 MHz offset from 4. 77 GHz carrier.
{"title":"A Dual Band, Wide Tuning Range CMOS Voltage Controlled Oscillator for Multi-Band Radio","authors":"B. Çatli, M. Hella","doi":"10.1109/RFIC.2007.380954","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380954","url":null,"abstract":"A novel multi-band VCO is presented, using a double-tuned, current-driven transformer load The dual frequency range oscillator (low band and high band), is based on the ON/OFF switching of current in the secondary port of the transformer. The concept is validated through measurement results from a fabricated prototype in 0.25 mum CMOS technology. The VCO has a measured tuning range of 1.94 to 2.55 GHz for the low-frequency band and 3.6 to 4.77 GHz for the high-frequency band. It draws a current of 1.0 mA from 1.8V supply with a measured phase noise of -116 dBc/Hz at 1 MHz offset from 2.55 GHz carrier. For the high frequency band, it draws 7.5 mA from the same supply with a phase noise of -106 dBc/Hz at 1 MHz offset from 4. 77 GHz carrier.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121998408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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