Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380866
M. Lynch, C. Demirdag, N. Belabbes, S. Carnevali, C. Lacy, M. Yu, A. Burns, W. An, H. Jin, J. Park, D. Malhi
A highly integrated transceiver for WiMedia UWB applications is presented. Implemented in 130 nm CMOS and operating from 1.2 V and 2.5 V supplies, it features direct conversion transmit and receive paths. Three PLLs with ring-oscillator VCOs are used in a fast-hopping (~2 ns) frequency synthesizer. On-chip calibration is used by several blocks for I/Q mismatch, filter tuning, DC offset cancellation and power control. The transceiver achieves a transmit EVM better than -20.6 dB when operated in 480 Mbps mode.
{"title":"3.1-4.7GHz WiMedia UWB RF/Analog Front-End in 130nm CMOS","authors":"M. Lynch, C. Demirdag, N. Belabbes, S. Carnevali, C. Lacy, M. Yu, A. Burns, W. An, H. Jin, J. Park, D. Malhi","doi":"10.1109/RFIC.2007.380866","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380866","url":null,"abstract":"A highly integrated transceiver for WiMedia UWB applications is presented. Implemented in 130 nm CMOS and operating from 1.2 V and 2.5 V supplies, it features direct conversion transmit and receive paths. Three PLLs with ring-oscillator VCOs are used in a fast-hopping (~2 ns) frequency synthesizer. On-chip calibration is used by several blocks for I/Q mismatch, filter tuning, DC offset cancellation and power control. The transceiver achieves a transmit EVM better than -20.6 dB when operated in 480 Mbps mode.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114534657","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380845
N. Seller, Andreia Cathelin, H. Lapuyade, J. Bégueret, E. Chataigner, Didier Belot
This work demonstrates the feasibility of a distributed voltage controlled oscillator (DVCO) designed for WLAN applications in a 65 nm CMOS process with standard VLSI backend. This DVCO achieves a tuning range of 1.1 GHz (from 10.6 GHz to 11.7 GHz) and a measured phase noise of -116 dBc/Hz at 1 MHz offset from the carrier. To achieve such performances, the DVCO consumes a DC current of 36 mA from a 2 V power supply.
{"title":"A 10GHz Distributed Voltage Controlled Oscillator for WLAN Application in a VLSI 65nm CMOS Process","authors":"N. Seller, Andreia Cathelin, H. Lapuyade, J. Bégueret, E. Chataigner, Didier Belot","doi":"10.1109/RFIC.2007.380845","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380845","url":null,"abstract":"This work demonstrates the feasibility of a distributed voltage controlled oscillator (DVCO) designed for WLAN applications in a 65 nm CMOS process with standard VLSI backend. This DVCO achieves a tuning range of 1.1 GHz (from 10.6 GHz to 11.7 GHz) and a measured phase noise of -116 dBc/Hz at 1 MHz offset from the carrier. To achieve such performances, the DVCO consumes a DC current of 36 mA from a 2 V power supply.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125737402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380966
J. Brinkhoff, S. Rustagi, Jinglin Shi, F. Lin
An accurate and efficient method to extract an equivalent circuit model of a MOSFET is presented. Four-port measurements simplify the determination of important elements, such as the substrate networks. These measurements are also used to extract the MOSFET extrinsic parasitic elements. The accuracy of the model extraction is verified by simulation and measurement to 50 GHz.
{"title":"MOSFET Model Extraction Using 50GHz Four-Port Measurements","authors":"J. Brinkhoff, S. Rustagi, Jinglin Shi, F. Lin","doi":"10.1109/RFIC.2007.380966","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380966","url":null,"abstract":"An accurate and efficient method to extract an equivalent circuit model of a MOSFET is presented. Four-port measurements simplify the determination of important elements, such as the substrate networks. These measurements are also used to extract the MOSFET extrinsic parasitic elements. The accuracy of the model extraction is verified by simulation and measurement to 50 GHz.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124682860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380982
Myeungsu Kim, Kwengmook Lee, Yong-Il Kwon, Joonhyung Lim, T. Park
A 5-GHz frequency synthesizer for ZIGBEE(IEEE 802.15.4) was implemented. It consumes 13.5 mW adopting CMOS Logic divider and robust VCO from process and temperature variation by body voltage control of current source. It incorporates an automatic capacitor-bank tuning loop to extend frequency tuning range. This synthesizer was fabricated in 0.18-um technology; it consumes 7.5 mA at 1.8 V and offers 100 kHz-loop bandwidth and always -103 dBc/Hz at an offset of 1 MHz. the lock time is 30 us. The PLL output tuning range is 14% from 2.258 GHz to 2.614 GHz.
{"title":"5-GHz Frequency Synthesizer With Auto-Calibration Loop","authors":"Myeungsu Kim, Kwengmook Lee, Yong-Il Kwon, Joonhyung Lim, T. Park","doi":"10.1109/RFIC.2007.380982","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380982","url":null,"abstract":"A 5-GHz frequency synthesizer for ZIGBEE(IEEE 802.15.4) was implemented. It consumes 13.5 mW adopting CMOS Logic divider and robust VCO from process and temperature variation by body voltage control of current source. It incorporates an automatic capacitor-bank tuning loop to extend frequency tuning range. This synthesizer was fabricated in 0.18-um technology; it consumes 7.5 mA at 1.8 V and offers 100 kHz-loop bandwidth and always -103 dBc/Hz at an offset of 1 MHz. the lock time is 30 us. The PLL output tuning range is 14% from 2.258 GHz to 2.614 GHz.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129866536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380874
Xuefeng Yu, F. Dai, Dayu Yang, V. Kakani, J. Irwin, R. Jaeger
This paper presents a low power SiGe DDS MMIC with 9-bit phase and 8-bit amplitude resolution. Using more than 9600 transistors, the active area of the DDS is 2.3 × 0.7 mm2. The maximum clock frequency was measured at 9.6 GHz with 4.8 GHz Nyquist output. The DDS MMIC consumes 1.9 W power consumption under 3.3 V/4.0 V dual power supplies. The DDS achieves the best reported power efficiency figure of merit of 5.1 GHz/W. The measured SFDR is 30 dBc with 2.4 GHz outputs at the maximum clock frequency.
{"title":"A 9-Bit 9.6GHz 1.9W Direct Digital Synthesizer RFIC Implemented In 0.18μm SiGe BiCMOS Technology","authors":"Xuefeng Yu, F. Dai, Dayu Yang, V. Kakani, J. Irwin, R. Jaeger","doi":"10.1109/RFIC.2007.380874","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380874","url":null,"abstract":"This paper presents a low power SiGe DDS MMIC with 9-bit phase and 8-bit amplitude resolution. Using more than 9600 transistors, the active area of the DDS is 2.3 × 0.7 mm2. The maximum clock frequency was measured at 9.6 GHz with 4.8 GHz Nyquist output. The DDS MMIC consumes 1.9 W power consumption under 3.3 V/4.0 V dual power supplies. The DDS achieves the best reported power efficiency figure of merit of 5.1 GHz/W. The measured SFDR is 30 dBc with 2.4 GHz outputs at the maximum clock frequency.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129577218","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380971
P. Popplewell, V. Karam, A. Shamim, J. Rogers, C. Plett
A completely integrated receiver design suitable for short range wireless applications is presented. The circuit represents one half of an SoC solution that makes use of an on-chip antenna, and consumes 5.5 mW while receiving. A thin film ultracapacitor and a solar cell can be stacked on top of the chip to supply power to the radio; yielding a completely integrated solution. The receiver makes use of a PLL to initially lock an RF VCO which is then allowed to be injection-locked to an incoming FM signal. An integrated antenna provides adequate gain given the short range radio's intended applications. The solution has a communication range of 1.75 m which can be increased at the expense of the bit-rate, increased power consumption in the receiver, or by using off-chip antennas.
{"title":"A 5.2 GHz BFSK Receiver with On-Chip Antenna for Self-Powered RFID Tags and Medical Sensors","authors":"P. Popplewell, V. Karam, A. Shamim, J. Rogers, C. Plett","doi":"10.1109/RFIC.2007.380971","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380971","url":null,"abstract":"A completely integrated receiver design suitable for short range wireless applications is presented. The circuit represents one half of an SoC solution that makes use of an on-chip antenna, and consumes 5.5 mW while receiving. A thin film ultracapacitor and a solar cell can be stacked on top of the chip to supply power to the radio; yielding a completely integrated solution. The receiver makes use of a PLL to initially lock an RF VCO which is then allowed to be injection-locked to an incoming FM signal. An integrated antenna provides adequate gain given the short range radio's intended applications. The solution has a communication range of 1.75 m which can be increased at the expense of the bit-rate, increased power consumption in the receiver, or by using off-chip antennas.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130766525","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380855
M. Rosker
This paper summarizes recent improvements in the performance and reliability of microwave and millimeter-wave wide-bandgap gallium nitride on silicon carbide devices and their promise for future integrated circuits. Many recent advances have been made as a result of the on-going Phase II wide band gap semiconductor for RF applications (WBGS-RF) program funded by the Defense Advanced Research Projects Agency (DARPA). During Phase II of the program, significant progress has been made toward realizing wide-bandgap devices that provide outstanding performance at reliability levels that will allow their use in a wide variety of high power applications.
{"title":"The Present State of the Art of Wide-Bandgap Semiconductors and Their Future","authors":"M. Rosker","doi":"10.1109/RFIC.2007.380855","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380855","url":null,"abstract":"This paper summarizes recent improvements in the performance and reliability of microwave and millimeter-wave wide-bandgap gallium nitride on silicon carbide devices and their promise for future integrated circuits. Many recent advances have been made as a result of the on-going Phase II wide band gap semiconductor for RF applications (WBGS-RF) program funded by the Defense Advanced Research Projects Agency (DARPA). During Phase II of the program, significant progress has been made toward realizing wide-bandgap devices that provide outstanding performance at reliability levels that will allow their use in a wide variety of high power applications.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132482868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380825
J. Deng, M. Chew, S. Vora, M. Cassia, T. Marra, K. Sahota, V. Aparin
A dual-band transmitter integrated circuit (TxIC), including baseband filter and variable gain amplifier (VGA), upconverter, RF VGA, driver amplifier (DA), is implemented in 0.18 mum CMOS for CDMA applications. The TxIC increases the handset talk time dramatically with the PA-bypass feature. The chip provides more than a total power control range of 80 dB and a fine gain step of 0.25 dB/LSB. The chip achieves 52.3 dBc ACPR at +7 dBm output power with 52.2 mA and 51.7 dBc ACPR at +7 dBm output power with 51.9 mA for low band and high band applications respectively.
{"title":"A dual-band high efficiency CMOS transmitter for wireless CDMA applications","authors":"J. Deng, M. Chew, S. Vora, M. Cassia, T. Marra, K. Sahota, V. Aparin","doi":"10.1109/RFIC.2007.380825","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380825","url":null,"abstract":"A dual-band transmitter integrated circuit (TxIC), including baseband filter and variable gain amplifier (VGA), upconverter, RF VGA, driver amplifier (DA), is implemented in 0.18 mum CMOS for CDMA applications. The TxIC increases the handset talk time dramatically with the PA-bypass feature. The chip provides more than a total power control range of 80 dB and a fine gain step of 0.25 dB/LSB. The chip achieves 52.3 dBc ACPR at +7 dBm output power with 52.2 mA and 51.7 dBc ACPR at +7 dBm output power with 51.9 mA for low band and high band applications respectively.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127942575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380973
J. Borremans, P. Wambacq, G. van der Plas, Y. Rolain, M. Kuijk
The need for a high level of integration in wireless and multi-standard radios, as well as the expensive area in downscaled CMOS pushes towards low-area circuit solutions. Feedback-type inductorless LNAs are such an example. This paper demonstrates a bondpad-size feedback type narrowband LNA using only one stacked inductor. The gain is 20.8 dB at 3.4 GHz with a noise figure of 2.2 dB. This solution is many times smaller than a classical LNA configuration with several inductors, while obtaining similar performance. It is thus an appealing solution for low-area radio integration in digital CMOS.
{"title":"A Bondpad-Size Narrowband LNA for Digital CMOS","authors":"J. Borremans, P. Wambacq, G. van der Plas, Y. Rolain, M. Kuijk","doi":"10.1109/RFIC.2007.380973","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380973","url":null,"abstract":"The need for a high level of integration in wireless and multi-standard radios, as well as the expensive area in downscaled CMOS pushes towards low-area circuit solutions. Feedback-type inductorless LNAs are such an example. This paper demonstrates a bondpad-size feedback type narrowband LNA using only one stacked inductor. The gain is 20.8 dB at 3.4 GHz with a noise figure of 2.2 dB. This solution is many times smaller than a classical LNA configuration with several inductors, while obtaining similar performance. It is thus an appealing solution for low-area radio integration in digital CMOS.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"212 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123286500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-06-03DOI: 10.1109/RFIC.2007.380944
M. Fakhruddin, Mao-Chyuan Tang, J. Kuo, J. Karp, D. Chen, C. Yeh, S. Chien
Hot carrier stress (HCS) induces significant degradation on the performance of 65 nm RF n-MOSFET with minimum poly length (Lpoly). Although the cutoff frequency (Ft) is very high (~212 GHz) for these devices, the high HCS degradation poses a challenge for RF application. Additional effort will be needed to improve the process and/or device to take full advantage of the record n-MOSFET performance.
{"title":"Hot Carrier Degradation and Performance of 65nm RF n-MOSFET","authors":"M. Fakhruddin, Mao-Chyuan Tang, J. Kuo, J. Karp, D. Chen, C. Yeh, S. Chien","doi":"10.1109/RFIC.2007.380944","DOIUrl":"https://doi.org/10.1109/RFIC.2007.380944","url":null,"abstract":"Hot carrier stress (HCS) induces significant degradation on the performance of 65 nm RF n-MOSFET with minimum poly length (Lpoly). Although the cutoff frequency (Ft) is very high (~212 GHz) for these devices, the high HCS degradation poses a challenge for RF application. Additional effort will be needed to improve the process and/or device to take full advantage of the record n-MOSFET performance.","PeriodicalId":356468,"journal":{"name":"2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116080580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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