Pub Date : 2020-12-02DOI: 10.1109/OJNANO.2020.3042136
Shelby L. Foster;Prashant Acharya;Mojtaba Abolhassani;Skylar Watson;Sheldon Shinn;Lauren F. Greenlee
Bimetallic nanoparticles comprised of iron and nickel were synthesized, characterized, and evaluated to optimize the ideal metal ratio for azo dye removal from water systems. Results show that changing the molar ratio of nickel to iron caused different removal rates, as well as the extent of overall elimination of azo dye from water. Lower molar ratios, from Ni 1 Fe 10 to Ni 2.5 Fe 10 , exhibited a higher removal efficiency of 80-99%. Higher concentrations of Ni in the catalyst, from Ni 3 Fe 10 to Ni 5 Fe 10 , resulted in 70-90% removal. The lower molar ratios of Ni exhibited a consistent removal rate of 0.11 g/L/min, while the higher molar ratios of Ni displayed varying removal rates of 0.1-0.05 g/L/min. A second order kinetic model was fit to the first twenty minutes of the reaction for all nickel to iron compositions, where there is a decrease in rate constant with an increase in molar ratio. During the last forty minutes of reaction, azo dye removal fit a zero order kinetic model. All as-synthesized nanoparticle samples were found to be structurally disordered based on the lack of distinct peaks in XRD spectra. Post-reaction samples were found to have Fe 2 O 3 and FeOOH cubic peaks.
{"title":"Nickel-Iron Alloy Nanoparticle Characteristics Pre- and Post-Reaction With Orange G","authors":"Shelby L. Foster;Prashant Acharya;Mojtaba Abolhassani;Skylar Watson;Sheldon Shinn;Lauren F. Greenlee","doi":"10.1109/OJNANO.2020.3042136","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3042136","url":null,"abstract":"Bimetallic nanoparticles comprised of iron and nickel were synthesized, characterized, and evaluated to optimize the ideal metal ratio for azo dye removal from water systems. Results show that changing the molar ratio of nickel to iron caused different removal rates, as well as the extent of overall elimination of azo dye from water. Lower molar ratios, from Ni\u0000<sub>1</sub>\u0000Fe\u0000<sub>10</sub>\u0000 to Ni\u0000<sub>2.5</sub>\u0000Fe\u0000<sub>10</sub>\u0000, exhibited a higher removal efficiency of 80-99%. Higher concentrations of Ni in the catalyst, from Ni\u0000<sub>3</sub>\u0000Fe\u0000<sub>10</sub>\u0000 to Ni\u0000<sub>5</sub>\u0000Fe\u0000<sub>10</sub>\u0000, resulted in 70-90% removal. The lower molar ratios of Ni exhibited a consistent removal rate of 0.11 g/L/min, while the higher molar ratios of Ni displayed varying removal rates of 0.1-0.05 g/L/min. A second order kinetic model was fit to the first twenty minutes of the reaction for all nickel to iron compositions, where there is a decrease in rate constant with an increase in molar ratio. During the last forty minutes of reaction, azo dye removal fit a zero order kinetic model. All as-synthesized nanoparticle samples were found to be structurally disordered based on the lack of distinct peaks in XRD spectra. Post-reaction samples were found to have Fe\u0000<sub>2</sub>\u0000O\u0000<sub>3</sub>\u0000 and FeOOH cubic peaks.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"2 ","pages":"16-25"},"PeriodicalIF":1.7,"publicationDate":"2020-12-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3042136","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3488258","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-30DOI: 10.1109/OJNANO.2020.3041399
Orestis Liolis;Vassilios A. Mardiris;Georgios Ch. Sirakoulis;Ioannis G. Karafyllidis
Signal synchronization of large scale Quantum-dot Cellular Automata (QCA) circuits is one of the most complex QCA design challenges. More specifically, the QCA circuits synchronization problem, especially in the large circuits, is characterized as rather complex due to technology constraints. In this paper, by extensively analyzing the most important properties of the signal synchronization problem in QCA circuits, we propose an efficient design methodology to tackle the problem, based on the well-known from computer science, Firing Squad Synchronization Problem (FSSP). Comparing FSSP with the QCA circuits synchronization problem many similarities can be found. Among the numerous FSSP's algorithmic solutions in literature, the Mazoyer algorithm has proven to be the most efficient one. In this paper, a novel design and implementation in QCA technology of this algorithm is presented. Moreover, by the appropriate modification of the Mazoyer algorithm, we are able to propose a generic synchronization design methodology for QCA circuits and systems. This method is enhanced by a novel freezing technique, that makes it applicable to any QCA circuit and system as manifested by our corresponding simulation results. The proposed synchronization methodology is a universal design tool, that can be applied to exiting designs without increasing the complexity.
{"title":"Synchronization in Quantum-Dot Cellular Automata Circuits and Systems","authors":"Orestis Liolis;Vassilios A. Mardiris;Georgios Ch. Sirakoulis;Ioannis G. Karafyllidis","doi":"10.1109/OJNANO.2020.3041399","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3041399","url":null,"abstract":"Signal synchronization of large scale Quantum-dot Cellular Automata (QCA) circuits is one of the most complex QCA design challenges. More specifically, the QCA circuits synchronization problem, especially in the large circuits, is characterized as rather complex due to technology constraints. In this paper, by extensively analyzing the most important properties of the signal synchronization problem in QCA circuits, we propose an efficient design methodology to tackle the problem, based on the well-known from computer science, Firing Squad Synchronization Problem (FSSP). Comparing FSSP with the QCA circuits synchronization problem many similarities can be found. Among the numerous FSSP's algorithmic solutions in literature, the Mazoyer algorithm has proven to be the most efficient one. In this paper, a novel design and implementation in QCA technology of this algorithm is presented. Moreover, by the appropriate modification of the Mazoyer algorithm, we are able to propose a generic synchronization design methodology for QCA circuits and systems. This method is enhanced by a novel freezing technique, that makes it applicable to any QCA circuit and system as manifested by our corresponding simulation results. The proposed synchronization methodology is a universal design tool, that can be applied to exiting designs without increasing the complexity.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"145-156"},"PeriodicalIF":1.7,"publicationDate":"2020-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3041399","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3514220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-27DOI: 10.1109/OJNANO.2020.3041198
He Wang;Nicoleta Cucu Laurenciu;Yande Jiang;Sorin Dan Cotofana
To fully unleash the potential of graphene-based devices for neuromorphic computing, we propose a graphene synapse and a graphene neuron that form together a basic Spiking Neural Network (SNN) unit, which can potentially be utilized to implement complex SNNs. Specifically, the proposed synapse enables two fundamental synaptic functionalities, i.e., Spike-Timing-Dependent Plasticity (STDP) and Long-Term Plasticity, and both Long-Term Potentiation (LTP) and Long-Term Depression (LTD) can be emulated with the same structure by properly adjusting its bias. The proposed neuron captures the essential Leaky Integrate and Fire spiking neuron behavior with post firing refractory interval. We demonstrate the proper operation of the graphene SNN unit by relying on a mixed simulation approach that embeds the high accuracy of atomistic level simulation of graphene structures conductance within the SPICE framework. Subsequently, we analyze the way graphene synaptic plasticity affects the behavior of a 2-layer SNN example consisting of 6 neurons and demonstrate that LTP significantly increases the number of firing events while LTD is diminishing them, as expected. To assess the plausibility of the graphene SNN reaction to input stimuli we simulate its behavior by means of both SPICE and NEST, a well established SNN simulation framework, and demonstrate that the obtained reactions, characterized in terms of total number of firing events and mean Inter-Spike Interval (ISI) length, are in close agreement, which clearly suggests that the proposed design exhibits a proper behavior. Further, we prove the unsupervised learning capabilities of the proposed design by considering a 2-layer SNN consisting of 30 neurons meant to recognize the characters “A,” “E,” “I,” “O,” and “U,” represented with a 5 by 5 black and white pixel matrix. The SPICE simulation results indicate that the graphene SNN is able to perform unsupervised character recognition associated learning and that its recognition ability is robust to input character variations. Finally, we note that our proposal results in a small real-estate footprint (max. 30 nm$^2$ are required by one graphene-based device) and operates at 200 mV supply voltage, which suggest its suitability for the design of large-scale energy-efficient computing systems.
{"title":"Compact Graphene-Based Spiking Neural Network With Unsupervised Learning Capabilities","authors":"He Wang;Nicoleta Cucu Laurenciu;Yande Jiang;Sorin Dan Cotofana","doi":"10.1109/OJNANO.2020.3041198","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3041198","url":null,"abstract":"To fully unleash the potential of graphene-based devices for neuromorphic computing, we propose a graphene synapse and a graphene neuron that form together a basic Spiking Neural Network (SNN) unit, which can potentially be utilized to implement complex SNNs. Specifically, the proposed synapse enables two fundamental synaptic functionalities, i.e., Spike-Timing-Dependent Plasticity (STDP) and Long-Term Plasticity, and both Long-Term Potentiation (LTP) and Long-Term Depression (LTD) can be emulated with the same structure by properly adjusting its bias. The proposed neuron captures the essential Leaky Integrate and Fire spiking neuron behavior with post firing refractory interval. We demonstrate the proper operation of the graphene SNN unit by relying on a mixed simulation approach that embeds the high accuracy of atomistic level simulation of graphene structures conductance within the SPICE framework. Subsequently, we analyze the way graphene synaptic plasticity affects the behavior of a 2-layer SNN example consisting of 6 neurons and demonstrate that LTP significantly increases the number of firing events while LTD is diminishing them, as expected. To assess the plausibility of the graphene SNN reaction to input stimuli we simulate its behavior by means of both SPICE and NEST, a well established SNN simulation framework, and demonstrate that the obtained reactions, characterized in terms of total number of firing events and mean Inter-Spike Interval (ISI) length, are in close agreement, which clearly suggests that the proposed design exhibits a proper behavior. Further, we prove the unsupervised learning capabilities of the proposed design by considering a 2-layer SNN consisting of 30 neurons meant to recognize the characters “A,” “E,” “I,” “O,” and “U,” represented with a 5 by 5 black and white pixel matrix. The SPICE simulation results indicate that the graphene SNN is able to perform unsupervised character recognition associated learning and that its recognition ability is robust to input character variations. Finally, we note that our proposal results in a small real-estate footprint (max. 30 nm$^2$ are required by one graphene-based device) and operates at 200 mV supply voltage, which suggest its suitability for the design of large-scale energy-efficient computing systems.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"135-144"},"PeriodicalIF":1.7,"publicationDate":"2020-11-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3041198","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3506136","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Physical unclonable function (PUF) is a lightweight security primitive for energy constrained digital systems. As an enhanced design of conventional ring oscillator (RO) PUFs, configurable ring oscillator (CRO) PUFs improve the uniqueness and reliability compared with the conventional RO PUF designs. In typical CRO PUF designs, multiplexers (MUXs) are utilized as configurable components. In this paper, a hybrid nano-scale CRO (hn-CRO) PUF is proposed. The configurable components of the proposed hnCRO PUF are implemented by RRAMs. The delay elements are based on CMOS inverters. Compared with traditional CRO PUF designs, the proposed hn-CRO PUF is cost-efficient in terms of circuit density and gate per challenge response pair (CRP) bit. To validate the proposed hn-CRO PUF, the Monte Carlo simulation results of a compact RRAM model under UMC 65 nm technology are presented. The results show that the proposed hn-CRO PUF has a good uniqueness and low hardware consumption compared with the previous works.
{"title":"Lightweight Configurable Ring Oscillator PUF Based on RRAM/CMOS Hybrid Circuits","authors":"Yijun Cui;Chenghua Wang;Weiqiang Liu;Chongyan Gu;Máire O’Neill;Fabrizio Lombardi","doi":"10.1109/OJNANO.2020.3040787","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3040787","url":null,"abstract":"Physical unclonable function (PUF) is a lightweight security primitive for energy constrained digital systems. As an enhanced design of conventional ring oscillator (RO) PUFs, configurable ring oscillator (CRO) PUFs improve the uniqueness and reliability compared with the conventional RO PUF designs. In typical CRO PUF designs, multiplexers (MUXs) are utilized as configurable components. In this paper, a hybrid nano-scale CRO (hn-CRO) PUF is proposed. The configurable components of the proposed hnCRO PUF are implemented by RRAMs. The delay elements are based on CMOS inverters. Compared with traditional CRO PUF designs, the proposed hn-CRO PUF is cost-efficient in terms of circuit density and gate per challenge response pair (CRP) bit. To validate the proposed hn-CRO PUF, the Monte Carlo simulation results of a compact RRAM model under UMC 65 nm technology are presented. The results show that the proposed hn-CRO PUF has a good uniqueness and low hardware consumption compared with the previous works.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"128-134"},"PeriodicalIF":1.7,"publicationDate":"2020-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3040787","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3514219","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-13DOI: 10.1109/OJNANO.2020.3038055
Yonhua Tzeng;Chih-Chun Chang
Chemical vapor deposition (CVD) of a diamond film on a non-diamond substrate begins with the insertion of diamond seeds or the formation of diamond nuclei on the substrate. For the deposition of a smooth, large-area and pin-hole free diamond film that adheres well to the substrate, diamond seeds or nuclei need to be of high density, uniformly distributed and adhere well to the substrate. Diamond seeding is not a diamond nucleation process. Bias enhanced nucleation (BEN) is the most effective means of heterogeneous nucleation of diamond for CVD diamond. It is based on a negative biasing voltage between the substrate and the diamond CVD plasma to accelerate positive ions from the plasma to bombard the substrate. Both direct diamond seeding and BEN have technical barriers in practical applications. New diamond nucleation techniques are desired. This paper reports novel heterogenous diamond nucleation along edge line of graphene on tungsten leading to the deposition of continuous diamond films. Based on experimental observation, a diamond nucleation mechanism assisted by sp3 C-W bonds at graphene edge is proposed. It is wished that scientists will become interested in revealing the precise diamond nucleation mechanism. With that, further optimization of this invention may lead to a new, complementary diamond nucleation process for practical deposition of diamond films.
{"title":"Graphene Induced Diamond Nucleation on Tungsten","authors":"Yonhua Tzeng;Chih-Chun Chang","doi":"10.1109/OJNANO.2020.3038055","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3038055","url":null,"abstract":"Chemical vapor deposition (CVD) of a diamond film on a non-diamond substrate begins with the insertion of diamond seeds or the formation of diamond nuclei on the substrate. For the deposition of a smooth, large-area and pin-hole free diamond film that adheres well to the substrate, diamond seeds or nuclei need to be of high density, uniformly distributed and adhere well to the substrate. Diamond seeding is not a diamond nucleation process. Bias enhanced nucleation (BEN) is the most effective means of heterogeneous nucleation of diamond for CVD diamond. It is based on a negative biasing voltage between the substrate and the diamond CVD plasma to accelerate positive ions from the plasma to bombard the substrate. Both direct diamond seeding and BEN have technical barriers in practical applications. New diamond nucleation techniques are desired. This paper reports novel heterogenous diamond nucleation along edge line of graphene on tungsten leading to the deposition of continuous diamond films. Based on experimental observation, a diamond nucleation mechanism assisted by sp3 C-W bonds at graphene edge is proposed. It is wished that scientists will become interested in revealing the precise diamond nucleation mechanism. With that, further optimization of this invention may lead to a new, complementary diamond nucleation process for practical deposition of diamond films.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"117-127"},"PeriodicalIF":1.7,"publicationDate":"2020-11-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3038055","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3504939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-11-03DOI: 10.1109/OJNANO.2020.3035349
YU-Husan Kuo;YI-Sin Chen;PO-Chiun Huang;Gwo-Bin Lee
Breast cancer ranks among the most common cancers worldwide and can be lethal when not diagnosed early due to the high probability of metastasis. Herein a complementary metal-oxide-semiconductor (CMOS)-based capacitive nano-biosensor was developed to quickly and accurately quantify the concentration of an early-stage breast cancer diagnostic marker, microRNA-195, in blood. The microRNA probe was immobilized on optimized inter-digitated electrodes (IDE), and CMOS-sensing circuits detected the probe-analyte reaction at microRNA-195 concentrations as low as 0.617 fM. This high sensitivity could be due to the monolithically integrated nature of the circuits, for which “parasitic” effects on the capacitive sensors were markedly low. The CMOS-based capacitive nano-sensor may be promising for early diagnosis of breast cancer.
{"title":"A CMOS-Based Capacitive Biosensor for Detection of a Breast Cancer MicroRNA Biomarker","authors":"YU-Husan Kuo;YI-Sin Chen;PO-Chiun Huang;Gwo-Bin Lee","doi":"10.1109/OJNANO.2020.3035349","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3035349","url":null,"abstract":"Breast cancer ranks among the most common cancers worldwide and can be lethal when not diagnosed early due to the high probability of metastasis. Herein a complementary metal-oxide-semiconductor (CMOS)-based capacitive nano-biosensor was developed to quickly and accurately quantify the concentration of an early-stage breast cancer diagnostic marker, microRNA-195, in blood. The microRNA probe was immobilized on optimized inter-digitated electrodes (IDE), and CMOS-sensing circuits detected the probe-analyte reaction at microRNA-195 concentrations as low as 0.617 fM. This high sensitivity could be due to the monolithically integrated nature of the circuits, for which “parasitic” effects on the capacitive sensors were markedly low. The CMOS-based capacitive nano-sensor may be promising for early diagnosis of breast cancer.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"157-162"},"PeriodicalIF":1.7,"publicationDate":"2020-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3035349","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3516005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-10-16DOI: 10.1109/OJNANO.2020.3031633
Shelly Garg;Sneh Saurabh
In this paper, using device simulations, we investigate electrical characteristics of a tunnel field-effect transistor (TFET) in which band-to-band tunneling (BTBT) occurs dominantly within the channel, rather than at source-channel junction. The within-channel BTBT is enabled by sharp band-bending induced by the dual material gate (DMG). The work-functions of two metal gates are chosen, such that the surface potential profile exhibits a distinct step at the DMG interface. Consequently, even under equilibrium condition, a high lateral electric field and an abrupt tunneling junction exist at the DMG interface. When a small gate voltage is applied, the inherent lateral electric field aids in creating an abrupt band alignment and obtaining a small tunneling width. As a result, an excellent average subthreshold swing is obtained in the proposed device. We have also investigated scaling of channel lengths in the proposed device and have demonstrated that within-channel tunneling can be exploited for channel lengths of 40nm and above. Furthermore, low drain threshold voltage and suppressed drain-induced barrier lowering can be obtained in the proposed device. Moreover, in contrast to conventional TFETs, electrical characteristics of the proposed device are less susceptible to source doping variations and shift in gate-edge with respect to the source-channel junction.
{"title":"Exploiting Within-Channel Tunneling in a Nanoscale Tunnel Field-Effect Transistor","authors":"Shelly Garg;Sneh Saurabh","doi":"10.1109/OJNANO.2020.3031633","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3031633","url":null,"abstract":"In this paper, using device simulations, we investigate electrical characteristics of a tunnel field-effect transistor (TFET) in which band-to-band tunneling (BTBT) occurs dominantly within the channel, rather than at source-channel junction. The within-channel BTBT is enabled by sharp band-bending induced by the dual material gate (DMG). The work-functions of two metal gates are chosen, such that the surface potential profile exhibits a distinct step at the DMG interface. Consequently, even under equilibrium condition, a high lateral electric field and an abrupt tunneling junction exist at the DMG interface. When a small gate voltage is applied, the inherent lateral electric field aids in creating an abrupt band alignment and obtaining a small tunneling width. As a result, an excellent average subthreshold swing is obtained in the proposed device. We have also investigated scaling of channel lengths in the proposed device and have demonstrated that within-channel tunneling can be exploited for channel lengths of 40nm and above. Furthermore, low drain threshold voltage and suppressed drain-induced barrier lowering can be obtained in the proposed device. Moreover, in contrast to conventional TFETs, electrical characteristics of the proposed device are less susceptible to source doping variations and shift in gate-edge with respect to the source-channel junction.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"100-108"},"PeriodicalIF":1.7,"publicationDate":"2020-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3031633","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3514210","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-18DOI: 10.1109/OJNANO.2020.3025167
Seref Kalem
We report an efficient room temperature photon source at 1320 nm telecommunication wavelength from nanostructured silicon surface. The activation of this light source was realized by treating the surface of Si wafer by vapor of heavy water (D2O) containing a mixture of hydrofluoric and nitric acids. Treatment without deuterium generates an intense light emission band at the band-edge of Si, while the deuterium treatment alone creates a strong emission band at 1320 nm in the near infrared. It was found that the deuterium is actively involved in the formation of a nanostructured Si surface as evidenced from relative strength of the Si-O vibrational modes and presence of N-D bondings. The origin of this photon source was discussed in terms of oxygen related defect states and dislocations. The Si surface treated by Deuterium containing mixture exhibits a strong rectifying electrical activity as it is demonstrated by Schottky diodes fabricated on these wafers. Being compatible with mature silicon circuitry, the source may find applications in photonics and optoelectronics.
{"title":"1320 nm Light Source From Deuterium Treated Silicon","authors":"Seref Kalem","doi":"10.1109/OJNANO.2020.3025167","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3025167","url":null,"abstract":"We report an efficient room temperature photon source at 1320 nm telecommunication wavelength from nanostructured silicon surface. The activation of this light source was realized by treating the surface of Si wafer by vapor of heavy water (D2O) containing a mixture of hydrofluoric and nitric acids. Treatment without deuterium generates an intense light emission band at the band-edge of Si, while the deuterium treatment alone creates a strong emission band at 1320 nm in the near infrared. It was found that the deuterium is actively involved in the formation of a nanostructured Si surface as evidenced from relative strength of the Si-O vibrational modes and presence of N-D bondings. The origin of this photon source was discussed in terms of oxygen related defect states and dislocations. The Si surface treated by Deuterium containing mixture exhibits a strong rectifying electrical activity as it is demonstrated by Schottky diodes fabricated on these wafers. Being compatible with mature silicon circuitry, the source may find applications in photonics and optoelectronics.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"88-94"},"PeriodicalIF":1.7,"publicationDate":"2020-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3025167","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3491568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-18DOI: 10.1109/OJNANO.2020.3024751
Zhaoyang Li;Junwen Zhong;Yunlong Zi
Harvesting energy from human body motions is an appropriate option as an assistant or even subversive way for powering the booming wearable electronics, in which smart textiles are important components. Here, we fabricate a robust power textile with working mechanism of triboelectrification effect and electrostatic induction effect by simply integrating the normal textiles and polydimethylsiloxane (PDMS)/conductive yarns electrodes. Maximum peak loading voltage and current reaching 230 V and 11.6 μA are obtained by rubbing our power textile, and this alternating and irregular electricity can be accumulated in a capacitor or directly light up 20 blue LEDs. The recovered energy generation ability of the power textile after washing successfully demonstrate its robustness, showing the potential application in powering the electronics in smart textiles.
{"title":"Robust Power Textile Based on Triboelectrification for Self-Powered Smart Textiles","authors":"Zhaoyang Li;Junwen Zhong;Yunlong Zi","doi":"10.1109/OJNANO.2020.3024751","DOIUrl":"https://doi.org/10.1109/OJNANO.2020.3024751","url":null,"abstract":"Harvesting energy from human body motions is an appropriate option as an assistant or even subversive way for powering the booming wearable electronics, in which smart textiles are important components. Here, we fabricate a robust power textile with working mechanism of triboelectrification effect and electrostatic induction effect by simply integrating the normal textiles and polydimethylsiloxane (PDMS)/conductive yarns electrodes. Maximum peak loading voltage and current reaching 230 V and 11.6 μA are obtained by rubbing our power textile, and this alternating and irregular electricity can be accumulated in a capacitor or directly light up 20 blue LEDs. The recovered energy generation ability of the power textile after washing successfully demonstrate its robustness, showing the potential application in powering the electronics in smart textiles.","PeriodicalId":446,"journal":{"name":"IEEE Open Journal of Nanotechnology","volume":"1 ","pages":"95-99"},"PeriodicalIF":1.7,"publicationDate":"2020-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/OJNANO.2020.3024751","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"3491617","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-09-01DOI: 10.1109/OJNANO.2020.3020567
Zarin Tasnim Sandhie;Farid Uddin Ahmed;Masud H. Chowdhury
Multiple valued logic (MVL) can represent an exponentially higher number of data/information compared to the binary logic for the same number of logic bits. Compared to the conventional and other emerging device technologies, Graphene Nano Ribbon Field Effect Transistor (GNRFET) appears to be very promising for designing MVL logic gates and arithmetic circuits due to some exceptional electrical properties of the GNRFET, e.g., the ability to control the threshold voltage by changing the width of the GNR. Variation of the threshold voltage is one of the prescribed techniques to achieve multiple voltage levels to implement the MVL circuit. This paper introduces a design approach for ternary logic gates and circuits using MOS-type GNRFET. The designs of basic ternary logic gates like inverters, NAND, NOR, and ternary arithmetic circuits like the ternary decoder, 3:1 multiplexer, and ternary half-adder are demonstrated using GNRFET. A comparative analysis of the GNRFET based ternary logic gates and circuits and those based on the conventional CMOS and CNTFET technologies is performed using delay, total power, and power-delay-product (PDP) as the metrics. The simulation and analysis are performed using the H-SPICE tool with a GNRFET model available on the Nanohub website.
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