Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940650
Yanyu Jin, J. Long, M. Spirito
A 60GHz-band doubly-balanced transconductance (Gm) mixer with an on-chip linear L-C combiner for RF and LO signal summation and impedance transformation is described. Class-AB biasing is employed for low quiescent DC power consumption (360µW at 1.2V). At fLO=58GHz and PLO=0dBm, the Gm-mixer prototype realizes 6.9dB (50Ω) NFDSB, 6.2dB power conversion gain, −4.7dBm input-referred P−1dB, and +4.2dBm IIP3.
{"title":"A 7dB NF 60GHz-band millimeter-wave transconductance mixer","authors":"Yanyu Jin, J. Long, M. Spirito","doi":"10.1109/RFIC.2011.5940650","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940650","url":null,"abstract":"A 60GHz-band doubly-balanced transconductance (G<inf>m</inf>) mixer with an on-chip linear L-C combiner for RF and LO signal summation and impedance transformation is described. Class-AB biasing is employed for low quiescent DC power consumption (360µW at 1.2V). At f<inf>LO</inf>=58GHz and P<inf>LO</inf>=0dBm, the G<inf>m</inf>-mixer prototype realizes 6.9dB (50Ω) NF<inf>DSB</inf>, 6.2dB power conversion gain, −4.7dBm input-referred P<inf>−1dB</inf>, and +4.2dBm IIP3.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130781327","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940664
A. Jahanian, P. Heydari
A CMOS highly linear 818GHz-GBW distributed amplifier (DA) with distributed active input balun is presented. Each gm cell within the DA employs dual-output 2-stage gm topology that improves gain and linearity without adversely affecting bandwidth and power. Fabricated in a 65nm LP CMOS process, the 0.9mm2 DA achieves 22dB of gain and 10dBm of P1dB while consuming 97mW from a 1.3V supply. A distributed balun using the same gm cell achieves >70GHz bandwidth and 4dB gain with 19.5mW power consumption from 1.3V supply.
{"title":"A CMOS distributed amplifier with active input balun using GBW and linearity enhancing techniques","authors":"A. Jahanian, P. Heydari","doi":"10.1109/RFIC.2011.5940664","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940664","url":null,"abstract":"A CMOS highly linear 818GHz-GBW distributed amplifier (DA) with distributed active input balun is presented. Each gm cell within the DA employs dual-output 2-stage gm topology that improves gain and linearity without adversely affecting bandwidth and power. Fabricated in a 65nm LP CMOS process, the 0.9mm2 DA achieves 22dB of gain and 10dBm of P1dB while consuming 97mW from a 1.3V supply. A distributed balun using the same gm cell achieves >70GHz bandwidth and 4dB gain with 19.5mW power consumption from 1.3V supply.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121762415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940593
H. Seo, I. Choi, Changjoon Park, Jehyung Yoon, Bumman Kim
A Digital RF receiver front-end with wideband operation capability is presented for m-WiMAX application. By employing sampling mixer and discrete-time filter, the receiver operates in charge domain. In addition to flexibility of the discrete-time (DT) filter, the new Non-Decimation Finite Impulse Response (FIR) filter can be cascaded to a conventional FIR filter. And we can easily increase the order of the sincn-type filtering response and achieve wideband signal process capability. The designed receiver front-end is implemented by IBM 0.13-µm RF CMOS process. The chip satisfies the m-WiMAX specification with 26.63mA from a 1.5-V supply voltage for the total system.
{"title":"Digital RF receiver front-end with wideband operation capability for m-WiMAX","authors":"H. Seo, I. Choi, Changjoon Park, Jehyung Yoon, Bumman Kim","doi":"10.1109/RFIC.2011.5940593","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940593","url":null,"abstract":"A Digital RF receiver front-end with wideband operation capability is presented for m-WiMAX application. By employing sampling mixer and discrete-time filter, the receiver operates in charge domain. In addition to flexibility of the discrete-time (DT) filter, the new Non-Decimation Finite Impulse Response (FIR) filter can be cascaded to a conventional FIR filter. And we can easily increase the order of the sincn-type filtering response and achieve wideband signal process capability. The designed receiver front-end is implemented by IBM 0.13-µm RF CMOS process. The chip satisfies the m-WiMAX specification with 26.63mA from a 1.5-V supply voltage for the total system.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"124 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128117005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940677
K. Sengupta, A. Hajimiri
The paper demonstrates Distributed Active Radiator (DAR) arrays as a novel way of beam-forming at sub-THz frequencies in CMOS. Near-field coupling is shown to be a scalable method for mutually locking multiple DARs to beam-form and generate high EIRP. As proofs of concept, 2×1 and 2×2 arrays of DARs, mutually synchronized through near-field coupling, are implemented in 65nm bulk CMOS. The paper also shows beam-forming near 200GHz for the 2×2 array with broadside EIRP of −1.9 dBm, total radiated power of 54 µW and beam-scanning range for approximately ± 30° in each of the two orthogonal directions in 2D space.
{"title":"Sub-THz beam-forming using near-field coupling of Distributed Active Radiator arrays","authors":"K. Sengupta, A. Hajimiri","doi":"10.1109/RFIC.2011.5940677","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940677","url":null,"abstract":"The paper demonstrates Distributed Active Radiator (DAR) arrays as a novel way of beam-forming at sub-THz frequencies in CMOS. Near-field coupling is shown to be a scalable method for mutually locking multiple DARs to beam-form and generate high EIRP. As proofs of concept, 2×1 and 2×2 arrays of DARs, mutually synchronized through near-field coupling, are implemented in 65nm bulk CMOS. The paper also shows beam-forming near 200GHz for the 2×2 array with broadside EIRP of −1.9 dBm, total radiated power of 54 µW and beam-scanning range for approximately ± 30° in each of the two orthogonal directions in 2D space.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131773251","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940596
S. Hori, K. Kunihiro, Kiyohiko Takahashi, M. Fukaishi
A 1-bit RF modulator using phase-modulated-carrier-clocking envelope ΔΣ modulation for a multi-mode/band transmitter is presented. The prototype IC designed in 90 nm CMOS process covers 2.4 GHz ISM and 3GPP frequency bands up to 3 GHz in conformity with IEEE 802.11g, W-CDMA and LTE in 5MHz-mode. The IC dissipates 8 mW for 1.95 GHz WCDMA and occupies 0.044 mm2.
{"title":"A 0.7-3GHz envelope ΔΣ modulator using phase modulated carrier clock for multi-mode/band switching amplifiers","authors":"S. Hori, K. Kunihiro, Kiyohiko Takahashi, M. Fukaishi","doi":"10.1109/RFIC.2011.5940596","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940596","url":null,"abstract":"A 1-bit RF modulator using phase-modulated-carrier-clocking envelope ΔΣ modulation for a multi-mode/band transmitter is presented. The prototype IC designed in 90 nm CMOS process covers 2.4 GHz ISM and 3GPP frequency bands up to 3 GHz in conformity with IEEE 802.11g, W-CDMA and LTE in 5MHz-mode. The IC dissipates 8 mW for 1.95 GHz WCDMA and occupies 0.044 mm2.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"67 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134084512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940606
Shinwon Kang, Jun-Chau Chien, A. Niknejad
A fully integrated 100GHz phase-locked loop (PLL) is demonstrated in 0.13µm SiGe BiCMOS process. The PLL employs a fundamental-frequency differential Colpitts voltage-controlled oscillator (VCO) with 8.3% tuning range, which achieves a phase noise of −124.5dBc/Hz at 10MHz offset, and a single-ended output power of 3dBm. The FoM of this VCO is the best among 90–100GHz VCOs. A Miller divider, operating from 50GHz up to 130GHz, is designed and the Gilbert-mixer phase detector is used to attenuate reference spurs. The total lock range of the PLL is from 92.7 to 100.2GHz, the phase noise is −102dBc/Hz at 1MHz offset, and reference spurs are not observable. The PLL dissipates 570mW and occupies 1.21mm2.
{"title":"A 100GHz phase-locked loop in 0.13µm SiGe BiCMOS process","authors":"Shinwon Kang, Jun-Chau Chien, A. Niknejad","doi":"10.1109/RFIC.2011.5940606","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940606","url":null,"abstract":"A fully integrated 100GHz phase-locked loop (PLL) is demonstrated in 0.13µm SiGe BiCMOS process. The PLL employs a fundamental-frequency differential Colpitts voltage-controlled oscillator (VCO) with 8.3% tuning range, which achieves a phase noise of −124.5dBc/Hz at 10MHz offset, and a single-ended output power of 3dBm. The FoM of this VCO is the best among 90–100GHz VCOs. A Miller divider, operating from 50GHz up to 130GHz, is designed and the Gilbert-mixer phase detector is used to attenuate reference spurs. The total lock range of the PLL is from 92.7 to 100.2GHz, the phase noise is −102dBc/Hz at 1MHz offset, and reference spurs are not observable. The PLL dissipates 570mW and occupies 1.21mm2.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"130 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115893667","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940685
N. Deferm, J. Osorio, A. de Graauw, P. Reynaert
This paper presents a 94GHz 4-stage differential transformer-coupled power amplifier with capacitive neutralization. The use of transformers results in excellent common mode isolation between the different stages while providing a good impedance match. The neutralized differential pairs guarantee differential stability. The PA was designed in a 45nm LP CMOS technology. An output 1dB compression point of +4dBm and a gain of 18dB was measured. The total chip area is 0.43mm2 and the active part consumes only 0.07mm2. The 3dB bandwidth is 14GHz. Power consumption is 120mW from a 1V supply, resulting in a peak PAE of 4.6%.
{"title":"A 94GHz differential power amplifier in 45nm LP CMOS","authors":"N. Deferm, J. Osorio, A. de Graauw, P. Reynaert","doi":"10.1109/RFIC.2011.5940685","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940685","url":null,"abstract":"This paper presents a 94GHz 4-stage differential transformer-coupled power amplifier with capacitive neutralization. The use of transformers results in excellent common mode isolation between the different stages while providing a good impedance match. The neutralized differential pairs guarantee differential stability. The PA was designed in a 45nm LP CMOS technology. An output 1dB compression point of +4dBm and a gain of 18dB was measured. The total chip area is 0.43mm2 and the active part consumes only 0.07mm2. The 3dB bandwidth is 14GHz. Power consumption is 120mW from a 1V supply, resulting in a peak PAE of 4.6%.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124653315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940713
K. Natarajan, J. Walling, D. Allstot
A class-C power amplifier (PA) for operation as an antenna interface in body sensor network (BSN) applications is presented. It is fabricated in a 0.13 µm RF CMOS process for operation in the 400 MHz MedRadio band. It achieves a measured peak output power of −4 dBm and drain efficiency of 43%.
介绍了一种用于人体传感器网络(BSN)天线接口的c类功率放大器(PA)。它采用0.13 μ m RF CMOS工艺制造，可在400 MHz MedRadio频段工作。测量到的峰值输出功率为- 4 dBm，漏极效率为43%。
{"title":"A class-C power amplifier/antenna interface for wireless sensor applications","authors":"K. Natarajan, J. Walling, D. Allstot","doi":"10.1109/RFIC.2011.5940713","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940713","url":null,"abstract":"A class-C power amplifier (PA) for operation as an antenna interface in body sensor network (BSN) applications is presented. It is fabricated in a 0.13 µm RF CMOS process for operation in the 400 MHz MedRadio band. It achieves a measured peak output power of −4 dBm and drain efficiency of 43%.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123497355","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940655
Y. Kawano, A. Mineyama, Toshihide Suzuki, Masaru Sato, T. Hirose, K. Joshin
A fully-integrated K-band differential power amplifier was designed in 65 nm CMOS. The power amplifier comprised of the 2-stage cascode configuration has the matching networks based on the transformer. To match the impedances, turn ratios of each transformer were designed to be 1∶1 for the input stage, 2∶1 for the inter stage, and 1∶1.5 for the output stage, respectively. The saturation power of more than 20 dBm was obtained in the band between 16 GHz and 25 GHz. The peak value of the saturation power was 23.8 dBm, and the power added efficiency (PAE) was 25.1 % at 19 GHz. The chip occupied area including the DC and RF pads is 1.2 × 0.8 mm.
{"title":"A fully-integrated K-band CMOS power amplifier with Psat of 23.8 dBm and PAE of 25.1 %","authors":"Y. Kawano, A. Mineyama, Toshihide Suzuki, Masaru Sato, T. Hirose, K. Joshin","doi":"10.1109/RFIC.2011.5940655","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940655","url":null,"abstract":"A fully-integrated K-band differential power amplifier was designed in 65 nm CMOS. The power amplifier comprised of the 2-stage cascode configuration has the matching networks based on the transformer. To match the impedances, turn ratios of each transformer were designed to be 1∶1 for the input stage, 2∶1 for the inter stage, and 1∶1.5 for the output stage, respectively. The saturation power of more than 20 dBm was obtained in the band between 16 GHz and 25 GHz. The peak value of the saturation power was 23.8 dBm, and the power added efficiency (PAE) was 25.1 % at 19 GHz. The chip occupied area including the DC and RF pads is 1.2 × 0.8 mm.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121660500","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-05DOI: 10.1109/RFIC.2011.5940701
C. Guan, Chris Liu
A practical approach to source-pull differential input LNA is presented using a single-ended RF tuner adapted by a balun. The adaptation only considers balun's differential mode S-parameters for the reference plane extension. Error analysis on neglecting common mode S-parameters provides guidelines to choose proper balun for better adaptation accuracy: a) higher common-mode rejection ratio, b) less reflection on the unbalanced port and c) less insertion loss. The approach is applied to the NF optimization on a cellular WCDMA receiver. The resultant source pull estimation correlates well with the final optimal matching network. The minimum NF is achieved at 2.3dB.
{"title":"Differential source-pull on the WCDMA receiver","authors":"C. Guan, Chris Liu","doi":"10.1109/RFIC.2011.5940701","DOIUrl":"https://doi.org/10.1109/RFIC.2011.5940701","url":null,"abstract":"A practical approach to source-pull differential input LNA is presented using a single-ended RF tuner adapted by a balun. The adaptation only considers balun's differential mode S-parameters for the reference plane extension. Error analysis on neglecting common mode S-parameters provides guidelines to choose proper balun for better adaptation accuracy: a) higher common-mode rejection ratio, b) less reflection on the unbalanced port and c) less insertion loss. The approach is applied to the NF optimization on a cellular WCDMA receiver. The resultant source pull estimation correlates well with the final optimal matching network. The minimum NF is achieved at 2.3dB.","PeriodicalId":448165,"journal":{"name":"2011 IEEE Radio Frequency Integrated Circuits Symposium","volume":"6 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-06-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113964370","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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