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2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)最新文献

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Hyper-generation LEDs VCPCB 超代led VCPCB
Jung-Chang Wang, Tian-Shiang Sung, Wan-Ping Chen
Vapor chamber (VC) has been proven the excellent heat spreading performance utilized particularly in high-power light-emitting diode (LED). As high-power LEDs array are utilized for more general lighting systems, more significant amount of heat flux being generated while it is operating. The main challenge is that the lifetime of high-brightness LEDs is easily shortened by thermal problem generated at the device junction and ambient temperature. The printed circuit board (PCB) composite made up variables of dielectric, copper and solder layer thicknesses affected the thermal performance of high-power LEDs lighting system. Therefore, combination VC and PCB (VCPCB) can perfectly serve the high-power LEDs package system. This study reports the manufacturing characteristics and utilizes experimental analysis with window program VCTM V1.0 to investigate the thermal performance of VCPCB applying in a high-brightness LED array package module. Results show that the effective thermal conductivity of the VCPCB is many times higher than that of the AlN, copper and aluminum PCB, proving that it can effectively reduce the temperature of the LEDs and obtain more uniform illuminance. And the thermal performance of the LEDs VCPCB is better than that of the LEDs Copper PCB and has the highest effective thermal conductivity of 965 W/m°C at 187.5 W/cm2. The LEDs VCPCB works out hot-spot problem of 100 Watt high-power LEDs, successfully.
蒸汽室(VC)具有良好的散热性能,特别是在大功率发光二极管(LED)中得到广泛应用。随着大功率led阵列在照明系统中的应用越来越广泛,其工作时产生的热流通量也越来越大。主要的挑战是高亮度led的寿命很容易因器件结和环境温度产生的热问题而缩短。印制电路板(PCB)复合材料组成的介电介质、铜和焊料层厚度等变量影响着大功率led照明系统的热性能。因此,VC与PCB的结合(VCPCB)可以完美地服务于大功率led封装系统。本研究报告了VCPCB的制造特点,并利用窗口程序VCTM V1.0对应用于高亮度LED阵列封装模块的VCPCB热性能进行了实验分析。结果表明,VCPCB的有效导热系数比AlN、铜和铝PCB高出许多倍,证明它可以有效降低led的温度,获得更均匀的照度。并且VCPCB的热性能优于led Copper PCB,在187.5 W/cm2时有效导热系数最高,为965 W/m°C。led VCPCB成功地解决了100瓦大功率led的热点问题。
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引用次数: 3
On mold corner effects of EMC adhesion for IC encapsulation process 集成电路封装过程中EMC粘接的模具角效应研究
Chia-Hsun Yeh, Chen-hung Deng, Huei-Huang Lee, Sheng-Jye Hwang, D. Huang
In the IC packaging process, epoxy molding compound (EMC) was filling the mold cavity and cured in the mold. At the same time, adhesion may occur in the interface between the surface of mold and cured EMC. Large adhesion force could cause many problems, which may influence the ejection process. Some other critical problems may also happen in the IC molding process if adhesion problem occurs, such as distortion or crack on ejecting finished parts, residue of cured EMC on the surface of mold affecting the quality of the products, and regular, tedious and not effective mold cleaning. So how to improve the mold adhesion force effectively is an important issue for industry and research institutes. To avoid the mold adhesion problems, improving the mold design and applying suitable surface treatments such as mold surface coating are the common approaches. Among these, applying suitable surface coating is a more popular and practical approach. This study described the approach of using a semi-automatic EMC adhesion force test instrument to measure adhesion force between the mold surface and EMC and studied the corner effect during the encapsulation process. Three different cavity arcs were designed in three specimens and molded and tested during molding to observe the corner effects. Engineers could determine the best type of surface treatment and the type of corner to reduce the amount of mold adhesion force. This paper also discussed the issue of successive adhesion force test and the variation of adhesion force during successive molding test to predict the time for mold cleaning. It was found that larger corner would cause smaller adhesion force. Repeat experiments were executed and found that the test results could be repeated.
在集成电路封装过程中,环氧成型化合物(EMC)填充模腔并在模内固化。同时,模具表面与固化后的EMC之间的界面可能会发生粘连。大的附着力会导致很多问题,这可能会影响弹射过程。如果出现粘接问题,在集成电路成型过程中还可能出现一些其他的关键问题,如射出成品零件的变形或裂纹,固化后的EMC残留在模具表面影响产品质量,以及定期、繁琐而无效的模具清洗。因此,如何有效地提高模具附着力是工业和科研院所面临的一个重要问题。为了避免模具粘着问题,改进模具设计和采用合适的表面处理,如模具表面涂层是常见的方法。其中,应用合适的表面涂层是比较流行和实用的方法。本研究描述了利用半自动EMC附着力测试仪测量模具表面与EMC之间附着力的方法,并研究了封装过程中的拐角效应。在3个试件上设计了3种不同的型腔弧度,并在成型过程中进行了测试,观察角效应。工程师可以确定最佳的表面处理类型和转角类型,以减少模具附着力的大小。本文还讨论了连续粘接力测试的问题以及连续成型试验中粘接力的变化,以预测清模时间。结果表明,转角越大,附着力越小。进行了重复实验,发现试验结果可以重复。
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引用次数: 0
Effective moduli prediction for silicon interposer with high-density Cu-filled through-silicon via 高密度铜填充硅通孔硅中间层的有效模量预测
Chang-Chun Lee, Y. Shih, C. Wu
A simulation-based prediction of the effective moduli of a silicon interposer with Cu-filled through-silicon via (TSV) is developed to resolve the critical issue of finite element (FE) modeling. The simulation-based prediction in the current study follows the analysis of mechanical reliability urgently considered in large-scale three-dimensional (3D) integrated circuit (IC) packaging. According to the common testing concepts of mechanical properties, finite element analysis (FEA) is systematically performed to obtain the equivalent mechanical properties when different volume fractions of Cu-filled TSV are induced. The proposed simulation methodology is validated and then compared with an analytical model. Results show that the Cu-rich mechanical properties become observable when the TSV pitch is smaller than 25 μm.
为了解决有限元建模的关键问题,提出了一种基于仿真的铜填充硅通孔(TSV)硅介面有效模量预测方法。本研究中基于仿真的预测是在对大型三维集成电路封装中迫切需要考虑的机械可靠性进行分析之后进行的。根据常用的力学性能测试概念,系统地进行了有限元分析,得到了不同体积分数的cu填充TSV的等效力学性能。对所提出的仿真方法进行了验证,并与解析模型进行了比较。结果表明:当TSV间距小于25 μm时,合金的富cu力学性能显著;
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引用次数: 0
Oxygenous reflow affecting performance of Pb-free TFBGA assembly 氧回流对无铅TFBGA组件性能的影响
Tien-Tsorng Shih, Wei-Chih Chen, Win-Der Lee, Mu-Chun Wang
More high-pin count package and thinner thickness of ball-grid-array (BGA) substrate are appreciated in the recent commercial electronic products. Using thin profile fine-pitch BGA (TFBGA) substrate incorporated into the assembly line is a feasible solution. To expose the possibility with this substrate, two species of lead-free solder balls with and without nickel were applied and the oxygen concentration impacting the solder quality in reflow process was considered. The flux assistance for solderability was adopted to verify the integration capability in assembly mass production. The temperature effect attacking the solder adhesion due to the thermal stress and the difference of thermal expansion coefficients for entire package products was also taken into concern. Using the shear test and drop test could clarify the solder adherence between solder ball and TFBGA carrier substrate. Finally, the Cpk values for all of test groups were greater than 1.33, which demonstrated the TFBGA substrate was suitable to be employed in the high-pin count and high-profit electronic products.
球栅阵列(BGA)衬底的厚度越薄,封装的引脚数越高,在近年的商用电子产品中得到了广泛的应用。采用薄轮廓细间距BGA (TFBGA)衬底集成到装配线中是一种可行的解决方案。为了揭示这种衬底的可能性,采用了含镍和不含镍两种无铅焊锡球,并考虑了氧浓度对回流过程中焊锡质量的影响。采用助焊剂对可焊性进行辅助,以验证装配批量生产中的集成能力。同时考虑了由于热应力和整个封装产品的热膨胀系数差异所引起的温度效应对焊料附着力的影响。采用剪切试验和跌落试验可以明确焊锡球与TFBGA载体衬底之间的焊锡粘附性。最后,所有测试组的Cpk值均大于1.33,表明TFBGA衬底适合用于高引脚数和高利润的电子产品。
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引用次数: 0
System-in-Packages with embedded components for modular systems 系统包与嵌入式组件的模块化系统
A. Ostmann, B. Bruehl, D. Manessis, M. Seckel, K. Lang
In coming applications a further increase of diversity and higher complexity of electronic systems is expected. As a consequence it will be an increasingly challenging and time consuming task to design these systems. Although various new components are coming up, the problem of increasing cost for system design, debugging and verification is generally not addressed by conventional technology developments. A new concept to face these challenges will be presented. It is based on the constitution of a system by miniaturised modules, each representing a complete functionality like system control, data storage or sensing. The modules are planar System-in-Packages with embedded active and passive components, having typically 4 contacts on bottom and top. Besides the hardware an integral part of each module is its firmware, a small piece of software which controls a basic functionality, e. g. sensor data filtering and the communication with other modules. The realisation of a Smart Pixel SiP with I²C bus interface and embedded components as well as the design of a modular sensor system will be described. The data communication between modules is also realised by an I²C bus. By combining these modules in different ways, various systems can be realised. The capabilities and challenges of such systems will be discussed.
在未来的应用中,预计电子系统的多样性和复杂性将进一步增加。因此,设计这些系统将是一项越来越具有挑战性和耗时的任务。尽管各种新组件不断出现,但系统设计、调试和验证成本增加的问题通常没有得到传统技术发展的解决。面对这些挑战,我们将提出一个新的概念。它是基于一个由小型化模块组成的系统,每个模块代表一个完整的功能,如系统控制、数据存储或传感。这些模块是平面系统级封装,嵌入有源和无源组件,底部和顶部通常有4个触点。除了硬件之外,每个模块的一个组成部分是它的固件,一个控制基本功能的小软件,例如传感器数据过滤和与其他模块的通信。本文将介绍一个具有I²C总线接口和嵌入式组件的智能像素SiP的实现以及模块化传感器系统的设计。模块间的数据通信也通过I²C总线实现。通过以不同的方式组合这些模块,可以实现各种系统。我们将讨论这些系统的能力和挑战。
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引用次数: 0
Solder stability for Pb-free HBGA assembly with oxygenous reflow 含氧回流的无铅HBGA组件的焊料稳定性
Tien-Tsorng Shih, Wei-Chih Chen, Win-Der Lee, Mu-Chun Wang
In ball-grid-array (BGA) package technology, the oxygen concentration in flow process predominantly influences the quality of solder conjunction such as oxidation causing aged effect and quality of inter-metallic compound. In addition, the flux as solder assistance is also a key factor determining the solder adhesion ability between carrier HBGA substrate and solder ball. Using the temperature cycling test, shear test and drop test to distinguish the adhesion ability for lead-free solder balls on HBGA substrate assisted with several fluxes, the optimal process recipe was achieved. The soldering performance was impressive.
在球栅阵列(BGA)封装工艺中,流动过程中的氧浓度主要影响焊点的氧化致老化效应和金属间化合物的质量。此外,助焊剂也是决定载体HBGA衬底与焊料球之间焊料粘附能力的关键因素。通过温度循环试验、剪切试验和跌落试验对不同助焊剂对HBGA衬底上无铅钎料球的粘附性能进行了对比,得出了最佳工艺配方。焊接性能令人印象深刻。
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引用次数: 1
A high temperature MEMS heater for optical sensors 一种用于光学传感器的高温MEMS加热器
Jing-Yuan Lin, Yu-Sheng Hsieh, Shang-Chian Su
Infrared light source is a key component in the optical sensing systems especially for the Fourier-Transformed Infrared (FTIR) or different kinds of gas sensor system. This paper proposes a novel method for generating a broadband wavelength infrared light source by MEMS heater based on silicon on insulator (SOI) technology. The enhanced long-tern stability has been achieved by a low electrical resistance SOI wafer. This novel MEMS heater can achieve over than 1000 °C. This MEMS heater could be integrated in micro sensing system such as metal oxide semiconductor and Non-dispersive infrared (NDIR) gas sensors.
红外光源是光学传感系统尤其是傅里叶变换红外(FTIR)或各种气体传感系统的关键部件。提出了一种基于绝缘体上硅(SOI)技术的MEMS加热器产生宽带波长红外光源的新方法。通过低电阻SOI晶圆实现了增强的长期稳定性。这种新颖的MEMS加热器可以达到超过1000°C。该MEMS加热器可集成在金属氧化物半导体和非色散红外(NDIR)气体传感器等微传感系统中。
{"title":"A high temperature MEMS heater for optical sensors","authors":"Jing-Yuan Lin, Yu-Sheng Hsieh, Shang-Chian Su","doi":"10.1109/IMPACT.2011.6117255","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117255","url":null,"abstract":"Infrared light source is a key component in the optical sensing systems especially for the Fourier-Transformed Infrared (FTIR) or different kinds of gas sensor system. This paper proposes a novel method for generating a broadband wavelength infrared light source by MEMS heater based on silicon on insulator (SOI) technology. The enhanced long-tern stability has been achieved by a low electrical resistance SOI wafer. This novel MEMS heater can achieve over than 1000 °C. This MEMS heater could be integrated in micro sensing system such as metal oxide semiconductor and Non-dispersive infrared (NDIR) gas sensors.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"263 1","pages":"451-453"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76779429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Feasibility study for copper bump with tin plating bonding by using NCP adhesive and ultrasonic bonding technique 采用NCP胶粘剂和超声粘接技术对铜凸包镀锡进行粘接的可行性研究
Jardar Yang, Hi Huang
The aim of this project is to develop an alternative material for bumps of LCD driver ICs and to establish a feasible packaging process for the alternative material. With the continuously escalating price of gold, an alternative material to replace the widely used gold bumps in LCD driver IC packaging is eagerly demanded. Therefore, copper bumps are selected for evaluation in this study. To comply with the oxidation-prone and higher hardness characteristics of Cu bumps, nonconductive paste (NCP) resin and ultrasonic bonding are introduced as well in the packaging process. Compared with the commonly used thermo compression bonding technology for Au-bumped LCD driver IC packaging, the ultrasonic bonding method with NCP resin employs relatively lower temperature and bonding force. In the feasibility evaluation of the Cu bumps, the objective is to achieve a bonding reliability and adhesion quality similar to or even better than that of Au bumps under thermo compression bonding. In the experiment, fine tuning of some operative parameters was executed in order to get the positive results. These operative factors include the following: (a) NCP resin viscosity, (b) NCP resin dispense pattern, (c) dispense temperatures, (d) bonding sequence, (e) bonding temperature, (f) ultrasonic power, (g) bonding force, and (h) bonding time, which play key roles in the study.
本项目的目的是为LCD驱动ic的凸点开发一种替代材料,并建立一种可行的替代材料的封装工艺。随着黄金价格的不断攀升,人们迫切需要一种替代材料来取代LCD驱动IC封装中广泛使用的黄金凸起。因此,本研究选择铜凸点作为评价对象。为了适应铜包块易氧化、硬度高的特点,在封装过程中还引入了非导电浆料(NCP)树脂和超声粘接。与常用的热压缩键合技术相比,采用NCP树脂的超声键合方法具有较低的温度和结合力。在Cu凸点的可行性评估中,目标是在热压键合下获得与Au凸点相似甚至更好的键合可靠性和粘附质量。在实验中,对一些工作参数进行了微调,以获得积极的结果。这些影响因素包括:(a) NCP树脂粘度,(b) NCP树脂点胶方式,(c)点胶温度,(d)键合顺序,(e)键合温度,(f)超声功率,(g)键合力,(h)键合时间,这些因素在研究中起关键作用。
{"title":"Feasibility study for copper bump with tin plating bonding by using NCP adhesive and ultrasonic bonding technique","authors":"Jardar Yang, Hi Huang","doi":"10.1109/IMPACT.2011.6117262","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117262","url":null,"abstract":"The aim of this project is to develop an alternative material for bumps of LCD driver ICs and to establish a feasible packaging process for the alternative material. With the continuously escalating price of gold, an alternative material to replace the widely used gold bumps in LCD driver IC packaging is eagerly demanded. Therefore, copper bumps are selected for evaluation in this study. To comply with the oxidation-prone and higher hardness characteristics of Cu bumps, nonconductive paste (NCP) resin and ultrasonic bonding are introduced as well in the packaging process. Compared with the commonly used thermo compression bonding technology for Au-bumped LCD driver IC packaging, the ultrasonic bonding method with NCP resin employs relatively lower temperature and bonding force. In the feasibility evaluation of the Cu bumps, the objective is to achieve a bonding reliability and adhesion quality similar to or even better than that of Au bumps under thermo compression bonding. In the experiment, fine tuning of some operative parameters was executed in order to get the positive results. These operative factors include the following: (a) NCP resin viscosity, (b) NCP resin dispense pattern, (c) dispense temperatures, (d) bonding sequence, (e) bonding temperature, (f) ultrasonic power, (g) bonding force, and (h) bonding time, which play key roles in the study.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"100 1","pages":"284-286"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80989698","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Low temperature bonding of 30um pitch micro bump interconnection for 3D IC stacking using non-conductive adhesive 用非导电胶粘剂低温粘合30um间距的3D集成电路堆叠微凹凸互连
Yu-Min Lin, C. Zhan, Yu-wei Huang, Su-Ching Chung, Chia-Wen Fan, Su-Mei Chen, Yu-lan Lu, Tai-Hong Chen
For evaluating the feasibility of adhesive bonding by NCF (non-conductive film) in micro bump joints, three types of micro joints were adopted in this study. The structure of the type I micro joints was Cu/Ni/Au while that of the type II micro joints was Cu/Ni/Au micro bump joined with Cu/Sn solder micro bump. Both the type I and type II micro joint were bonded by using NCF. The structure of the type III micro joints were the same, but the type III micro joints were produced by eutectic bonding. For the type III micro joints, the micro gap between chips was wrapped by a capillary underfill. The bonding results revealed that the contact resistance of the NCF joints was in the range of 100 Qm ∼ 400 Qm which was higher than that of eutectic joints. Electrical continuity of micro bump interconnection was monitored by measuring the contact resistance of four-point Kelvin structure and daisy chain during reliability test. Thermal cycling test and thermal humidity storage test were conducted to evaluate the reliability performance of these three types of micro interconnections. The reliability test displayed that the reliability performance of eutectic joints was better than that of the NCF joints. The study showed that NCF joints have great potential to be applied in low temperature bonding of fine pitch 3D IC stacking.
为了评估NCF (non-conductive film)胶接在微凹凸接缝中的可行性,本研究采用了三种类型的微接缝。I型微接头的结构为Cu/Ni/Au, II型微接头的结构为Cu/Ni/Au微凸点与Cu/Sn焊料微凸点结合。I型和II型微关节均采用NCF进行粘接。III型微接头的组织基本相同,但III型微接头是通过共晶键合产生的。对于III型微节理,切屑之间的微间隙被毛细充填物包裹。结果表明,NCF接头的接触电阻在100 ~ 400 Qm之间,高于共晶接头。在可靠性试验中,通过测量四点开尔文结构和菊花链的接触电阻,监测微碰触互连的电连续性。通过热循环试验和热湿储存试验对三种微互联的可靠性性能进行了评价。可靠性试验表明,共晶接头的可靠性性能优于NCF接头。研究表明,NCF接头在小间距三维集成电路叠层的低温键合中具有很大的应用潜力。
{"title":"Low temperature bonding of 30um pitch micro bump interconnection for 3D IC stacking using non-conductive adhesive","authors":"Yu-Min Lin, C. Zhan, Yu-wei Huang, Su-Ching Chung, Chia-Wen Fan, Su-Mei Chen, Yu-lan Lu, Tai-Hong Chen","doi":"10.1109/IMPACT.2011.6117284","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117284","url":null,"abstract":"For evaluating the feasibility of adhesive bonding by NCF (non-conductive film) in micro bump joints, three types of micro joints were adopted in this study. The structure of the type I micro joints was Cu/Ni/Au while that of the type II micro joints was Cu/Ni/Au micro bump joined with Cu/Sn solder micro bump. Both the type I and type II micro joint were bonded by using NCF. The structure of the type III micro joints were the same, but the type III micro joints were produced by eutectic bonding. For the type III micro joints, the micro gap between chips was wrapped by a capillary underfill. The bonding results revealed that the contact resistance of the NCF joints was in the range of 100 Qm ∼ 400 Qm which was higher than that of eutectic joints. Electrical continuity of micro bump interconnection was monitored by measuring the contact resistance of four-point Kelvin structure and daisy chain during reliability test. Thermal cycling test and thermal humidity storage test were conducted to evaluate the reliability performance of these three types of micro interconnections. The reliability test displayed that the reliability performance of eutectic joints was better than that of the NCF joints. The study showed that NCF joints have great potential to be applied in low temperature bonding of fine pitch 3D IC stacking.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"24 14 1","pages":"478-481"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89187641","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Design and implementation of 3D-thermal test chip for exploration of package effects 用于封装效果探索的3d热测试芯片的设计与实现
Jui-Hung Chien, C. Lung, Ta‐Wei Lin, Kun-Ju Tsai, Ting-Sheng Chen, Yung-Fa Chou, Ping-Hei Chen, Shih-Chieh Chang, D. Kwai
Thermal solution and thermal management are critical issues in either 2.5D or 3D stacking design, especially when the hotspots are not located next to the heat sink. On the other hand, chip and package designers are eager to know the realtime temperature performance of the stacked chips therefore the workload can be assigned to the proper domain. Hence, a thermal test chip for evaluating the package is proposed in this paper. The thermal sensor network based on a ring oscillator is implemented in this work. Infrared radiation microscopic is employed for inspecting the real-time temperature performance of the chip and package. Four types of package are implemented and experimented by inspection of infrared radiation thermography. The experimental results show that one of proposed design provides good temperature consistency within difference of 0.6°C with the thermal sensors. Meanwhile, the proposed package has excellent capability for evaluating thermal management of the stacked dies by providing good thermal non-uniformity by 0.035 °C/mm.
热解决方案和热管理是2.5D或3D堆叠设计中的关键问题,特别是当热点不在散热器旁边时。另一方面,芯片和封装设计人员渴望了解堆叠芯片的实时温度性能,因此可以将工作负载分配到适当的域。因此,本文提出了一种用于评估封装的热测试芯片。本文实现了基于环形振荡器的热传感器网络。采用红外辐射显微镜对芯片和封装的温度性能进行实时检测。通过红外辐射热像仪的检测,对四种封装进行了实现和实验。实验结果表明,其中一种设计与热传感器的温度一致性较好,误差在0.6℃以内。同时,该封装提供了0.035°C/mm的良好热不均匀性,具有良好的热管理评估能力。
{"title":"Design and implementation of 3D-thermal test chip for exploration of package effects","authors":"Jui-Hung Chien, C. Lung, Ta‐Wei Lin, Kun-Ju Tsai, Ting-Sheng Chen, Yung-Fa Chou, Ping-Hei Chen, Shih-Chieh Chang, D. Kwai","doi":"10.1109/IMPACT.2011.6117289","DOIUrl":"https://doi.org/10.1109/IMPACT.2011.6117289","url":null,"abstract":"Thermal solution and thermal management are critical issues in either 2.5D or 3D stacking design, especially when the hotspots are not located next to the heat sink. On the other hand, chip and package designers are eager to know the realtime temperature performance of the stacked chips therefore the workload can be assigned to the proper domain. Hence, a thermal test chip for evaluating the package is proposed in this paper. The thermal sensor network based on a ring oscillator is implemented in this work. Infrared radiation microscopic is employed for inspecting the real-time temperature performance of the chip and package. Four types of package are implemented and experimented by inspection of infrared radiation thermography. The experimental results show that one of proposed design provides good temperature consistency within difference of 0.6°C with the thermal sensors. Meanwhile, the proposed package has excellent capability for evaluating thermal management of the stacked dies by providing good thermal non-uniformity by 0.035 °C/mm.","PeriodicalId":6360,"journal":{"name":"2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)","volume":"42 1","pages":"238-241"},"PeriodicalIF":0.0,"publicationDate":"2011-12-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91039421","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
期刊
2011 6th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT)
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