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2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)最新文献

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Constructive homotopy methods for finding all or multiple DC operating points of nonlinear circuits and systems 求非线性电路和系统全部或多个直流工作点的构造同伦方法
Jaewook Lee, H. Chiang
A comprehensive analysis of homotopy methods on the computation of all DC operating points of nonlinear circuits and systems is conducted. Several sufficient conditions for the connectivity of all the solutions along a single homotopy path are derived. These conditions offer criteria to determine a starting point from which one can find all the solutions along one homotopy path. For the class of nonlinear circuits and systems in which all the solutions lie on several homotopy paths, a new systematic method to explicitly construct a starting point for each homotopy path is developed, From a practical viewpoint, the constructive method developed does not require the difficult task of finding a good initial guess and is applicable to general nonlinear circuits and systems. From a methodological viewpoint, the constructive method developed is applicable to general homotopy methods with different homotopy functions.
对非线性电路和系统直流工作点计算的同伦方法进行了全面分析。导出了所有解沿单一同伦路径连通的几个充分条件。这些条件提供了确定一个起点的标准,从这个起点可以找到沿同伦路径的所有解。对于所有解都在若干同伦路径上的非线性电路和系统,提出了一种新的系统方法来显式地构造每条同伦路径的起点。从实用的角度来看,所开发的构造方法不需要寻找良好的初始猜测的困难任务,并且适用于一般的非线性电路和系统。从方法学的角度看,所建立的构造方法适用于具有不同同伦函数的一般同伦方法。
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引用次数: 37
Performance analysis and architecture evaluation of MPEG-4 video codec system MPEG-4视频编解码系统的性能分析与体系结构评价
Hao-Chieh Chang, Liang-Gee Chen, Mei-Yun Hsu, Yung-Chi Chang
This paper presents various analyses of computational behavior. Namely, the number of datapath operations and memory access on the core profile level 2 (CPL2) of MPEG-4 video standard. These analyzed data exploit the load distribution and mode selection of the video system. The exploration of data-flow behavior and its derived computation of MPEG-4 video processing algorithms will then drive through an efficient architecture design.
本文介绍了计算行为的各种分析。即MPEG-4视频标准的核心配置文件级别2 (CPL2)上的数据路径操作次数和内存访问次数。这些分析数据为视频系统的负载分配和模式选择提供了理论依据。数据流行为的探索及其衍生的MPEG-4视频处理算法的计算将通过一个有效的架构设计驱动。
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引用次数: 37
Repeater insertion in deep sub-micron CMOS: ramp-based analytical model and placement sensitivity analysis 深亚微米CMOS中继器插入:基于斜坡的分析模型和放置灵敏度分析
Ankireddy Nalamalpu, W. Burleson
Repeaters are now widely used to increase the performance of long on-chip interconnections in CMOS VLSI. In this paper, we take an updated look at repeater insertion in state-of-the-art CMOS, using a new more detailed model. In spite of the more complex model, we present closed form expressions for the delay and the optimal repeater spacing and sizing. Our model is based on the alpha-power law to account for the short-channel effects and resistive loads that arise in deep sub-micron technologies. Unlike previous work, we model the repeater input as a ramp and accurately model both linear and saturation regions of operation for estimating the propagation delay. Our analytical repeater model is applied for estimating the performance of driving various repeated RC loads and exhibits a maximum error of only 5% when compared with SPICE in a 0.13 /spl mu/m CMOS technology. In practice, it is not always feasible to insert the repeaters at the exact optimal locations along an interconnect. We present a placement sensitivity analysis to quantify the effect of the sub-optimal repeater placement on performance. Closed form expressions are derived to re-size the repeaters to compensate for the sub-optimal placement.
在CMOS VLSI中,中继器被广泛用于提高长片上互连的性能。在本文中,我们采用一个新的更详细的模型,对最先进的CMOS中的中继器插入进行了更新的研究。尽管模型比较复杂,但我们给出了延迟和最优中继器间距和尺寸的封闭表达式。我们的模型基于幂律,以考虑深亚微米技术中出现的短通道效应和电阻负载。与以前的工作不同,我们将中继器的输入建模为一个斜坡,并精确地模拟线性和饱和区域的操作,以估计传播延迟。我们的分析中继器模型用于估计驱动各种重复RC负载的性能,与SPICE相比,在0.13 /spl mu/m的CMOS技术中,最大误差仅为5%。在实践中,将中继器插入到沿互连的精确最佳位置并不总是可行的。我们提出了一个放置灵敏度分析来量化次优中继器放置对性能的影响。导出了封闭形式表达式来重新调整中继器的大小,以补偿次优放置。
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引用次数: 54
Implementation of overlapped block filtering using scheduling by edge reversal 利用边缘反转调度实现重叠块滤波
Charles B. Prado, P. Diniz, F. França
Implementation of overlapped block filtering using Scheduling by Edge Reversal (SER) is proposed in this paper. SER is a very simple and powerful synchronizer. It allows more efficient implementation of parallel structures. This technique is applied for the first time to FIR filters using the overlapped block digital filtering, and implemented on a parallel computer platform. The results confirm the expected reduction in computation time.
提出了一种基于边缘反转调度(SER)的重叠块滤波算法。SER是一个非常简单而强大的同步器。它允许更有效地实现并行结构。本文首次将该技术应用于FIR滤波器的叠块数字滤波,并在并行计算机平台上实现。结果证实了预期的计算时间减少。
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引用次数: 0
Combinatorial logic based forward converters in residue number systems 基于组合逻辑的剩余数系统正演变换器
A. Premkumar, M. Bhardwaj
The Residue Number System (RNS) offers unlimited opportunities for high performance arithmetic provided efficient forward and reverse converters could be constructed for the moduli set at hand. All forward conversion proposals to date, require some form of Read Only Memory (ROM) along with computational elements like Full Adders (FA). In this paper, we show that by formulating the forward conversion problem in terms of modular exponentiation and addition, we can achieve memory free conversion. We generalize our solution such that bit serial and bit parallel implementations can be derived by simply varying a parameter, namely, multiplexers. Apart from this formulation itself, the paper makes two other contributions. Firstly, it demonstrates an entirely new set of converters that use no look up. Secondly, we show how conversion complexity can be reduced significantly by sharing circuitry over several forward converters.
剩余数系统(RNS)为高性能算法提供了无限的机会,只要可以为手边的模集构造有效的正向和反向变换器。到目前为止,所有前向转换建议都需要某种形式的只读存储器(ROM)以及全加法器(FA)等计算元素。在本文中,我们证明了通过用模幂和加法来表述前向转换问题,我们可以实现无内存转换。我们推广我们的解决方案,使位串行和位并行实现可以通过简单地改变一个参数,即多路复用器来推导。除了这个公式本身,这篇论文还有另外两个贡献。首先,它演示了一套全新的不查找转换器。其次,我们展示了如何通过在几个正向转换器上共享电路来显着降低转换复杂性。
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引用次数: 2
Wave digital simulation of electrical networks containing nonlinear dynamical elements-a new approach 含非线性动力元件的电网波动数字仿真——一种新方法
D. Franken
Wave digital filter principles are known to be applicable to the numerical solution of many kinds of differential equations. But, when applied to an electrical network containing nonlinear dynamical elements, the resulting algorithm often includes implicit equations. In this paper, a new approach is presented which leaves the underlying wave digital structure unchanged but avoids the task of finding exact solutions to the implicit equations involved.
众所周知,波数字滤波原理适用于多种微分方程的数值解。但是,当应用于包含非线性动力元素的电网络时,得到的算法通常包含隐式方程。在本文中,提出了一种新的方法,它使底层波的数字结构保持不变,但避免了寻找所涉及的隐式方程的精确解的任务。
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引用次数: 3
Block-matching evaluation in digital architectures for motion estimation 运动估计数字体系结构中的块匹配评估
L. Raffo, M. P. Zizola
In this paper a comparison between different methods for block matching in image processing with respect to the efficacy of their digital VLSI implementation is presented. In this framework a new method based on limiting the role of mismatching pixels is proposed. The results obtained on different kinds of images show that the new method achieves the best trade-off between complexity and results.
本文比较了图像处理中不同的块匹配方法在数字VLSI实现中的有效性。在此框架下,提出了一种基于限制错配像素作用的新方法。在不同类型的图像上得到的结果表明,新方法在复杂度和结果之间取得了最好的平衡。
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引用次数: 0
A search for a parsimonious basis sequence approximation of time-varying, nonlinear systems 时变非线性系统的简约基序列逼近
Matthew Green, A. Zoubir
An approach for identifying time-varying nonlinear systems is presented. The time-variation of the system is approximated by a weighted combination of sequences from a given basis. In this case, to identify the system it is sufficient to estimate the time-invariant coefficients of the sequences. The focus of our investigation is on selecting these sequences to use in the approximation. We propose using a search method to determine which sequences contribute significantly to the approximation and thus lead to a parsimonious model that is able to characterise the system dynamics and time-variation together.
提出了一种时变非线性系统的辨识方法。系统的时变由给定基的序列加权组合来逼近。在这种情况下,为了识别系统,估计序列的时不变系数就足够了。我们研究的重点是选择这些序列用于逼近。我们建议使用搜索方法来确定哪些序列对近似有重要贡献,从而导致能够同时表征系统动力学和时间变化的简约模型。
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引用次数: 1
Stability and transient behavior of Bode-type variable-amplitude digital equalizers with dynamic variable multiplier variations 具有动态可变乘法器变化的波德式变幅数字均衡器的稳定性和瞬态特性
A. Fuller, B. Nowrouzian
In a previous publication, the theoretical basis provided by Kharitonov's stability theorem was exploited and applied to the development of a novel BIBO stability condition for general-order Bode-type variable-amplitude (VA) digital equalizers. This was achieved under the assumptions, (a) that the VA digital equalizer operates under infinite precision arithmetic, and (b) that it operates under "static" variable digital multiplier variations (i.e. variations which occur slowly or only after the transients resulting from the "dynamic" variations of the digital multiplier have died down to negligible levels). The present paper is concerned with an extension of the results to the investigation of the effect of "dynamic" variations of the variable digital multiplier on the stability and transient signal behaviour of the Bode-type VA digital equalizers both under infinite-precision as well as finite-precision digital equalizer operations. An analytical relationship is also derived for the estimation of the time required for the equalizer output signal transients to reduce to a specified negligible level. An application example is given to illustrate the practical application of the main results.
在之前的一篇文章中,利用Kharitonov稳定性定理提供的理论基础,并将其应用于开发一种新的一般阶bode型变振幅(VA)数字均衡器的BIBO稳定性条件。这是在以下假设下实现的:(a) VA数字均衡器在无限精度算术下工作,以及(b)它在“静态”可变数字乘法器变化下工作(即,在数字乘法器的“动态”变化引起的瞬变已经消失到可以忽略不计的水平之后缓慢发生的变化)。本文研究了在无限精度和有限精度数字均衡器操作下,可变数字乘法器的“动态”变化对波德型VA数字均衡器的稳定性和暂态信号行为的影响。还推导了均衡器输出信号瞬态降低到指定的可忽略电平所需时间的估计的解析关系。最后给出了一个应用实例来说明主要结果的实际应用。
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引用次数: 0
Strongly consistent recursive regression estimation under depended observations 依赖观测下的强一致递归回归估计
K. Chernyshov
The paper is focused on establishing strong consistency of recursive estimates of nonlinear characteristics of dynamic systems. To describe the shape of the nonlinearities, the regression function kernel type estimates are used. Within the approach presented, a feature of the technique is considering a case of mutually dependent observations. Simultaneously, only mild and easy verified assumptions with respect to the system's input and output processes, as well as to the external disturbances, are involved.
本文主要研究动态系统非线性特性的递推估计的强相合性。为了描述非线性的形状,使用回归函数核类型估计。在提出的方法中,该技术的一个特点是考虑相互依赖观察的情况。同时,对于系统的输入和输出过程,以及外部干扰,只涉及温和且易于验证的假设。
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2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353)
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