Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.608822
H. C. Reddy, G. Moschytz
The signal processing algorithms based on conventional shift operator tend to be ill-conditioned in situations involving fast sampling and shorter wordlength. To alleviate this problem delta operator based analysis and design has been proposed for high speed digital signal processing and control systems. The advantage for delta (/spl delta/) operator seems to come from the fact as sampling period T/sub s//spl rarr/0, the discrete time system process resembles that of continuous time system. In this paper we develop a unified cellular neural network (CNN) cell model using the delta operator approach. The model gives a general discrete-time (DT) CNN cell dynamics in which the sampling period T/sub s/ is an explicit parameter. As T/sub s//spl rarr/0, we get the continuous time (CT)-CNN equation. Several results connected with the stability and robustness of CT-CNN and DT-CNN can be linked using this approach. This approach highlights the similarities, rather than the differences between discrete and continuous CNNs, thus allowing continuous insights to be applied to the discrete CNN case. Further, more importantly from the implementation point of view, delta operator based DT-CNN cell design can be obtained using /spl delta//sup -1/ as an integrator {instead of a delay (z/sup -1/)}. The /spl delta//sup -1/ integrator can be realized using switched current/switched capacitor circuits. The dynamic circuit element in the DT-CNN is thus "/spl delta//sup -1/".
{"title":"Unified cellular neural network cell dynamical equation using delta operator","authors":"H. C. Reddy, G. Moschytz","doi":"10.1109/ISCAS.1997.608822","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608822","url":null,"abstract":"The signal processing algorithms based on conventional shift operator tend to be ill-conditioned in situations involving fast sampling and shorter wordlength. To alleviate this problem delta operator based analysis and design has been proposed for high speed digital signal processing and control systems. The advantage for delta (/spl delta/) operator seems to come from the fact as sampling period T/sub s//spl rarr/0, the discrete time system process resembles that of continuous time system. In this paper we develop a unified cellular neural network (CNN) cell model using the delta operator approach. The model gives a general discrete-time (DT) CNN cell dynamics in which the sampling period T/sub s/ is an explicit parameter. As T/sub s//spl rarr/0, we get the continuous time (CT)-CNN equation. Several results connected with the stability and robustness of CT-CNN and DT-CNN can be linked using this approach. This approach highlights the similarities, rather than the differences between discrete and continuous CNNs, thus allowing continuous insights to be applied to the discrete CNN case. Further, more importantly from the implementation point of view, delta operator based DT-CNN cell design can be obtained using /spl delta//sup -1/ as an integrator {instead of a delay (z/sup -1/)}. The /spl delta//sup -1/ integrator can be realized using switched current/switched capacitor circuits. The dynamic circuit element in the DT-CNN is thus \"/spl delta//sup -1/\".","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"77 1","pages":"577-580 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74274429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.608708
J.S. Mueller, R. S. Gyurcsik
Two techniques are presented that are expected to greatly enhance wireless data collection from high-bandwidth biosensors. By steering the aggregate magnetic field from a (near-) orthogonal set of AC-energized coils, selected sensor implants can be powered and communicated with. Communication with individual implants can also be enhanced through half-cycle amplitude modulation. This technique allows bit rates of up to twice the energizing frequency. Initial results and future investigations are discussed.
{"title":"Two novel techniques for enhancing powering and control of multiple inductively-powered biomedical implants","authors":"J.S. Mueller, R. S. Gyurcsik","doi":"10.1109/ISCAS.1997.608708","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608708","url":null,"abstract":"Two techniques are presented that are expected to greatly enhance wireless data collection from high-bandwidth biosensors. By steering the aggregate magnetic field from a (near-) orthogonal set of AC-energized coils, selected sensor implants can be powered and communicated with. Communication with individual implants can also be enhanced through half-cycle amplitude modulation. This technique allows bit rates of up to twice the energizing frequency. Initial results and future investigations are discussed.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"52 1","pages":"289-292 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74361121","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.621527
D. E., '. Kyriakis-Bitzaros, Agia Paraslkevi
The design of low power CMOS drivers using a charge recycling technique is introduced in this paper. Assuming simultaneous change of complementary signals, the half of the charge stored in the load capacitances is reused in every signal transition. All the control signals are generated by using completely digital logic and conventional technology. Compared to traditional taper buffers, power savings over 45% are obtained for the output load transitions. No speed degradation is observed but almost duplication of the silicon area is required.
{"title":"Design of low power CMOS drivers based on charge recycling","authors":"D. E., '. Kyriakis-Bitzaros, Agia Paraslkevi","doi":"10.1109/ISCAS.1997.621527","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.621527","url":null,"abstract":"The design of low power CMOS drivers using a charge recycling technique is introduced in this paper. Assuming simultaneous change of complementary signals, the half of the charge stored in the load capacitances is reused in every signal transition. All the control signals are generated by using completely digital logic and conventional technology. Compared to traditional taper buffers, power savings over 45% are obtained for the output load transitions. No speed degradation is observed but almost duplication of the silicon area is required.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"3 1","pages":"1924-1927 vol.3"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74559094","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.608921
F. Leung, H.K. Lam, P. Tam
The problem of model reference adaptive control (MRAC) for nonlinear time-varying plants based on a fuzzy model is addressed. It is known that this kind of plants can readily be described by a fuzzy model. To tackle the plant parameter variations, an adaptive algorithm is derived to tune a designed fuzzy controller such that the system output follows a desired output from a reference fuzzy plant model. The stability of the closed-loop system is guaranteed. Cases of full-state feedback and output feedback are to be investigated. The results and merits of the proposed algorithms are illustrated by an example for each case.
{"title":"On fuzzy model reference adaptive control systems: full-state feedback and output feedback","authors":"F. Leung, H.K. Lam, P. Tam","doi":"10.1109/ISCAS.1997.608921","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608921","url":null,"abstract":"The problem of model reference adaptive control (MRAC) for nonlinear time-varying plants based on a fuzzy model is addressed. It is known that this kind of plants can readily be described by a fuzzy model. To tackle the plant parameter variations, an adaptive algorithm is derived to tune a designed fuzzy controller such that the system output follows a desired output from a reference fuzzy plant model. The stability of the closed-loop system is guaranteed. Cases of full-state feedback and output feedback are to be investigated. The results and merits of the proposed algorithms are illustrated by an example for each case.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"55 6","pages":"665-668 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72561737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.622187
C. Tang, O. Au
Common techniques such as frame repetition or linear interpolation for reconstructing skipped frames in temporally subsampled video sequence tend to introduce undesirable artifacts. A previously proposed technique, motion compensated temporal interpolation (MCTI) can interpolate video frames in the time domain with good image quality at the cost of high computational requirement and substantial memory requirement. In this paper, we propose an algorithm called Unidirectional Motion Compensated Temporal Interpolation (UMCTI) which has lower computational and memory requirement but achieves considerably better peak-signal-to-noise ratio (PSNR). Several variants incorporating stationary block detection and/or overlapping motion compensation are also studied.
{"title":"Unidirectional motion compensated temporal interpolation","authors":"C. Tang, O. Au","doi":"10.1109/ISCAS.1997.622187","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.622187","url":null,"abstract":"Common techniques such as frame repetition or linear interpolation for reconstructing skipped frames in temporally subsampled video sequence tend to introduce undesirable artifacts. A previously proposed technique, motion compensated temporal interpolation (MCTI) can interpolate video frames in the time domain with good image quality at the cost of high computational requirement and substantial memory requirement. In this paper, we propose an algorithm called Unidirectional Motion Compensated Temporal Interpolation (UMCTI) which has lower computational and memory requirement but achieves considerably better peak-signal-to-noise ratio (PSNR). Several variants incorporating stationary block detection and/or overlapping motion compensation are also studied.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"50 1","pages":"1444-1447 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72578035","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.612909
Zhongli He, M. Liou
Traditional block-matching motion estimation algorithms search motion vectors using full precision pixels, normally 8-bits-per-pixel. In this paper, we introduce an approach for block-matching motion estimation using truncated pixels. The full-search algorithm is employed for discussion. We investigate the system performance with different number of truncated bits. Simulation results show that the matching error decreases exponentially when the number of truncated bits is reduced, and the number of truncated bits of 4 can be chosen as a reasonable solution for motion vector searching. We also discovered that the average PSNR of the decoded video sequences degrades only 0.03%-2.1%, while the equivalent gate count drops 46% for many of the existing VLSI architectures!.
{"title":"Reducing hardware complexity of motion estimation algorithms using truncated pixels","authors":"Zhongli He, M. Liou","doi":"10.1109/ISCAS.1997.612909","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.612909","url":null,"abstract":"Traditional block-matching motion estimation algorithms search motion vectors using full precision pixels, normally 8-bits-per-pixel. In this paper, we introduce an approach for block-matching motion estimation using truncated pixels. The full-search algorithm is employed for discussion. We investigate the system performance with different number of truncated bits. Simulation results show that the matching error decreases exponentially when the number of truncated bits is reduced, and the number of truncated bits of 4 can be chosen as a reasonable solution for motion vector searching. We also discovered that the average PSNR of the decoded video sequences degrades only 0.03%-2.1%, while the equivalent gate count drops 46% for many of the existing VLSI architectures!.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"1 1","pages":"2809-2812 vol.4"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://sci-hub-pdf.com/10.1109/ISCAS.1997.612909","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72527486","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.612820
T. Sekiguchi, Y. Karasawa
We propose a method of designing FIR fan filters used for a multiple beamformer in a beamspace adaptive array for broadband signals. Approximation is achieved by the combination of spectral transformation and the window method so that the directional pattern of the resulting fan filter may be virtually independent of frequency including those for sidelobe characteristics. Through the implementation of fan filters designed in the proposed method, we demonstrate that it is possible to suppress interference signals with a wide fractional bandwidth using a beamspace adaptive array.
{"title":"Design of FIR fan filters used for beamspace adaptive array for broadband signals","authors":"T. Sekiguchi, Y. Karasawa","doi":"10.1109/ISCAS.1997.612820","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.612820","url":null,"abstract":"We propose a method of designing FIR fan filters used for a multiple beamformer in a beamspace adaptive array for broadband signals. Approximation is achieved by the combination of spectral transformation and the window method so that the directional pattern of the resulting fan filter may be virtually independent of frequency including those for sidelobe characteristics. Through the implementation of fan filters designed in the proposed method, we demonstrate that it is possible to suppress interference signals with a wide fractional bandwidth using a beamspace adaptive array.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"6 1","pages":"2453-2456 vol.4"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73631335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.621836
I. Watada, T. Endo
We investigate Shilnikov homoclinic bifurcation from a new type of phase-locked loop (PLL) which uses second-order loop filter with no modulation carrier input. This system can be represented as a 3rd-order autonomous system with piecewise linear characteristics. We have found many Shilnikov orbits, and draw a bifurcation diagram in gain K/sub 0/ versus detuning /spl delta/ parameter plane.
{"title":"Shilnikov orbits in an autonomous third-order chaotic phase-locked loop","authors":"I. Watada, T. Endo","doi":"10.1109/ISCAS.1997.621836","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.621836","url":null,"abstract":"We investigate Shilnikov homoclinic bifurcation from a new type of phase-locked loop (PLL) which uses second-order loop filter with no modulation carrier input. This system can be represented as a 3rd-order autonomous system with piecewise linear characteristics. We have found many Shilnikov orbits, and draw a bifurcation diagram in gain K/sub 0/ versus detuning /spl delta/ parameter plane.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"5 1","pages":"809-812 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73634000","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.621497
S. Jou, I-Yao Chuang
In this paper an efficient implementation of self-timed circuits whose hardware and control signals are significantly reduced is first proposed. By applying Globally Asynchronous Locally Synchronous (GALS) design techniques, the hardware overhead is further reduced. GALS and synchronous version of 8-bit fully pipelined array multipliers are implemented for comparisons. The results show that GALS version has smaller peak current, less power consumption under variable workload with small hardware overhead as compared to synchronous version.
{"title":"Low-power globally asynchronous locally synchronous design using self-timed circuit technology","authors":"S. Jou, I-Yao Chuang","doi":"10.1109/ISCAS.1997.621497","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.621497","url":null,"abstract":"In this paper an efficient implementation of self-timed circuits whose hardware and control signals are significantly reduced is first proposed. By applying Globally Asynchronous Locally Synchronous (GALS) design techniques, the hardware overhead is further reduced. GALS and synchronous version of 8-bit fully pipelined array multipliers are implemented for comparisons. The results show that GALS version has smaller peak current, less power consumption under variable workload with small hardware overhead as compared to synchronous version.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"39 1","pages":"1808-1811 vol.3"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85057023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-09DOI: 10.1109/ISCAS.1997.608720
R. Raut, N. Guo
A very wideband CMOS transconductor is used to build a wideband transimpedance amplifier, which realizes second order low pass filters having -3 dB bandwidth to 75.6 MHz and band-pass filter with center frequency of 159 MHz using 1 pF with /spl plusmn/1.25 V power supplies. The power dissipations are respectively 0.67 mW and 0.45 mW per pole. Using Miller effect capacitance of MOS transistors, the low pass filter can be tuned from 124 MHz to 233 MHz with slightly increased power dissipation (0.78 mW per pole). An alternate architecture produces a low-pass bandwidth to 171.3 MHz with 1pF capacitors and a power dissipation of only 0.67 mW per pole. With /spl plusmn/2.5 V supply, the -3 dB frequency and the center frequency can be extended to 286 MHz and 398 MHz respectively with power dissipations of 12.25 mW/pole and 8.17 mW/pole respectively. Both voltage- and current-mode structures are studied.
{"title":"Low power wideband voltage and current mode second-order filters using wideband CMOS transimpedance network","authors":"R. Raut, N. Guo","doi":"10.1109/ISCAS.1997.608720","DOIUrl":"https://doi.org/10.1109/ISCAS.1997.608720","url":null,"abstract":"A very wideband CMOS transconductor is used to build a wideband transimpedance amplifier, which realizes second order low pass filters having -3 dB bandwidth to 75.6 MHz and band-pass filter with center frequency of 159 MHz using 1 pF with /spl plusmn/1.25 V power supplies. The power dissipations are respectively 0.67 mW and 0.45 mW per pole. Using Miller effect capacitance of MOS transistors, the low pass filter can be tuned from 124 MHz to 233 MHz with slightly increased power dissipation (0.78 mW per pole). An alternate architecture produces a low-pass bandwidth to 171.3 MHz with 1pF capacitors and a power dissipation of only 0.67 mW per pole. With /spl plusmn/2.5 V supply, the -3 dB frequency and the center frequency can be extended to 286 MHz and 398 MHz respectively with power dissipations of 12.25 mW/pole and 8.17 mW/pole respectively. Both voltage- and current-mode structures are studied.","PeriodicalId":68559,"journal":{"name":"电路与系统学报","volume":"48 1","pages":"313-316 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1997-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85246601","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}