Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994411
K. Tahy, W. Hwang, J. Tedesco, R. Myers-Ward, P. Campbell, C. Eddy, D. Gaskill, H. Xing, A. Seabaugh, D. Jena
Graphene is being investigated as a promising candidate for electronic devices. For digital electronic devices, a substantial bandgap is necessary. It is possible to open a bandgap in graphene by quantum confinement of the carriers in patterned graphene nanoribbons (GNRs); GNRs with width W nm have a bandgap Eg∼1.3/W eV [1]. This implies that sub-10 nm wide ribbons can enable room-temperature operation of GNRs as traditional semiconductors, but with ultimate vertical scaling, and still take advantage of high current drives. To date, GNRs have been fabricated from exfoliated graphene [2] and operated by back gates, or nanometer scale ribbons produced by ‘explosive’ methods [3] that are neither controlled nor reproducible. These methods are not suitable for large-area device fabrication. In this work, we report lithographically patterned GNRs on epitaxial graphene on SiC substrates. Specifically, we show the first top-gated GNR field-effect transistors (FETs) on epi-graphene substrates that exhibit the opening of a substantial energy bandgap (exceeding ∼0.15 eV at a ribbon width of 10 nm), respectable carrier mobility (700 – 800 cm2/Vs), high current modulation (10∶1 at 300 K), and high current carrying capacity (0.3 mA/µm at VDS = 1 V) at the same time. Both single GNR and GNR array devices are reported.
{"title":"Sub-10 nm epitaxial graphene nanoribbon FETs","authors":"K. Tahy, W. Hwang, J. Tedesco, R. Myers-Ward, P. Campbell, C. Eddy, D. Gaskill, H. Xing, A. Seabaugh, D. Jena","doi":"10.1109/DRC.2011.5994411","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994411","url":null,"abstract":"Graphene is being investigated as a promising candidate for electronic devices. For digital electronic devices, a substantial bandgap is necessary. It is possible to open a bandgap in graphene by quantum confinement of the carriers in patterned graphene nanoribbons (GNRs); GNRs with width W nm have a bandgap Eg∼1.3/W eV [1]. This implies that sub-10 nm wide ribbons can enable room-temperature operation of GNRs as traditional semiconductors, but with ultimate vertical scaling, and still take advantage of high current drives. To date, GNRs have been fabricated from exfoliated graphene [2] and operated by back gates, or nanometer scale ribbons produced by ‘explosive’ methods [3] that are neither controlled nor reproducible. These methods are not suitable for large-area device fabrication. In this work, we report lithographically patterned GNRs on epitaxial graphene on SiC substrates. Specifically, we show the first top-gated GNR field-effect transistors (FETs) on epi-graphene substrates that exhibit the opening of a substantial energy bandgap (exceeding ∼0.15 eV at a ribbon width of 10 nm), respectable carrier mobility (700 – 800 cm2/Vs), high current modulation (10∶1 at 300 K), and high current carrying capacity (0.3 mA/µm at VDS = 1 V) at the same time. Both single GNR and GNR array devices are reported.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133716192","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994530
K. Shinohara, D. Regan, I. Milosavljevic, A. Corrion, D. Brown, S. Burnham, P. Willadsen, C. Butler, A. Schmitz, S. Kim, V. Lee, A. Ohoka, P. Asbeck, M. Micovic
The high frequency performance of GaN-based HEMTs has been significantly improved through innovative device scaling technologies such as AlGaN [1] or InGaN back barriers [2], thin AlN top barriers [3], lattice-matched InAlN barriers [4], ultra-short gates [5], and self-aligned gates [6]. In this paper, we review our scaling technologies for ultra-high-speed operation of GaN-HEMTs [7–10], which provide not only high yield and uniformity but also a large-scale integration of E/D-mode HEMTs for future RF and mixed-signal applications.
{"title":"Device scaling technologies for ultra-high-speed GaN-HEMTs","authors":"K. Shinohara, D. Regan, I. Milosavljevic, A. Corrion, D. Brown, S. Burnham, P. Willadsen, C. Butler, A. Schmitz, S. Kim, V. Lee, A. Ohoka, P. Asbeck, M. Micovic","doi":"10.1109/DRC.2011.5994530","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994530","url":null,"abstract":"The high frequency performance of GaN-based HEMTs has been significantly improved through innovative device scaling technologies such as AlGaN [1] or InGaN back barriers [2], thin AlN top barriers [3], lattice-matched InAlN barriers [4], ultra-short gates [5], and self-aligned gates [6]. In this paper, we review our scaling technologies for ultra-high-speed operation of GaN-HEMTs [7–10], which provide not only high yield and uniformity but also a large-scale integration of E/D-mode HEMTs for future RF and mixed-signal applications.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131779198","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994495
P. Solomon, D. Frank, S. Koswatta
A compact model is presented which realistically reproduces TFET characteristics and allows complex circuit simulation and parameter optimization studies. The model has been applied to circuit simulations which reveal anomalous switching behavior, and to a multi-parameter optimization study which quantifies the power-performance advantage of the TFET over conventional MOSFETs.
{"title":"Compact model and performance estimation for tunneling nanowire FET","authors":"P. Solomon, D. Frank, S. Koswatta","doi":"10.1109/DRC.2011.5994495","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994495","url":null,"abstract":"A compact model is presented which realistically reproduces TFET characteristics and allows complex circuit simulation and parameter optimization studies. The model has been applied to circuit simulations which reveal anomalous switching behavior, and to a multi-parameter optimization study which quantifies the power-performance advantage of the TFET over conventional MOSFETs.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125209238","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994418
D. Maier, M. Alomari, N. Grandjean, J. Carlin, M. diForte-Poisson, C. Dua, S. Delage, E. Kohn
High temperature electronics is up to now essentially limited to approx. 500 °C by the high temperature properties of the active semiconductor elements mostly based on SiC [1]. Sensing at even higher temperature relies therefore mostly on non-semiconductor components essentially limiting the systems complexities. However in recent years III-Nitride heterostructures, namely lattice matched InAlN/GaN heterostructures, have become an alternative. In an initial proof-of-concept experiment in 2006 [2] 1000 °C operation could be demonstrated for a short period of time.
{"title":"Towards electronics at 1000 °C","authors":"D. Maier, M. Alomari, N. Grandjean, J. Carlin, M. diForte-Poisson, C. Dua, S. Delage, E. Kohn","doi":"10.1109/DRC.2011.5994418","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994418","url":null,"abstract":"High temperature electronics is up to now essentially limited to approx. 500 °C by the high temperature properties of the active semiconductor elements mostly based on SiC [1]. Sensing at even higher temperature relies therefore mostly on non-semiconductor components essentially limiting the systems complexities. However in recent years III-Nitride heterostructures, namely lattice matched InAlN/GaN heterostructures, have become an alternative. In an initial proof-of-concept experiment in 2006 [2] 1000 °C operation could be demonstrated for a short period of time.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125651964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994450
A. Lyons, A. Behnam, E. Chow, E. Pop
Graphene nanoribbons (GNRs) are promising candidates for nanoelectronics as interconnects or field-effect transistors (FETs) [1,2]. Previous GNR studies used chemically derived [1] or mechanically exfoliated [2] graphene, which are not practical for large scale fabrication. In this work we present a comprehensive analysis of GNR FETs obtained by chemical vapor deposition (CVD) [3], which is promising for creating wafer-scale circuits. We demonstrate low-bias, high-bias, and temperature-dependent measurements. We find that CVD GNRs have properties comparable to the best state-of-the-art GNRs obtained by other methods, suggesting that grain boundaries play a negligible role in sub-100 nm devices. This approach also serves to identify future challenges and represents a first step towards large-scale integration.
{"title":"Transport properties of CVD-grown graphene nanoribbon field-effect transistors","authors":"A. Lyons, A. Behnam, E. Chow, E. Pop","doi":"10.1109/DRC.2011.5994450","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994450","url":null,"abstract":"Graphene nanoribbons (GNRs) are promising candidates for nanoelectronics as interconnects or field-effect transistors (FETs) [1,2]. Previous GNR studies used chemically derived [1] or mechanically exfoliated [2] graphene, which are not practical for large scale fabrication. In this work we present a comprehensive analysis of GNR FETs obtained by chemical vapor deposition (CVD) [3], which is promising for creating wafer-scale circuits. We demonstrate low-bias, high-bias, and temperature-dependent measurements. We find that CVD GNRs have properties comparable to the best state-of-the-art GNRs obtained by other methods, suggesting that grain boundaries play a negligible role in sub-100 nm devices. This approach also serves to identify future challenges and represents a first step towards large-scale integration.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124195132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994453
Jenny Hu, K. Saraswat, H. Wong
In summary, we successfully demonstrate RC and ΦB,eff tuning of Al/n-GaAs junctions by a MIS diode structure using ALD HfO2, TiO2, and ZrO2 dielectrics. We also introduce for the first time the use of HfO2/TiO2, two high-κ dielectrics in combination to further shift the Fermi level and reduce ΦB,eff. The underlying mechanism is believed to be the formation of a high-κ/high-κ dipole, which opens doors to the exploration of a multitude of other high-κ/high-κ dielectrics to ultimately achieve ΦB,eff ≤ 0. This MIS structure provides much flexibility in the design of ideal source/drain contacts for III–V MOSFETs and Schottky Barrier FETs, where in real applications highly doped substrates would significantly reduce RC and ΦB,eff. Further study of the dipole interaction and effective work function will lead to a better understanding of the physics behind metal/III–V contacts.
{"title":"Metal/III–V effective barrier height tuning using ALD high-κ dipoles","authors":"Jenny Hu, K. Saraswat, H. Wong","doi":"10.1109/DRC.2011.5994453","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994453","url":null,"abstract":"In summary, we successfully demonstrate R<inf>C</inf> and Φ<inf>B,eff</inf> tuning of Al/n-GaAs junctions by a MIS diode structure using ALD HfO<inf>2</inf>, TiO<inf>2</inf>, and ZrO<inf>2</inf> dielectrics. We also introduce for the first time the use of HfO<inf>2</inf>/TiO<inf>2</inf>, two high-κ dielectrics in combination to further shift the Fermi level and reduce Φ<inf>B,eff</inf>. The underlying mechanism is believed to be the formation of a high-κ/high-κ dipole, which opens doors to the exploration of a multitude of other high-κ/high-κ dielectrics to ultimately achieve Φ<inf>B,eff</inf> ≤ 0. This MIS structure provides much flexibility in the design of ideal source/drain contacts for III–V MOSFETs and Schottky Barrier FETs, where in real applications highly doped substrates would significantly reduce R<inf>C</inf> and Φ<inf>B,eff</inf>. Further study of the dipole interaction and effective work function will lead to a better understanding of the physics behind metal/III–V contacts.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129523070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994416
Feng Li, Z. Fang, R. Misra, S. Tadigadapa, Qiming Zhang, S. Datta
Magnetoelectric (ME) laminates show higher ME coefficients than that of natural multiferroics (e.g. Cr2O3, BiTiO) by up to several orders of magnitude. Recent studies on bulk ME sensors using Fe85B5Si10 (Metglas) /polyvinylidene fluoride composite show a high ME voltage coefficient of 21V/cm·Oe at 20 Hz [1]. However, bulk sensors suffer from poor epoxy bonding, aging and difficulty of integration with CMOS electronics. Here, we report, for the first time, the monolithic nanofabrication of Pb(Zr0.52Ti0.48)O3 (PZT)-Fe85B5Si10 ME cantilevers (Fig.1(a)) on silicon substrate which achieve 0.46 V/cm·Oe at 20 Hz and 1.8 V/cm·Oe at a resonance frequency of 8.4 KHz. Also, ME cantilever based resonant gate transistors (RGT) (Fig.1 (b)) has been designed and analyzed in comparison with ME cantilever. A 10X signal to noise ratio improvement can be reached by ME RGT. This shows the compatibility of the nanofabricated cantilever ME sensors with the Si process technology and paves the way for the future integration of MEMS based ultra-sensitive magnetic sensors with advanced Si nanoelectronics.
{"title":"Giant magnetoelectric effect in nanofabricated Pb(Zr0.52Ti0.48)O3-Fe85B5Si10 cantilevers and resonant gate transistors","authors":"Feng Li, Z. Fang, R. Misra, S. Tadigadapa, Qiming Zhang, S. Datta","doi":"10.1109/DRC.2011.5994416","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994416","url":null,"abstract":"Magnetoelectric (ME) laminates show higher ME coefficients than that of natural multiferroics (e.g. Cr<inf>2</inf>O<inf>3</inf>, BiTiO) by up to several orders of magnitude. Recent studies on bulk ME sensors using Fe<inf>85</inf>B<inf>5</inf>Si<inf>10</inf> (Metglas) /polyvinylidene fluoride composite show a high ME voltage coefficient of 21V/cm·Oe at 20 Hz [1]. However, bulk sensors suffer from poor epoxy bonding, aging and difficulty of integration with CMOS electronics. Here, we report, for the first time, the monolithic nanofabrication of Pb(Zr<inf>0.52</inf>Ti<inf>0.48</inf>)O<inf>3</inf> (PZT)-Fe<inf>85</inf>B<inf>5</inf>Si<inf>10</inf> ME cantilevers (Fig.1(a)) on silicon substrate which achieve 0.46 V/cm·Oe at 20 Hz and 1.8 V/cm·Oe at a resonance frequency of 8.4 KHz. Also, ME cantilever based resonant gate transistors (RGT) (Fig.1 (b)) has been designed and analyzed in comparison with ME cantilever. A 10X signal to noise ratio improvement can be reached by ME RGT. This shows the compatibility of the nanofabricated cantilever ME sensors with the Si process technology and paves the way for the future integration of MEMS based ultra-sensitive magnetic sensors with advanced Si nanoelectronics.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129220345","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994420
N. Rouhi, D. Jain, P. Burke
In this paper we present a comprehensive study of the solution-based printed carbon nanotube purified-ink devices while introducing a new idea of controlling the electronic performance of these devices. One of the most important concerns in nanoelectronics is whether the nanotube-based devices will ever enter the reality world of circuit designs? What are the fundamental and critical issues to be resolved? Which parameters affect the device performance most? A comprehensive study of the relationship between mobility, on/off ratio, and nanotube network density is presented for the first time in detail. This study reveals a clear road map towards experimental control over the performance of solution-based nanotube thin film transistors for a wide range of state-of-the-art applications.
{"title":"Carbon nanotube purified ink-based printed thin film transistors: Novel approach in controlling the electrical performance","authors":"N. Rouhi, D. Jain, P. Burke","doi":"10.1109/DRC.2011.5994420","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994420","url":null,"abstract":"In this paper we present a comprehensive study of the solution-based printed carbon nanotube purified-ink devices while introducing a new idea of controlling the electronic performance of these devices. One of the most important concerns in nanoelectronics is whether the nanotube-based devices will ever enter the reality world of circuit designs? What are the fundamental and critical issues to be resolved? Which parameters affect the device performance most? A comprehensive study of the relationship between mobility, on/off ratio, and nanotube network density is presented for the first time in detail. This study reveals a clear road map towards experimental control over the performance of solution-based nanotube thin film transistors for a wide range of state-of-the-art applications.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114280095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994470
S. Srinivasan, A. Sarkar, Behtash Behin-Aien, S. Datta
Magnet based logic devices have received much attention as potential alternatives [1] to charge based electronics in order to answer the ever growing concern [2] about the limits of CMOS scaling, especially since it has been shown that the energy required to turn a magnet could be as low as a few atto-joules [3]. The recently proposed All Spin Logic (ASL) device [4] is one such scheme whereby information is stored in the state of magnets and is communicated between magnets purely through spin currents, thus operating entirely within a new paradigm: using spin as a state variable.
{"title":"Unidirectional information transfer with cascaded All Spin Logic devices: A Ring Oscillator","authors":"S. Srinivasan, A. Sarkar, Behtash Behin-Aien, S. Datta","doi":"10.1109/DRC.2011.5994470","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994470","url":null,"abstract":"Magnet based logic devices have received much attention as potential alternatives [1] to charge based electronics in order to answer the ever growing concern [2] about the limits of CMOS scaling, especially since it has been shown that the energy required to turn a magnet could be as low as a few atto-joules [3]. The recently proposed All Spin Logic (ASL) device [4] is one such scheme whereby information is stored in the state of magnets and is communicated between magnets purely through spin currents, thus operating entirely within a new paradigm: using spin as a state variable.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126853604","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-06-20DOI: 10.1109/DRC.2011.5994522
Chin-Han Lin, Yan Zheng, M. Gross, M. Rodwell, L. Coldren
We have demonstrated a novel Field-Induced Charge-Separation Laser (FICSL) in a Vertical-Cavity Surface-Emitting Laser (VCSEL) embodiment. In addition to the initial optical modulation results that have been presented [1], we here for the first time present details on the novel lateral charge injection structure as well as the advanced bandgap engineering involved in the gate structure. These features together permit high-speed light modulation with a nearly constant injection current. The result is an entirely new concept for high-speed directly-modulated semiconductor lasers.
{"title":"Lateral carrier injection with n-type modulation-doped quantum wells in VCSELs","authors":"Chin-Han Lin, Yan Zheng, M. Gross, M. Rodwell, L. Coldren","doi":"10.1109/DRC.2011.5994522","DOIUrl":"https://doi.org/10.1109/DRC.2011.5994522","url":null,"abstract":"We have demonstrated a novel Field-Induced Charge-Separation Laser (FICSL) in a Vertical-Cavity Surface-Emitting Laser (VCSEL) embodiment. In addition to the initial optical modulation results that have been presented [1], we here for the first time present details on the novel lateral charge injection structure as well as the advanced bandgap engineering involved in the gate structure. These features together permit high-speed light modulation with a nearly constant injection current. The result is an entirely new concept for high-speed directly-modulated semiconductor lasers.","PeriodicalId":107059,"journal":{"name":"69th Device Research Conference","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2011-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115268742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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