Pub Date : 2024-11-11DOI: 10.1109/JEDS.2024.3492114
Yuvraj Maphrio Mao;Khairunnisa Amreen;Sanket Goel
Miniaturized Microbial Fuel Cells (MMFCs) are the focus of this research, aimed at enhancing microscale power generation in Single Chambered Microbial Fuel Cells (SMFCs). The study involves the development of two 3D-printed conductive devices using a Fused Deposition Modeling approach with polylactic acid (PLA). These devices feature inbuilt electrodes coated with piezoelectric materials. The research addresses key challenges, including low power output and voltage reversal, achieving power outputs of $8.72~mu $ W/cm2 for Conductive Device I and $1.05~mu $ W/cm2 for Conductive Device II. The incorporation of assistance electrodes demonstrates potential in mitigating voltage reversal and improving SMFC efficiency.
{"title":"Multiple 3D-Printed Miniaturized Microbial Fuel Cells With Embedded Electrodes Optimized by Sustainable and Synergistic Perovskites Materials","authors":"Yuvraj Maphrio Mao;Khairunnisa Amreen;Sanket Goel","doi":"10.1109/JEDS.2024.3492114","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3492114","url":null,"abstract":"Miniaturized Microbial Fuel Cells (MMFCs) are the focus of this research, aimed at enhancing microscale power generation in Single Chambered Microbial Fuel Cells (SMFCs). The study involves the development of two 3D-printed conductive devices using a Fused Deposition Modeling approach with polylactic acid (PLA). These devices feature inbuilt electrodes coated with piezoelectric materials. The research addresses key challenges, including low power output and voltage reversal, achieving power outputs of \u0000<inline-formula> <tex-math>$8.72~mu $ </tex-math></inline-formula>\u0000W/cm2 for Conductive Device I and \u0000<inline-formula> <tex-math>$1.05~mu $ </tex-math></inline-formula>\u0000W/cm2 for Conductive Device II. The incorporation of assistance electrodes demonstrates potential in mitigating voltage reversal and improving SMFC efficiency.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1021-1029"},"PeriodicalIF":2.0,"publicationDate":"2024-11-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10750036","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142672128","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
New applications like depth measurements or multispectral imaging require to develop image sensors able to sense efficiently in the Near Infrared and Short-Wave Infrared where silicon is weakly sensitive. Colloidal Quantum Dots (CQD) technology is an interesting candidate to address these new applications as it allows to develop image sensors with high quantum efficiency at excitonic peak and high-resolution images. In this paper, we present an electrical model describing the electrical behavior of a designed and manufactured CQD photodiode. We use this model to explore a different architecture collecting holes instead of electrons. This architecture allows to control the charge collection inside the CQD thin film through the electric field. This property enables to implement global shutter functionality, to bin charges from several photodiodes, or to operate two physically interleaved photodiodes arrays alternatively with different types of pixel circuitries. These operating modes extend the capabilities of CQD image sensors in terms of applications.
{"title":"Global Shutter and Charge Binning With Quantum Dots Photodiode Arrays for NIR Imaging","authors":"Loïc Baudoin;Arthur Arnaud;Sébastien Massenot;Pierre Magnan","doi":"10.1109/JEDS.2024.3489672","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3489672","url":null,"abstract":"New applications like depth measurements or multispectral imaging require to develop image sensors able to sense efficiently in the Near Infrared and Short-Wave Infrared where silicon is weakly sensitive. Colloidal Quantum Dots (CQD) technology is an interesting candidate to address these new applications as it allows to develop image sensors with high quantum efficiency at excitonic peak and high-resolution images. In this paper, we present an electrical model describing the electrical behavior of a designed and manufactured CQD photodiode. We use this model to explore a different architecture collecting holes instead of electrons. This architecture allows to control the charge collection inside the CQD thin film through the electric field. This property enables to implement global shutter functionality, to bin charges from several photodiodes, or to operate two physically interleaved photodiodes arrays alternatively with different types of pixel circuitries. These operating modes extend the capabilities of CQD image sensors in terms of applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1011-1020"},"PeriodicalIF":2.0,"publicationDate":"2024-11-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10742005","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142645507","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, a new architecture for glucose biosensors is proposed, which adopts a Chopper amplifier instead of a conventional instrumentation amplifier (INA) and differential extended gate field effect transistor (EGFET) as the input stage. The architecture effectively suppresses low-frequency noises such as flicker noise and significantly improves signal quality while reducing power consumption and layout area. The simulation results indicate that when the chopper frequency is set to 5 kHz, the chopper amplifier effectively reduces the output-referred noise at 1 Hz from 20.01 $mu$ V/ $surd$ Hz to 394 nV/ $surd$ Hz. In the experimental part, we fabricated a glucose biosensor containing a RuO2 sensing film, and analyzed the surface morphology of the sensor’s working electrode by scanning electron microscopy (SEM) and atomic force microscopy (AFM). The experimental results showed that the biosensor exhibited good linearity (0.998) and sensitivity (82.83 mV/mM) over the glucose concentration range of 3 mM to 7 mM. In addition, the modulation and demodulation capabilities of the Chopper amplifier were verified through Hspice simulations and real-world tests, and it was confirmed to be effective in reducing noise.
{"title":"The Implementation of a High-Performance Glucose Biosensor Based on Differential EGFET and Chopper Amplifier","authors":"Po-Yu Kuo;Chi-Han Liao;Jung-Chuan Chou;Chih-Hsien Lai;Yu-Hsun Nien;Po-Hui Yang;Ming-Tai Hsu;Cheng-Chun Lien;Wei-Shun Chen;Jyun-Ming Huang;Yu-Wei Chen","doi":"10.1109/JEDS.2024.3488367","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3488367","url":null,"abstract":"In this paper, a new architecture for glucose biosensors is proposed, which adopts a Chopper amplifier instead of a conventional instrumentation amplifier (INA) and differential extended gate field effect transistor (EGFET) as the input stage. The architecture effectively suppresses low-frequency noises such as flicker noise and significantly improves signal quality while reducing power consumption and layout area. The simulation results indicate that when the chopper frequency is set to 5 kHz, the chopper amplifier effectively reduces the output-referred noise at 1 Hz from 20.01 \u0000<inline-formula> <tex-math>$mu$ </tex-math></inline-formula>\u0000V/ \u0000<inline-formula> <tex-math>$surd$ </tex-math></inline-formula>\u0000Hz to 394 nV/ \u0000<inline-formula> <tex-math>$surd$ </tex-math></inline-formula>\u0000Hz. In the experimental part, we fabricated a glucose biosensor containing a RuO2 sensing film, and analyzed the surface morphology of the sensor’s working electrode by scanning electron microscopy (SEM) and atomic force microscopy (AFM). The experimental results showed that the biosensor exhibited good linearity (0.998) and sensitivity (82.83 mV/mM) over the glucose concentration range of 3 mM to 7 mM. In addition, the modulation and demodulation capabilities of the Chopper amplifier were verified through Hspice simulations and real-world tests, and it was confirmed to be effective in reducing noise.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1003-1010"},"PeriodicalIF":2.0,"publicationDate":"2024-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10738382","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142645392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-28DOI: 10.1109/JEDS.2024.3486454
Pingyu Cao;Kepeng Zhao;Harm Van Zalinge;Ping Zhang;Miao Cui;Fei Xue
This paper presents a high gain voltage amplifier based on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with monolithically integrated enhancement-mode (E-mode) and depletion-mode (D-mode) devices. The GaN amplifier consists of differential pair based on E-mode devices, active loads based on D-mode devices and a current source, and the influence of the current source on voltage gain was evaluated. The proposed amplifier demonstrates a high gain and high unity-gain frequency at both room temperature (25 °C) and high-temperature (250 °C). The gain is 37.4 dB at room temperature, slightly decreasing to 32.7 dB when the temperature rises to 250 °C. Moreover, the power consumption reported in this work is decreased to 60 mW by reducing the static current, and the chip area of this work is reduced to $2.806{times 10^{5}mu {mathrm { m^{2}}}}$ . These results indicate that the proposed amplifier is suitable for small signal sensing or driving circuits, which would promise high power density for GaN-on-Si integration circuits with high-temperature operation.
本文介绍了一种基于氮化镓/氮化镓金属绝缘体-半导体高电子迁移率晶体管（MIS-HEMT）的高增益电压放大器，该放大器具有单片集成的增强型（E 模）和耗尽型（D 模）器件。GaN 放大器由基于 E 模式器件的差分对、基于 D 模式器件的有源负载和电流源组成，并评估了电流源对电压增益的影响。所提出的放大器在室温（25 °C）和高温（250 °C）条件下均表现出较高的增益和较高的单位增益频率。室温下的增益为 37.4 dB，当温度升至 250 °C 时，增益略降至 32.7 dB。此外，通过减小静态电流，本作品中报告的功耗降低到 60 mW，芯片面积减小到 2.806{times 10^{5}mu {mathrm { m^{2}}}}$ 。这些结果表明，所提出的放大器适用于小信号传感或驱动电路，有望为高温工作的硅基氮化镓集成电路带来高功率密度。
{"title":"AlGaN/GaN High Electron Mobility Transistor Amplifier for High-Temperature Operation","authors":"Pingyu Cao;Kepeng Zhao;Harm Van Zalinge;Ping Zhang;Miao Cui;Fei Xue","doi":"10.1109/JEDS.2024.3486454","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3486454","url":null,"abstract":"This paper presents a high gain voltage amplifier based on AlGaN/GaN metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with monolithically integrated enhancement-mode (E-mode) and depletion-mode (D-mode) devices. The GaN amplifier consists of differential pair based on E-mode devices, active loads based on D-mode devices and a current source, and the influence of the current source on voltage gain was evaluated. The proposed amplifier demonstrates a high gain and high unity-gain frequency at both room temperature (25 °C) and high-temperature (250 °C). The gain is 37.4 dB at room temperature, slightly decreasing to 32.7 dB when the temperature rises to 250 °C. Moreover, the power consumption reported in this work is decreased to 60 mW by reducing the static current, and the chip area of this work is reduced to \u0000<inline-formula> <tex-math>$2.806{times 10^{5}mu {mathrm { m^{2}}}}$ </tex-math></inline-formula>\u0000. These results indicate that the proposed amplifier is suitable for small signal sensing or driving circuits, which would promise high power density for GaN-on-Si integration circuits with high-temperature operation.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"981-987"},"PeriodicalIF":2.0,"publicationDate":"2024-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10737042","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142595884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-28DOI: 10.1109/JEDS.2024.3486736
Xuejing Yang;Kyounghoon Yang
In this paper, we report on newly introduced direct extraction methods applied for determining the extrinsic parasitic capacitances and inductances in RF test structures of Fully-Depleted-Silicon-On-Insulator (FDSOI) MOSFETs with a 28 nm gate length. Our approach leverages dummy structures and employs closed-form extraction techniques for precise parasitic parameter determination. Notably, we apply the closed-form extraction strategy for the first time to quantify the parasitic inductances of RF FDSOI-MOSFETs. To verify the accuracy of our extraction results based on a direct approach without optimization, we perform error analysis by comparing the modeled S-parameters of the small signal equivalent circuit to the measured results. Good agreement between the modeled and measured results not only at the cold bias but also at the saturation-mode operation region is achieved up to 110 GHz.
{"title":"Direct Extraction Methods for RF Characterization of Extrinsic Parasitic Parameters in 28 nm FDSOI MOSFETs Up to 110 GHz","authors":"Xuejing Yang;Kyounghoon Yang","doi":"10.1109/JEDS.2024.3486736","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3486736","url":null,"abstract":"In this paper, we report on newly introduced direct extraction methods applied for determining the extrinsic parasitic capacitances and inductances in RF test structures of Fully-Depleted-Silicon-On-Insulator (FDSOI) MOSFETs with a 28 nm gate length. Our approach leverages dummy structures and employs closed-form extraction techniques for precise parasitic parameter determination. Notably, we apply the closed-form extraction strategy for the first time to quantify the parasitic inductances of RF FDSOI-MOSFETs. To verify the accuracy of our extraction results based on a direct approach without optimization, we perform error analysis by comparing the modeled S-parameters of the small signal equivalent circuit to the measured results. Good agreement between the modeled and measured results not only at the cold bias but also at the saturation-mode operation region is achieved up to 110 GHz.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"993-1002"},"PeriodicalIF":2.0,"publicationDate":"2024-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10736559","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142595833","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-24DOI: 10.1109/JEDS.2024.3485622
Fernando José da Costa;Aseel Zeinati;Renan Trevisoli;Durga Misra;Rodrigo Trevisoli Doria
The objective of this work is to present a comparison of the switching properties in Resistive Random-Access-Memory between two different switching layer devices through the capacitance measurements. The analysis was carried out in two devices with different insulating layers, one composed of H-plasma-treated ${mathrm { HfO}}_{2}$ and another with a stoichiometric HfO2. The device with a higher quantity of oxygen vacancy-related defects in the insulator (HfO2 w/trt) presents a wider spread of the capacitance with the application of a range of varying pulse widths. An increase in the capacitance from 3.904 to 3.917 pF/$mu $ m2 was observed for the same device when it was subjected to a $144~mu $ s pulse width, demonstrating a conductance quantization required for the application in in-memory computing systems. Also, the dielectric constant modulates due to the migration of oxygen atoms inside the device’s insulator.
{"title":"Experimental Comparison of HfO2/X-Based ReRAM Devices Switching Properties by the MIM Capacitance","authors":"Fernando José da Costa;Aseel Zeinati;Renan Trevisoli;Durga Misra;Rodrigo Trevisoli Doria","doi":"10.1109/JEDS.2024.3485622","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3485622","url":null,"abstract":"The objective of this work is to present a comparison of the switching properties in Resistive Random-Access-Memory between two different switching layer devices through the capacitance measurements. The analysis was carried out in two devices with different insulating layers, one composed of H-plasma-treated <inline-formula> <tex-math>${mathrm { HfO}}_{2}$ </tex-math></inline-formula> and another with a stoichiometric HfO2. The device with a higher quantity of oxygen vacancy-related defects in the insulator (HfO2 w/trt) presents a wider spread of the capacitance with the application of a range of varying pulse widths. An increase in the capacitance from 3.904 to 3.917 pF/<inline-formula> <tex-math>$mu $ </tex-math></inline-formula>m2 was observed for the same device when it was subjected to a <inline-formula> <tex-math>$144~mu $ </tex-math></inline-formula>s pulse width, demonstrating a conductance quantization required for the application in in-memory computing systems. Also, the dielectric constant modulates due to the migration of oxygen atoms inside the device’s insulator.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"1037-1043"},"PeriodicalIF":2.0,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10734138","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142992883","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (< $1~mu $ s) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE: ${mathrm { C}}_{mathrm { FE}}$ ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.
{"title":"The Effect of Ferroelectric/Dielectric Capacitance Ratio on Short-Term Retention Characteristics of MFMIS FeFET","authors":"Junghyeon Hwang;Giuk Kim;Hongrae Joh;Jinho Ahn;Sanghun Jeon","doi":"10.1109/JEDS.2024.3485869","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3485869","url":null,"abstract":"Metal-ferroelectric-metal-insulator-semiconductor (MFMIS) FeFETs have significant potential for use in non-volatile memory applications. This is primarily due to their compatibility with CMOS technology and reliable switching characteristics. Previous studies have primarily concentrated on the endurance and memory window properties, while this study focuses on the short-term (<\u0000<inline-formula> <tex-math>$1~mu $ </tex-math></inline-formula>\u0000s) retention region of MFMIS FeFETs. Specifically, we examine the impact of the capacitance ratio of the ferroelectric capacitor (CFE) and the MOS capacitor (CDE) on short-term retention. Additionally, we conducted simulations to validate the experimental observations and investigate the interaction of the depolarization field with the charge trapping and polarization of the MFMIS structure. This study emphasizes the crucial role of controlling the CDE: \u0000<inline-formula> <tex-math>${mathrm { C}}_{mathrm { FE}}$ </tex-math></inline-formula>\u0000 ratio in enhancing the short-term retention of MFMIS FeFETs. Its findings enhance our understanding of short-term retention mechanisms and provide a pathway for improving performance and functionality in non-volatile memory technology design.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"988-992"},"PeriodicalIF":2.0,"publicationDate":"2024-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10734331","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142595930","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-10-18DOI: 10.1109/JEDS.2024.3483299
Mohammad Bavir;Abdollah Abbasi;Ali Asghar Orouji;Farzan Jazaeri;Jean-Michel Sallese
In this paper an analytical non-quasi-static (NQS) model for long-channel symmetric double-gate junctionless field-effect transistors (JLFETs) operating in depletion mode is proposed for the first time. The model addresses the limitations of existing DC and AC models by incorporating time-dependent current continuity equations which are essentials to predict JLFETs behavior at high frequencies. Leveraging charge-based equations, the NQS model captures the delay between current and applied potentials arising beyond the quasi-static regime. Analytical solutions for small-signal perturbations allow the calculation of key transistor small signal parameters such as the gate transadmittance. The model’s validity is tested against TCAD simulations for various device parameters, including doping concentration and channel thickness. Good agreement between the model and TCAD simulations is observed across a wide frequency range, up to highly non-static transport conditions. This work lays the foundation for a comprehensive RF model of JLFETs for high-frequency applications.
{"title":"Non Quasi-Static Model of DG Junctionless FETs","authors":"Mohammad Bavir;Abdollah Abbasi;Ali Asghar Orouji;Farzan Jazaeri;Jean-Michel Sallese","doi":"10.1109/JEDS.2024.3483299","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3483299","url":null,"abstract":"In this paper an analytical non-quasi-static (NQS) model for long-channel symmetric double-gate junctionless field-effect transistors (JLFETs) operating in depletion mode is proposed for the first time. The model addresses the limitations of existing DC and AC models by incorporating time-dependent current continuity equations which are essentials to predict JLFETs behavior at high frequencies. Leveraging charge-based equations, the NQS model captures the delay between current and applied potentials arising beyond the quasi-static regime. Analytical solutions for small-signal perturbations allow the calculation of key transistor small signal parameters such as the gate transadmittance. The model’s validity is tested against TCAD simulations for various device parameters, including doping concentration and channel thickness. Good agreement between the model and TCAD simulations is observed across a wide frequency range, up to highly non-static transport conditions. This work lays the foundation for a comprehensive RF model of JLFETs for high-frequency applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"974-980"},"PeriodicalIF":2.0,"publicationDate":"2024-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10722036","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142587499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper demonstrated high-output-power and high-efficiency power amplifier (PA) monolithic microwave-integrated circuit (MMIC) at 300-GHz band (252–296 GHz) with the use of InPbased metal–oxide–semiconductor high-electron-mobility transistors (HEMTs) with composite-channel (CC) and double-side-doping (DD) techniques. The CC-DD structure obtained high output current and low channel resistance due to the improved carrier density and mobility. W-band load-pull measurement revealed the drastically improved output power density of CC-DD structure compared with that of singlechannel DD structure. The 2-stage cascaded, 4-way, and 16-way PA-MMICs were designed based on stacked common-gate transistors with current reuse topology. The cascaded PA-MMIC exhibited a poweradded efficiency (PAE) of 7.8%, and the 16-way PA-MMIC exhibited an output power of 16.9 dBm. These values are the highest among all the values reported for the 300-GHz band PA-MMICs. The 4-way PA-MMIC achieved a high output power of 13.6–14.6 dBm and high PAE of 4.8%–6.3% simultaneously at the entire 300-GHz band.
{"title":"High Output Power and Efficiency 300-GHz Band InP-Based MOS-HEMT Power Amplifiers With Composite-Channel and Double-Side Doping","authors":"Yusuke Kumazaki;Shiro Ozaki;Naoya Okamoto;Naoki Hara;Yasuhiro Nakasha;Masaru Sato;Toshihiro Ohki","doi":"10.1109/JEDS.2024.3483305","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3483305","url":null,"abstract":"This paper demonstrated high-output-power and high-efficiency power amplifier (PA) monolithic microwave-integrated circuit (MMIC) at 300-GHz band (252–296 GHz) with the use of InPbased metal–oxide–semiconductor high-electron-mobility transistors (HEMTs) with composite-channel (CC) and double-side-doping (DD) techniques. The CC-DD structure obtained high output current and low channel resistance due to the improved carrier density and mobility. W-band load-pull measurement revealed the drastically improved output power density of CC-DD structure compared with that of singlechannel DD structure. The 2-stage cascaded, 4-way, and 16-way PA-MMICs were designed based on stacked common-gate transistors with current reuse topology. The cascaded PA-MMIC exhibited a poweradded efficiency (PAE) of 7.8%, and the 16-way PA-MMIC exhibited an output power of 16.9 dBm. These values are the highest among all the values reported for the 300-GHz band PA-MMICs. The 4-way PA-MMIC achieved a high output power of 13.6–14.6 dBm and high PAE of 4.8%–6.3% simultaneously at the entire 300-GHz band.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"965-973"},"PeriodicalIF":2.0,"publicationDate":"2024-10-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10722855","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142540428","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Metal Oxide Thin Film Transistors (MO TFTs) have garnered considerable interest in emerging Internet of Things (IoT) fields such as wearable electronics, displays, Radio Frequency Identification (RFID), and biomedical monitoring, owing to their flexibility and transparency. However, limitations in channel materials make MO TFT-based circuits unipolar. Unipolar circuits often exhibit elevated short-circuit power consumption, which restricts the development of MO TFTs in the IoT sector. This paper introduces a Capacitively Coupled Near-Threshold Biasing (CCNB) technique that leverages the unique Capacitance-Voltage (C-V) characteristics of MO TFTs to bias devices in the near-threshold region, achieving nearly a 95% reduction in power consumption compared to traditional designs with the device coupling ratio (channel capacitance/overlap capacitance) at 40. Furthermore, considering the significance of clock signals in IoT applications, we have also developed a low-power full-swing Ring Oscillator (RO) based on our CCNB technique, resulting in a 90% reduction in power consumption and a nearly 70% reduction in PDP compared to conventional low-power designs.
金属氧化物薄膜晶体管（MO TFT）因其灵活性和透明度，在可穿戴电子设备、显示器、射频识别（RFID）和生物医学监测等新兴物联网（IoT）领域备受关注。然而，由于沟道材料的限制，基于 MO TFT 的电路都是单极电路。单极电路通常表现出较高的短路功耗，这限制了 MO TFT 在物联网领域的发展。本文介绍了一种电容耦合近阈值偏置（CCNB）技术，该技术利用 MO TFT 独特的电容-电压（C-V）特性在近阈值区对器件进行偏置，与器件耦合比（沟道电容/重叠电容）为 40 的传统设计相比，功耗降低了近 95%。此外，考虑到时钟信号在物联网应用中的重要性，我们还开发了基于 CCNB 技术的低功耗全摆环振荡器 (RO)，与传统低功耗设计相比，功耗降低了 90%，PDP 降低了近 70%。
{"title":"Capacitively Coupled Near-Threshold Biasing: Low-Power Design Based on Metal Oxide TFTs for IoT Applications","authors":"Yixin Fu;Zhixuan Wang;Shuai Yuan;Shengdong Zhang;Yudi Zhao;Junchen Dong;Kai Zhao","doi":"10.1109/JEDS.2024.3480269","DOIUrl":"https://doi.org/10.1109/JEDS.2024.3480269","url":null,"abstract":"Metal Oxide Thin Film Transistors (MO TFTs) have garnered considerable interest in emerging Internet of Things (IoT) fields such as wearable electronics, displays, Radio Frequency Identification (RFID), and biomedical monitoring, owing to their flexibility and transparency. However, limitations in channel materials make MO TFT-based circuits unipolar. Unipolar circuits often exhibit elevated short-circuit power consumption, which restricts the development of MO TFTs in the IoT sector. This paper introduces a Capacitively Coupled Near-Threshold Biasing (CCNB) technique that leverages the unique Capacitance-Voltage (C-V) characteristics of MO TFTs to bias devices in the near-threshold region, achieving nearly a 95% reduction in power consumption compared to traditional designs with the device coupling ratio (channel capacitance/overlap capacitance) at 40. Furthermore, considering the significance of clock signals in IoT applications, we have also developed a low-power full-swing Ring Oscillator (RO) based on our CCNB technique, resulting in a 90% reduction in power consumption and a nearly 70% reduction in PDP compared to conventional low-power designs.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"12 ","pages":"956-964"},"PeriodicalIF":2.0,"publicationDate":"2024-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10716537","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"142540464","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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