Pub Date : 2024-04-26DOI: 10.1109/JEDS.2024.3394167
Alberto Gatti;Filip Tavernier
This paper presents the cryogenic characterization and compact modeling of thin-oxide MOSFETs in a standard 65-nm Si-bulk CMOS technology. The influence of both short and narrow channel effects at extremely low temperature on key device parameters such as threshold voltage and ON current is highlighted, and the performance of this technology node for cryogenic analog circuit design is discussed. It is then demonstrated, for the widest range of gate geometries in literature, that the BSIM4 parameter editing approach can be successfully used to model small dimension effects at cryogenic temperature. In the absence of cryogenic foundry models, the robustness and simplicity of this modeling technique make it a preferred method to quickly build a design-oriented, fully scalable SPICE compact model. This restores complete freedom in device sizing for cryogenic analog circuit design.
{"title":"Cryogenic Small Dimension Effects and Design-Oriented Scalable Compact Modeling of a 65-nm CMOS Technology","authors":"Alberto Gatti;Filip Tavernier","doi":"10.1109/JEDS.2024.3394167","DOIUrl":"10.1109/JEDS.2024.3394167","url":null,"abstract":"This paper presents the cryogenic characterization and compact modeling of thin-oxide MOSFETs in a standard 65-nm Si-bulk CMOS technology. The influence of both short and narrow channel effects at extremely low temperature on key device parameters such as threshold voltage and ON current is highlighted, and the performance of this technology node for cryogenic analog circuit design is discussed. It is then demonstrated, for the widest range of gate geometries in literature, that the BSIM4 parameter editing approach can be successfully used to model small dimension effects at cryogenic temperature. In the absence of cryogenic foundry models, the robustness and simplicity of this modeling technique make it a preferred method to quickly build a design-oriented, fully scalable SPICE compact model. This restores complete freedom in device sizing for cryogenic analog circuit design.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10509584","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140804708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-25DOI: 10.1109/JEDS.2024.3393418
Lihua Xu;Kaifei Chen;Zhi Li;Yue Zhao;Lingfei Wang;Ling Li
Capacitorless DRAM architectures based on Back-End-of-Line (BEOL)-transistors are promising for long-retention, high-density and low-power 3D DRAM solutions due to its low leakage, operational flexibility, and monolithic integration capability. Different from classical silicon-based devices, in-depth studies on the performances of nanoscale multi-gate transistors (e.g., a-InGaZnO-FET) are still barely conducted for physical description, due to the complicated multi-gating principle, finite-size effects on transport, increased variation sources and enlarged parasitic effect. Hence, high-performance multi-nanoscale (down to $sim ~50$ nm) dual-gate a-IGZO transistors are fabricated, and a physical compact model is developed based on the surface potential for dual-gated coupling and the disordered transport with finite-size-correction. The short channel behaviors on sub-threshold swing, mobility and threshold voltage are investigated, and contact effects are validated by the transfer-line method (TLM). Regarding the specific challenge of dual-gate alignment, possible misalignment and parasitic effects on multi-device fluctuations are important of large-scale circuit design and analyzed by TCAD simulations. Besides, the bias-temperature instability (BTI) has been comprehensively investigated. In awareness of the above effects, this model bridges fabrication-based material properties and structural parameters, assisting in a threshold fluctuation-resistant operation scheme for capacitorless multi-bit memory, showing a great potential in future monolithic integration circuit design using BEOL-transistor.
基于线路后端 (BEOL) 晶体管的无电容 DRAM 架构具有低漏电、操作灵活和单片集成能力强等优点，有望成为长存储时间、高密度和低功耗的 3D DRAM 解决方案。与传统硅基器件不同，纳米级多栅极晶体管（如掺镓氮氧化物场效应晶体管）由于其复杂的多栅极原理、有限尺寸对传输的影响、变化源的增加和寄生效应的扩大等原因，目前还很少对其性能进行深入的物理描述研究。因此，我们制备了高性能多纳尺度（低至 50 纳米）双栅 a-IGZO 晶体管，并基于双栅耦合的表面势能和有限尺寸校正的无序传输建立了一个紧凑的物理模型。研究了短沟道对亚阈值摆动、迁移率和阈值电压的影响，并通过转移线法（TLM）验证了接触效应。关于双栅极对齐的具体挑战，可能的错位和寄生效应对多器件波动的影响是大规模电路设计的重要问题，并通过 TCAD 仿真进行了分析。此外，偏置温度不稳定性（BTI）也得到了全面研究。考虑到上述影响，该模型弥合了基于制造的材料特性和结构参数，有助于无电容多位存储器的抗阈值波动运行方案，在未来使用 BEOL 晶体管的单片集成电路设计中展现出巨大潜力。
{"title":"Physics-Based Compact Model of Independent Dual-Gate BEOL-Transistors for Reliable Capacitorless Memory","authors":"Lihua Xu;Kaifei Chen;Zhi Li;Yue Zhao;Lingfei Wang;Ling Li","doi":"10.1109/JEDS.2024.3393418","DOIUrl":"10.1109/JEDS.2024.3393418","url":null,"abstract":"Capacitorless DRAM architectures based on Back-End-of-Line (BEOL)-transistors are promising for long-retention, high-density and low-power 3D DRAM solutions due to its low leakage, operational flexibility, and monolithic integration capability. Different from classical silicon-based devices, in-depth studies on the performances of nanoscale multi-gate transistors (e.g., a-InGaZnO-FET) are still barely conducted for physical description, due to the complicated multi-gating principle, finite-size effects on transport, increased variation sources and enlarged parasitic effect. Hence, high-performance multi-nanoscale (down to \u0000<inline-formula> <tex-math>$sim ~50$ </tex-math></inline-formula>\u0000 nm) dual-gate a-IGZO transistors are fabricated, and a physical compact model is developed based on the surface potential for dual-gated coupling and the disordered transport with finite-size-correction. The short channel behaviors on sub-threshold swing, mobility and threshold voltage are investigated, and contact effects are validated by the transfer-line method (TLM). Regarding the specific challenge of dual-gate alignment, possible misalignment and parasitic effects on multi-device fluctuations are important of large-scale circuit design and analyzed by TCAD simulations. Besides, the bias-temperature instability (BTI) has been comprehensively investigated. In awareness of the above effects, this model bridges fabrication-based material properties and structural parameters, assisting in a threshold fluctuation-resistant operation scheme for capacitorless multi-bit memory, showing a great potential in future monolithic integration circuit design using BEOL-transistor.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10508593","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140806832","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-24DOI: 10.1109/JEDS.2024.3393019
Zheng-Lai Tang;Bing-Yang Cao
The development of microelectronic devices to the nanoscale intensifies self-heating challenges, affecting efficiency and durability. Understanding the mechanisms of heat generation at this scale is crucial, yet research extending beyond Joule heat remains limited. This paper simulates the self-heating effect of Silicon-On-Insulator Metal-Oxide-Semiconductor Field Effect Transistors (SOI-MOS) at the nanoscale and researches the characteristic and influence of different heat generation mechanisms, including the Joule heat, recombination heat and Peltier-Thomson heat. Our results provide a detailed two-dimensional distribution and intensity of various heat generation mechanisms within the silicon channel layer. It is found that Peltier-Thomson heat has the same magnitude as Joule heat at the nanoscale, and exhibits an alternating distribution pattern of hot and cold sources under the gate. But recombination heat is relatively negligible. The analysis of the influence of different heat mechanisms emphasizes the important role of Joule heat. While the offset effect limits the impact of Peltier-Thomson heat, its significance to device thermal performance should not be ignored. More importantly, this study investigates the impact of characteristic size on different heat generation mechanisms, revealing the size dependence of Peltier-Thomson heat.
{"title":"Heat Generation Mechanisms of Self-Heating Effects in SOI-MOS","authors":"Zheng-Lai Tang;Bing-Yang Cao","doi":"10.1109/JEDS.2024.3393019","DOIUrl":"10.1109/JEDS.2024.3393019","url":null,"abstract":"The development of microelectronic devices to the nanoscale intensifies self-heating challenges, affecting efficiency and durability. Understanding the mechanisms of heat generation at this scale is crucial, yet research extending beyond Joule heat remains limited. This paper simulates the self-heating effect of Silicon-On-Insulator Metal-Oxide-Semiconductor Field Effect Transistors (SOI-MOS) at the nanoscale and researches the characteristic and influence of different heat generation mechanisms, including the Joule heat, recombination heat and Peltier-Thomson heat. Our results provide a detailed two-dimensional distribution and intensity of various heat generation mechanisms within the silicon channel layer. It is found that Peltier-Thomson heat has the same magnitude as Joule heat at the nanoscale, and exhibits an alternating distribution pattern of hot and cold sources under the gate. But recombination heat is relatively negligible. The analysis of the influence of different heat mechanisms emphasizes the important role of Joule heat. While the offset effect limits the impact of Peltier-Thomson heat, its significance to device thermal performance should not be ignored. More importantly, this study investigates the impact of characteristic size on different heat generation mechanisms, revealing the size dependence of Peltier-Thomson heat.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10508189","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140804707","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-22DOI: 10.1109/JEDS.2024.3392174
Yatexu Patel;Pouya Valizadeh
The low frequency drain noise-current characteristics of metallic-face InAlN/AlN/GaN heterostructure field effect transistors (HFETs) having fin structures only under the gate, while maintaining a planar structure in the access regions, are compared to those of the HFETs having fin structures stretched from source to drain. Evidence indicates that both device types follow the trends of carrier number fluctuation (CNF) with correlated mobility fluctuation (CMF) model of 1/f noise. Accordingly, the noise of the gated channel has been identified as the dominant noise source for both device types. Devices from the former category exhibit improved 1/f noise performance with lower drain noise-current spectral density. This observation could be due to presence of a higher two-dimensional electron gas (2DEG) concentration under the gated-channel overshadowing the carrier number and mobility fluctuations.
{"title":"A Comparative Study on the Effects of Planarity of Access Region on the Low-Frequency Noise Performance of InAlN/GaN HFETs","authors":"Yatexu Patel;Pouya Valizadeh","doi":"10.1109/JEDS.2024.3392174","DOIUrl":"10.1109/JEDS.2024.3392174","url":null,"abstract":"The low frequency drain noise-current characteristics of metallic-face InAlN/AlN/GaN heterostructure field effect transistors (HFETs) having fin structures only under the gate, while maintaining a planar structure in the access regions, are compared to those of the HFETs having fin structures stretched from source to drain. Evidence indicates that both device types follow the trends of carrier number fluctuation (CNF) with correlated mobility fluctuation (CMF) model of 1/f noise. Accordingly, the noise of the gated channel has been identified as the dominant noise source for both device types. Devices from the former category exhibit improved 1/f noise performance with lower drain noise-current spectral density. This observation could be due to presence of a higher two-dimensional electron gas (2DEG) concentration under the gated-channel overshadowing the carrier number and mobility fluctuations.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10506227","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140804762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Blue Laser Diode Annealed Top-Gate Low Temperature Poly-Si TFTs With Low Resistance of Source/Drain From Deposited n + Layer","authors":"Hongyuan Xu, Guangmiao Wan, Xu Wang, Xiaoliang Zhou, Jing Liu, Jinming Li, Lei Lu, Shengdong Zhang","doi":"10.1109/jeds.2024.3392183","DOIUrl":"https://doi.org/10.1109/jeds.2024.3392183","url":null,"abstract":"","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140804860","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-16DOI: 10.1109/JEDS.2024.3388727
Dongsheng Hong;Bing Zhang;Dongli Zhang;Mingxiang Wang;Rongxin Wang
Degradation phenomena featured with positive shift of the on-state transfer curve are reported for the amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under negative bias illumination stress (NBIS). Such a positive shift is absent when the gate bias or the illumination is independently applied. With the assistance of TCAD simulation, the positive shift of the transfer curve is attributed to the generation of acceptor-like trap states, which is proposed to be due to oxygen interstitials produced as a consequence of electron generation by the illumination, acceleration under the effect of negative gate bias, and breaking weakly bonded oxygen. The proposed degradation mechanism is consistent with the low frequency noise characteristics and the degradation behavior under bipolar gate bias stress of the TFTs after NBIS. The whole degradation phenomena for the a-IGZO TFT under the NBIS are then consistently explained.
{"title":"Increased Threshold Voltage of Amorphous InGaZnO Thin-Film Transistors After Negative Bias Illumination Stress","authors":"Dongsheng Hong;Bing Zhang;Dongli Zhang;Mingxiang Wang;Rongxin Wang","doi":"10.1109/JEDS.2024.3388727","DOIUrl":"10.1109/JEDS.2024.3388727","url":null,"abstract":"Degradation phenomena featured with positive shift of the on-state transfer curve are reported for the amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) under negative bias illumination stress (NBIS). Such a positive shift is absent when the gate bias or the illumination is independently applied. With the assistance of TCAD simulation, the positive shift of the transfer curve is attributed to the generation of acceptor-like trap states, which is proposed to be due to oxygen interstitials produced as a consequence of electron generation by the illumination, acceleration under the effect of negative gate bias, and breaking weakly bonded oxygen. The proposed degradation mechanism is consistent with the low frequency noise characteristics and the degradation behavior under bipolar gate bias stress of the TFTs after NBIS. The whole degradation phenomena for the a-IGZO TFT under the NBIS are then consistently explained.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10499976","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140612866","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-15DOI: 10.1109/JEDS.2024.3388840
Ying Sun;Yuchen Gu;Jing Wan;Xiao Yu;Bing Chen;Dawei Gao;Ran Cheng;Genquan Han
In this work, an accurate temperature-dependent drain current $I_{mathrm { D}}$ fluctuation model valid from 10 to 300 K was proposed for 18 nm ultra-thin body and buried oxide (UTBB) n-channel field effect transistors (n-FETs). The temperature dependence of $I_{mathrm { D}}$ fluctuation was characterized and investigated from 300 K down to 10 K. In moderate inversion mode, $I_{mathrm { D}}$ fluctuation is more severe at sub-100 K while in the strong inversion mode, it still can be overshadowed by the charge screening effect. Cryogenic virtual source (CVS) device model was used to extract and analyze the carrier density and mobility which are used in the current fluctuation model. The current fluctuation model was experimentally verified under different inversion conditions, showing it can be used to analyze and optimize the flicker noise in the low temperature (LT) circuit applications.
在这项工作中，针对 18 nm 超薄体和埋藏氧化物 (UTBB) n 沟道场效应晶体管 (n-FET) 提出了一个精确的随温度变化的漏极电流 $I_{mathrm { D}}$ 波动模型，该模型在 10 至 300 K 范围内有效。在中度反转模式下，$I_{mathrm { D}}$ 波动在低于 100 K 时更为剧烈，而在强反转模式下，它仍然可以被电荷屏蔽效应所掩盖。低温虚拟源（CVS）器件模型用于提取和分析电流波动模型中使用的载流子密度和迁移率。在不同的反转条件下对电流波动模型进行了实验验证，结果表明该模型可用于分析和优化低温（LT）电路应用中的闪烁噪声。
{"title":"An Experimentally Verified Temperature Dependent Drain Current Fluctuation Model for Low Temperature Applications","authors":"Ying Sun;Yuchen Gu;Jing Wan;Xiao Yu;Bing Chen;Dawei Gao;Ran Cheng;Genquan Han","doi":"10.1109/JEDS.2024.3388840","DOIUrl":"10.1109/JEDS.2024.3388840","url":null,"abstract":"In this work, an accurate temperature-dependent drain current \u0000<inline-formula> <tex-math>$I_{mathrm { D}}$ </tex-math></inline-formula>\u0000 fluctuation model valid from 10 to 300 K was proposed for 18 nm ultra-thin body and buried oxide (UTBB) n-channel field effect transistors (n-FETs). The temperature dependence of \u0000<inline-formula> <tex-math>$I_{mathrm { D}}$ </tex-math></inline-formula>\u0000 fluctuation was characterized and investigated from 300 K down to 10 K. In moderate inversion mode, \u0000<inline-formula> <tex-math>$I_{mathrm { D}}$ </tex-math></inline-formula>\u0000 fluctuation is more severe at sub-100 K while in the strong inversion mode, it still can be overshadowed by the charge screening effect. Cryogenic virtual source (CVS) device model was used to extract and analyze the carrier density and mobility which are used in the current fluctuation model. The current fluctuation model was experimentally verified under different inversion conditions, showing it can be used to analyze and optimize the flicker noise in the low temperature (LT) circuit applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10499957","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140582868","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Non-enzymatic dopamine (DA) sensors are important in diagnosing and treating human diseases. However, non-enzymatic sensors frequently encounter interference from other substances, posing a challenge of poor selectivity for such sensors. Herein, we prepared tungsten trioxide nanoparticles (WO3 NPs) via a simple hydrothermal method and immobilized them onto a cuprous oxide (Cu2O) film. The results demonstrate that WO3 NPs offer improved selectivity, thus avoiding interference from other substances. The DA sensor based on the Cu2O film modified with WO3 NPs exhibits excellent DA detection performance, with a wide linear range of $1~mu text{M}$ to 10 mM, a low limit of detection of $0.21~mu text{M}$ , and good selectivity against common interfering substances. This non-enzymatic DA sensor features a simple structure, easy fabrication, small size, and suitability for mass production.
非酶多巴胺（DA）传感器在诊断和治疗人类疾病方面非常重要。然而，非酶切传感器经常会受到其他物质的干扰，这给此类传感器带来了选择性差的挑战。在此，我们通过简单的水热法制备了三氧化钨纳米粒子（WO3 NPs），并将其固定在氧化亚铜（Cu2O）薄膜上。结果表明，WO3 NPs 具有更好的选择性，从而避免了其他物质的干扰。基于 WO3 NPs 修饰的 Cu2O 膜的 DA 传感器具有优异的 DA 检测性能，线性范围宽至 1~μmu text{M}$ 至 10 mM，检出限低至 0.21~μmu text{M}$ ，并且对常见干扰物质具有良好的选择性。这种非酶促性 DA 传感器结构简单、易于制造、体积小，适合大规模生产。
{"title":"Tungsten Trioxide Nanoparticles Modified Cuprous Oxide Film Non-Enzymatic Dopamine Sensor","authors":"Jung-Chuan Chou;Wei-Shun Chen;Po-Hui Yang;Po-Yu Kuo;Chih-Hsien Lai;Yu-Hsun Nien","doi":"10.1109/JEDS.2024.3387324","DOIUrl":"10.1109/JEDS.2024.3387324","url":null,"abstract":"Non-enzymatic dopamine (DA) sensors are important in diagnosing and treating human diseases. However, non-enzymatic sensors frequently encounter interference from other substances, posing a challenge of poor selectivity for such sensors. Herein, we prepared tungsten trioxide nanoparticles (WO3 NPs) via a simple hydrothermal method and immobilized them onto a cuprous oxide (Cu2O) film. The results demonstrate that WO3 NPs offer improved selectivity, thus avoiding interference from other substances. The DA sensor based on the Cu2O film modified with WO3 NPs exhibits excellent DA detection performance, with a wide linear range of \u0000<inline-formula> <tex-math>$1~mu text{M}$ </tex-math></inline-formula>\u0000 to 10 mM, a low limit of detection of \u0000<inline-formula> <tex-math>$0.21~mu text{M}$ </tex-math></inline-formula>\u0000, and good selectivity against common interfering substances. This non-enzymatic DA sensor features a simple structure, easy fabrication, small size, and suitability for mass production.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10496458","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140582680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-10DOI: 10.1109/JEDS.2024.3386857
Jialun Li;Renqiang Zhu;Ka Ming Wong;Kei May Lau
This letter reports a high-performance fully-vertical GaN-on-SiC p-i-n diode enabled by a conductive n-AlGaN buffer. The buffer conductivity was optimized by tuning the Al composition. The diode presents an ultra-low specific ON-resistance of 0.25 $text{m}Omega cdot $ cm2, a high current swing of 1011, and a high breakdown voltage of 850 V with a 5- $mu text{m}$ -thick drift layer, leading to a Baliga’s figure of merit (BFOM) of 2.89 GW/cm2. The diode performance at elevated temperatures and the OFF-state leakage mechanism are analyzed. The demonstrated fully-vertical GaN-on-SiC p-i-n diode with a conductive buffer reveals a simple way towards realizing high-performance fully-vertical GaN-on-SiC devices for high power applications.
{"title":"Fully Vertical GaN-on-SiC p-i-n Diodes With BFOM of 2.89 GW/cm2","authors":"Jialun Li;Renqiang Zhu;Ka Ming Wong;Kei May Lau","doi":"10.1109/JEDS.2024.3386857","DOIUrl":"10.1109/JEDS.2024.3386857","url":null,"abstract":"This letter reports a high-performance fully-vertical GaN-on-SiC p-i-n diode enabled by a conductive n-AlGaN buffer. The buffer conductivity was optimized by tuning the Al composition. The diode presents an ultra-low specific ON-resistance of 0.25 \u0000<inline-formula> <tex-math>$text{m}Omega cdot $ </tex-math></inline-formula>\u0000cm2, a high current swing of 1011, and a high breakdown voltage of 850 V with a 5-\u0000<inline-formula> <tex-math>$mu text{m}$ </tex-math></inline-formula>\u0000-thick drift layer, leading to a Baliga’s figure of merit (BFOM) of 2.89 GW/cm2. The diode performance at elevated temperatures and the OFF-state leakage mechanism are analyzed. The demonstrated fully-vertical GaN-on-SiC p-i-n diode with a conductive buffer reveals a simple way towards realizing high-performance fully-vertical GaN-on-SiC devices for high power applications.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10496446","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140582918","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Based on the microscopic hyperspectral imaging technique, an optical batch inspection method has been proposed by the authors to efficiently and precisely obtain the absolute emission spectra of red (R), green (G), and blue (B) Mini-/Micro-light-emitting diodes (Mini-/Micro-LEDs). The RGB Mini-LEDs (with a chip area of $200,,mu text{m},,times 100,,mu text{m}$ ) based array is selected for carrying out this experiment. Via the proposed method, the photometric and colorimetric properties of each Mini-LED pixel could be derived in detail. In this proposed method, an optimized Canny-based algorithm has been used for quickly detecting the effectively emitting area in the collected hyperspectral images, thus saving more time for workers. While compared with the traditional integrating-sphere-based method, the measured data between the proposed method and traditional method are in fairly good consistence, with their maximum deviation of < 3.2%. The external quantum efficiency (EQE) and chromaticity coordinates of each Mini-LED are acquired at the temperature ranging from 300 K to 340 K by the proposed method. Three RGB Micro-LEDs (with a chip area of $10,,mu text{m},,times 10,,mu text{m}$ ) based arrays are also selected for the optical batch detection, and the pseudocolor maps of normalized electroluminescence (EL) intensity for RGB Micro-LEDs are analyzed. Finally, the optical crosstalk of RGB Mini-LEDs is quantitatively defined and analyzed. The optical crosstalk effects are more prominent for red Mini-LEDs than the other two. Results indicate that the proposed method has shown potential applications in the field of Mini-/Micro-LEDs’ batch inspection.
基于显微高光谱成像技术，作者提出了一种光学批量检测方法，以高效、精确地获取红色（R）、绿色（G）和蓝色（B）迷你/微型发光二极管（Mini/Micro-LEDs）的绝对发射光谱。本实验选择了基于 RGB Mini-LED 的阵列（芯片面积为 200 英寸/100 次）。通过所提出的方法，可以详细得出每个 Mini-LED 像素的光度和色度特性。在该方法中，使用了基于 Canny 的优化算法，可在采集的高光谱图像中快速检测有效发光区域，从而为工作人员节省更多时间。与传统的基于积分球的方法相比，拟议方法和传统方法的测量数据相当一致，其最大偏差小于 3.2%。在 300 K 至 340 K 的温度范围内，利用拟议方法获得了每种 Mini-LED 的外部量子效率（EQE）和色度坐标。同时还选择了三个基于RGB Micro-LED（芯片面积为10text{m}/times 10text{m}$）的阵列进行光批量检测，并分析了RGB Micro-LED归一化电致发光（EL）强度的伪彩色图。最后，对 RGB Mini-LED 的光学串扰进行了定量定义和分析。与其他两种微型 LED 相比，红色微型 LED 的光学串扰效应更为突出。结果表明，所提出的方法在 Mini-Micro LED 的批量检测领域具有潜在的应用前景。
{"title":"Proposing an Accurate and Fast Optical Batch Inspection Method of Mini-/Micro-LEDs","authors":"Zhen Li;Mei-Cong Huang;Xiong-Jun Cao;Da Xu;Yi Lin;Zhong Chen;Zi-Quan Guo","doi":"10.1109/JEDS.2024.3386528","DOIUrl":"10.1109/JEDS.2024.3386528","url":null,"abstract":"Based on the microscopic hyperspectral imaging technique, an optical batch inspection method has been proposed by the authors to efficiently and precisely obtain the absolute emission spectra of red (R), green (G), and blue (B) Mini-/Micro-light-emitting diodes (Mini-/Micro-LEDs). The RGB Mini-LEDs (with a chip area of \u0000<inline-formula> <tex-math>$200,,mu text{m},,times 100,,mu text{m}$ </tex-math></inline-formula>\u0000) based array is selected for carrying out this experiment. Via the proposed method, the photometric and colorimetric properties of each Mini-LED pixel could be derived in detail. In this proposed method, an optimized Canny-based algorithm has been used for quickly detecting the effectively emitting area in the collected hyperspectral images, thus saving more time for workers. While compared with the traditional integrating-sphere-based method, the measured data between the proposed method and traditional method are in fairly good consistence, with their maximum deviation of < 3.2%. The external quantum efficiency (EQE) and chromaticity coordinates of each Mini-LED are acquired at the temperature ranging from 300 K to 340 K by the proposed method. Three RGB Micro-LEDs (with a chip area of \u0000<inline-formula> <tex-math>$10,,mu text{m},,times 10,,mu text{m}$ </tex-math></inline-formula>\u0000) based arrays are also selected for the optical batch detection, and the pseudocolor maps of normalized electroluminescence (EL) intensity for RGB Micro-LEDs are analyzed. Finally, the optical crosstalk of RGB Mini-LEDs is quantitatively defined and analyzed. The optical crosstalk effects are more prominent for red Mini-LEDs than the other two. Results indicate that the proposed method has shown potential applications in the field of Mini-/Micro-LEDs’ batch inspection.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":null,"pages":null},"PeriodicalIF":2.3,"publicationDate":"2024-04-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10495305","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140582739","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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