Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189878
J. Shanley, C. T. Flanagan, M. Reine, T. Casselman
The thermal diffusion current mechanisms present in an 8-14 micrometer n+-p-p+(Hg,Cd)Te photodiode are analyzed. The n+region diffusion current is determined by first calculating the Auger 1 lifetime in degenerate n-type (Hg,Cd)Te. The Auger 1 lifetime is found to vary as 1/nαo, where 0.7 ≤ α ≤ 1.0 and no is the equilibrium carrier density, for degenerate n-type (Hg,Cd)Te. The p-side diffusion current is calculated by considering the radiative and Auger 7 recombination mechanisms. A comparison of the n+- and p- side thermal diffusion current components reveals that the p-side contribution is dominant.
{"title":"Thermal diffusion current mechanisms in n+-p-p+Hg1-xCdxTe photodiodes","authors":"J. Shanley, C. T. Flanagan, M. Reine, T. Casselman","doi":"10.1109/IEDM.1980.189878","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189878","url":null,"abstract":"The thermal diffusion current mechanisms present in an 8-14 micrometer n<sup>+</sup>-p-p<sup>+</sup>(Hg,Cd)Te photodiode are analyzed. The n<sup>+</sup>region diffusion current is determined by first calculating the Auger 1 lifetime in degenerate n-type (Hg,Cd)Te. The Auger 1 lifetime is found to vary as 1/n<sup>α</sup><inf>o</inf>, where 0.7 ≤ α ≤ 1.0 and no is the equilibrium carrier density, for degenerate n-type (Hg,Cd)Te. The p-side diffusion current is calculated by considering the radiative and Auger 7 recombination mechanisms. A comparison of the n<sup>+</sup>- and p- side thermal diffusion current components reveals that the p-side contribution is dominant.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114462574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189884
J. Campbell, A. Dentai, C. Burrus, J. F. Ferguson
The fabrication and device characteristics of back-illuminated InP/InGaAs n-p-n heterojunction phototransistors will be described. These devices consist of a "wide-bandgap" InP emitter with smaller bandgap InGaAs base and collector layers. Uniform spectral response is observed in the wavelength range from 0.95 µm to 1.6 µm. The DC optical gain increases from approximately 40 at an input power of 1 nW to over 1000 for an input power level of 5 µW. The small-signal gain is characteristically 2 to 3 times higher than the EC gain. The cut-off frequency fTis an increasing function of the incident light level; for 1 µW of incident power fT≃ 300 MHz. The possible applications of these phototransistors in fiber optic systems will be discussed.
{"title":"InP/InGaAs heterojunction bipolar phototransistors with improved sensitivity","authors":"J. Campbell, A. Dentai, C. Burrus, J. F. Ferguson","doi":"10.1109/IEDM.1980.189884","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189884","url":null,"abstract":"The fabrication and device characteristics of back-illuminated InP/InGaAs n-p-n heterojunction phototransistors will be described. These devices consist of a \"wide-bandgap\" InP emitter with smaller bandgap InGaAs base and collector layers. Uniform spectral response is observed in the wavelength range from 0.95 µm to 1.6 µm. The DC optical gain increases from approximately 40 at an input power of 1 nW to over 1000 for an input power level of 5 µW. The small-signal gain is characteristically 2 to 3 times higher than the EC gain. The cut-off frequency fTis an increasing function of the incident light level; for 1 µW of incident power fT≃ 300 MHz. The possible applications of these phototransistors in fiber optic systems will be discussed.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"157 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115288552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189875
K. Riley
High performance second generation infrared imaging systems require high density focal plane arrays which utilize intrinsic HgCdTe photodiodes for photon detection and Si CCD signal processors in a hybrid configuration. Limitations on system performance are established by both input circuit as well as detector requirements. In the paper performance of LWIR photodiodes in the 8-12 µm spectral region will be discussed. LWIR HgCdTe photodiodes have been fabricated by two basic techniques: ion implantation and liquid phase epitaxial heterojunctions. In the 8-12 µm region dark current components include diffusion, generation-recombination, tunneling and surface leakage currents. Each of these components may be minimized and therefore performance maximized by proper choice of material parameters and device design. In this paper a tradeoff analysis including thin base lateral diffusion (TBLD) as well as heterojunction (HJ) design concepts utilized to minimize dark current sources will be presented. A review of recent and current work on HgCdTe ion implantation and heterojunction technology including material growth, surface passivation and device fabrication will be presented and experimental results compared with predicted device performance.
{"title":"LWIR HgCdTe photovoltaic detectors for hybrid focal plane arrays","authors":"K. Riley","doi":"10.1109/IEDM.1980.189875","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189875","url":null,"abstract":"High performance second generation infrared imaging systems require high density focal plane arrays which utilize intrinsic HgCdTe photodiodes for photon detection and Si CCD signal processors in a hybrid configuration. Limitations on system performance are established by both input circuit as well as detector requirements. In the paper performance of LWIR photodiodes in the 8-12 µm spectral region will be discussed. LWIR HgCdTe photodiodes have been fabricated by two basic techniques: ion implantation and liquid phase epitaxial heterojunctions. In the 8-12 µm region dark current components include diffusion, generation-recombination, tunneling and surface leakage currents. Each of these components may be minimized and therefore performance maximized by proper choice of material parameters and device design. In this paper a tradeoff analysis including thin base lateral diffusion (TBLD) as well as heterojunction (HJ) design concepts utilized to minimize dark current sources will be presented. A review of recent and current work on HgCdTe ion implantation and heterojunction technology including material growth, surface passivation and device fabrication will be presented and experimental results compared with predicted device performance.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116166888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189924
V. Zieren
This paper describes a new Silicon Micro-Transducer (SMT) which is capable of measuring the magnitude and direction of a magnetic-field vector. This vector sensor --made by standard bipolar technology-is a four-collector npn-transistor giving output signals which are a linear function of the two components of an in-plane magnetic field. A centrally injected current is divided into four equal parts. The current differences of the two pairs of opposite collectors, affected by the two in-plane field components, are the output signals. Consequently, the amplitude and direction of the applied field can be derived from these independent signals. The vector sensor was developed from a one-dimensional sensor having two collectors only. As the basic operating principles are the same, most of the one-dimensional characteristics also apply to the vector sensor. Non-linearity: ≤ 0.3% for |B| ≤ 1 T. Typical sensitivity per collector pair: δIc/(Ic.B) = 3 × 10-2T-1at Ucb= 5 V.
{"title":"A new silicon micro-transducer for the measurement of the magnitude and direction of a magnetic-field vector","authors":"V. Zieren","doi":"10.1109/IEDM.1980.189924","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189924","url":null,"abstract":"This paper describes a new Silicon Micro-Transducer (SMT) which is capable of measuring the magnitude and direction of a magnetic-field vector. This vector sensor --made by standard bipolar technology-is a four-collector npn-transistor giving output signals which are a linear function of the two components of an in-plane magnetic field. A centrally injected current is divided into four equal parts. The current differences of the two pairs of opposite collectors, affected by the two in-plane field components, are the output signals. Consequently, the amplitude and direction of the applied field can be derived from these independent signals. The vector sensor was developed from a one-dimensional sensor having two collectors only. As the basic operating principles are the same, most of the one-dimensional characteristics also apply to the vector sensor. Non-linearity: ≤ 0.3% for |B| ≤ 1 T. Typical sensitivity per collector pair: δIc/(Ic.B) = 3 × 10-2T-1at Ucb= 5 V.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116303379","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189959
S.T. Liu, O. Tufte, J.S.T. Huang, A. van der Ziel
The relevant properties of the weakly inverted MOSFETS are examined for high impedance sensor applications. The characteristics of these devices are exponential and their transconductance approaches that of bipolar transistors through a factor n which is a useful characteristic of these devices. The high frequency noise spectrum in these devices is found to be white and inversely proportional to the drain current. The high frequency noise spectrum is related to n and is identified to be thermal noise. The 1/f noise corner frequencies in these devices are found to be lower than in the strongly inverted region. These properties make the weakly inverted MOSFETS useful as amplifiers in low power, low frequency and high impedance sensor applications.
{"title":"Weakly inverted MOSFETs and their applications","authors":"S.T. Liu, O. Tufte, J.S.T. Huang, A. van der Ziel","doi":"10.1109/IEDM.1980.189959","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189959","url":null,"abstract":"The relevant properties of the weakly inverted MOSFETS are examined for high impedance sensor applications. The characteristics of these devices are exponential and their transconductance approaches that of bipolar transistors through a factor n which is a useful characteristic of these devices. The high frequency noise spectrum in these devices is found to be white and inversely proportional to the drain current. The high frequency noise spectrum is related to n and is identified to be thermal noise. The 1/f noise corner frequencies in these devices are found to be lower than in the strongly inverted region. These properties make the weakly inverted MOSFETS useful as amplifiers in low power, low frequency and high impedance sensor applications.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122028389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189743
W. Fichtner, E. Fuls, R. L. Johnston, T. Sheng, R. Watts
We report on measurements and computer simulations for enhancement and depletion MOSFETs with submicron channel lengths as small as 0.2 µm. The behavior of the devices is analyzed using both advanced techniques such as transmission electron microscopy for profile measurements and numerical models to simulate processing conditions and device behavior in two dimensions.
{"title":"Experimental and theoretical characterization of submicron MOSFETs","authors":"W. Fichtner, E. Fuls, R. L. Johnston, T. Sheng, R. Watts","doi":"10.1109/IEDM.1980.189743","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189743","url":null,"abstract":"We report on measurements and computer simulations for enhancement and depletion MOSFETs with submicron channel lengths as small as 0.2 µm. The behavior of the devices is analyzed using both advanced techniques such as transmission electron microscopy for profile measurements and numerical models to simulate processing conditions and device behavior in two dimensions.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125901750","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189861
F. Schuermeyer, H.P. Singh, R. Scherer, D. Mays
GaAs IGFETs contain large interface state densities at midgap which, in the past have hindered the application of these devices in digital ICs. We have developed circuit techniques to charge these interface states such that the device operates in enhancement mode. These interface charges appear frozen at high frequencies. Ring oscillators and divide by two circuits were successfully fabricated and encouraging performance characteristics were observed. This presents the first reported demonstration of divide by two circuits using GaAs IGFET technology.
{"title":"GaAs IGFET: A new device for high speed digital ICs","authors":"F. Schuermeyer, H.P. Singh, R. Scherer, D. Mays","doi":"10.1109/IEDM.1980.189861","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189861","url":null,"abstract":"GaAs IGFETs contain large interface state densities at midgap which, in the past have hindered the application of these devices in digital ICs. We have developed circuit techniques to charge these interface states such that the device operates in enhancement mode. These interface charges appear frozen at high frequencies. Ring oscillators and divide by two circuits were successfully fabricated and encouraging performance characteristics were observed. This presents the first reported demonstration of divide by two circuits using GaAs IGFET technology.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"386 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126735334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189844
S. Lui, R. Meyer
A new monolithic process is described which allows simultaneous fabrication of high-speed (fT=400 MHz) JFETs, high-frequency (fT=4 GHz) bi-polar transistors plus I2L logic (td=14 ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bi-polar transistor with implanted base and emitter.
{"title":"High frequency bipolar - JFET - I2L process","authors":"S. Lui, R. Meyer","doi":"10.1109/IEDM.1980.189844","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189844","url":null,"abstract":"A new monolithic process is described which allows simultaneous fabrication of high-speed (f<inf>T</inf>=400 MHz) JFETs, high-frequency (f<inf>T</inf>=4 GHz) bi-polar transistors plus I<sup>2</sup>L logic (t<inf>d</inf>=14 ns). The process incorporates an ion-implanted JFET structure with independently contacted gates and a bi-polar transistor with implanted base and emitter.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126858237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189846
S. Kameyama, K. Kanzaki, M. Taguchi, Y. Sasaki, G. Sasaki
The gate geometry dependence of the minimum pro.- pagation delay time (tpdm) was investigated for the self-aligned I2L. Switching characteristics were measured by using I2L test patterns with different base contact geometries and collector widths (Wc); tpdm=0.9 nS for a double base contact and Wc= 4µm I2L gate and ftoggle-max= 150 MHz for a divide-by two circuit with Wc= 7 µm I2L gates. Experimental results suggest that the resistance of the intrinsic base area for the n-p-n transistor has strong influence on tpdm. An analysis based on a charge control model which includes this base resistance effect was carried out and the experimental results were explained very well.
{"title":"Propagation delay time dependence on gate geometry for the self-aligned I2L","authors":"S. Kameyama, K. Kanzaki, M. Taguchi, Y. Sasaki, G. Sasaki","doi":"10.1109/IEDM.1980.189846","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189846","url":null,"abstract":"The gate geometry dependence of the minimum pro.- pagation delay time (t<inf>pdm</inf>) was investigated for the self-aligned I<sup>2</sup>L. Switching characteristics were measured by using I<sup>2</sup>L test patterns with different base contact geometries and collector widths (W<inf>c</inf>); t<inf>pdm</inf>=0.9 nS for a double base contact and W<inf>c</inf>= 4µm I<sup>2</sup>L gate and f<inf>toggle-max</inf>= 150 MHz for a divide-by two circuit with W<inf>c</inf>= 7 µm I<sup>2</sup>L gates. Experimental results suggest that the resistance of the intrinsic base area for the n-p-n transistor has strong influence on t<inf>pdm</inf>. An analysis based on a charge control model which includes this base resistance effect was carried out and the experimental results were explained very well.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125156545","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/IEDM.1980.189904
Y. Hsieh, R. Wood, P.P. Wang
A functional Electrically Alterable Programmable Logic Array (EAPLA) has been developed to serve as fast turn-around-time engineering hardware for custom structured macro design in VLSI. A novel electrically alterable, floating gate memory device has been developed with double polysilicon technology. It was used in the PLA array such that the personalization patterns of the PLA can be electrically altered in the users' laboratory after packaging. The non-volatile memory device employs channel hot electron injection to write and junction avalanche breakdown hot hole injection or Fowler-Nordheim electron tunneling across the oxides to erase. Unique features of the cell structures and implementation to the EAPLA will be discussed.
{"title":"Electrically alterable programmable logic array (EAPLA)","authors":"Y. Hsieh, R. Wood, P.P. Wang","doi":"10.1109/IEDM.1980.189904","DOIUrl":"https://doi.org/10.1109/IEDM.1980.189904","url":null,"abstract":"A functional Electrically Alterable Programmable Logic Array (EAPLA) has been developed to serve as fast turn-around-time engineering hardware for custom structured macro design in VLSI. A novel electrically alterable, floating gate memory device has been developed with double polysilicon technology. It was used in the PLA array such that the personalization patterns of the PLA can be electrically altered in the users' laboratory after packaging. The non-volatile memory device employs channel hot electron injection to write and junction avalanche breakdown hot hole injection or Fowler-Nordheim electron tunneling across the oxides to erase. Unique features of the cell structures and implementation to the EAPLA will be discussed.","PeriodicalId":180541,"journal":{"name":"1980 International Electron Devices Meeting","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122084368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：