Pub Date : 2026-01-21DOI: 10.1016/j.mssp.2026.110452
Jian Qiao , Jiheng Wang , Zhenduo Wu , Junjie Li , Jingwei Yang , Xinhan Peng , Ruhai Guo
During the mass transfer of Micro-LED chips, issues such as chip misalignment and thermal stress arise, reducing bonding yield and hindering the widespread adoption of Micro-LED technology. This paper focuses on laser in-situ repair technology for defective chips. A three-dimensional transient thermo-mechanical coupled finite element model was established to investigate influence of bonding layer dimensions and chip misalignments on the stress and strain in the bonding layer. Laser repair bonding experiments were conducted to validate the simulation results and optimize the bonding parameters. The results showed that the numerical analysis exhibits an error of less than 2.77 %, offering guidance for optimizing bonding process parameters. Moreover, with a laser power of 0.049–0.058 W and a bonding time of 2–4 s, the bonding temperature can be controlled within 490 K–550 K, enabling stable, damage-free, and effective chip bonding. For a bonding layer specification of 15 μm × 10 μm × 2 μm, the stress and strain levels are relatively low, with equivalent residual stress and residual plastic strain reduced by at least 3.04 % and 50.96 %, respectively. Bonding failure occurs when the chip rotational misalignment θ exceeds 10°, the X-axis offset Δx exceeds 1 μm, the Y-axis offset Δy exceeds 2 μm, or the tilt angles α/β exceed 1°, primarily due to altered stress and strain states and a reduced bonding area. Therefore, the study of influencing factors in the laser repair bonding technology of defective Micro-LED chips provides significant guidance for the commercial application of panel-level Micro-LED technology.
{"title":"Research on influencing factors of laser repair bonding for panel-level Micro-LED chips","authors":"Jian Qiao , Jiheng Wang , Zhenduo Wu , Junjie Li , Jingwei Yang , Xinhan Peng , Ruhai Guo","doi":"10.1016/j.mssp.2026.110452","DOIUrl":"10.1016/j.mssp.2026.110452","url":null,"abstract":"<div><div>During the mass transfer of Micro-LED chips, issues such as chip misalignment and thermal stress arise, reducing bonding yield and hindering the widespread adoption of Micro-LED technology. This paper focuses on laser in-situ repair technology for defective chips. A three-dimensional transient thermo-mechanical coupled finite element model was established to investigate influence of bonding layer dimensions and chip misalignments on the stress and strain in the bonding layer. Laser repair bonding experiments were conducted to validate the simulation results and optimize the bonding parameters. The results showed that the numerical analysis exhibits an error of less than 2.77 %, offering guidance for optimizing bonding process parameters. Moreover, with a laser power of 0.049–0.058 W and a bonding time of 2–4 s, the bonding temperature can be controlled within 490 K–550 K, enabling stable, damage-free, and effective chip bonding. For a bonding layer specification of 15 μm × 10 μm × 2 μm, the stress and strain levels are relatively low, with equivalent residual stress and residual plastic strain reduced by at least 3.04 % and 50.96 %, respectively. Bonding failure occurs when the chip rotational misalignment <em>θ</em> exceeds 10°, the <em>X</em>-axis offset Δ<em>x</em> exceeds 1 μm, the <em>Y</em>-axis offset Δ<em>y</em> exceeds 2 μm, or the tilt angles <em>α</em>/<em>β</em> exceed 1°, primarily due to altered stress and strain states and a reduced bonding area. Therefore, the study of influencing factors in the laser repair bonding technology of defective Micro-LED chips provides significant guidance for the commercial application of panel-level Micro-LED technology.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110452"},"PeriodicalIF":4.6,"publicationDate":"2026-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035113","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-21DOI: 10.1016/j.mssp.2026.110438
Tu Cong Huynh , Tan Tai Do
In semiconductor wafer microfabrication, nanosecond Yb-fiber-laser processing of silicon generates two outcomes typically viewed as mutually exclusive: a porous redeposited SiO2 bed soluble in hydrofluoric acid (HF) and HF-resistant fracture microchannels. By employing an orthogonal diagnostic approach combining cross-sectional microscopy before/after etching in 5 % HF, Fourier-transform infrared spectroscopy (FTIR), and in-situ acoustic emission (AE) monitoring, we demonstrate that both phenomena coexist under identical irradiation conditions. A thick porous overlayer (up to 469 ± 10 μm) exhibits characteristic Si–O–Si bands and is removed by HF etching, whereas the underlying silicon retains vertical crack-rooted channels. Across scan speeds v = 10–5500 mm s−1 (fixed f = 50 kHz, line density nℓ = 1000 lines·mm−1, and pulse energy), the Si–O–Si stretching band (900–1200 cm−1) systematically weakens and narrows; the normalized oxide index Soxide decreases from 1.00 to 0.60, while the AE response shifts toward higher-frequency content, indicating a transition from oxidation/redeposition-dominated to fracture-dominated regimes as the areal dose decreases. We rationalize these observations with a tunable dual-channel mechanism governed by the competition between (i) in-plume oxidation of ejected Si clusters followed by redeposition and (ii) thermo-elastic fracture in the bulk, further mapping the oxide–fracture transition into a schematic processing regime map parameterized by scan speed and areal dose. The resulting quantitative correlations provide practical design rules to tune sacrificial oxide formation versus crack-mediated microchannels for controllable silicon surface texturing and selective layer removal.
{"title":"Coexistence of oxidation–redeposition and fracture in nanosecond laser processing of silicon for semiconductor wafer microfabrication","authors":"Tu Cong Huynh , Tan Tai Do","doi":"10.1016/j.mssp.2026.110438","DOIUrl":"10.1016/j.mssp.2026.110438","url":null,"abstract":"<div><div>In semiconductor wafer microfabrication, nanosecond Yb-fiber-laser processing of silicon generates two outcomes typically viewed as mutually exclusive: a porous redeposited SiO<sub>2</sub> bed soluble in hydrofluoric acid (HF) and HF-resistant fracture microchannels. By employing an orthogonal diagnostic approach combining cross-sectional microscopy before/after etching in 5 % HF, Fourier-transform infrared spectroscopy (FTIR), and in-situ acoustic emission (AE) monitoring, we demonstrate that both phenomena coexist under identical irradiation conditions. A thick porous overlayer (up to 469 ± 10 μm) exhibits characteristic Si–O–Si bands and is removed by HF etching, whereas the underlying silicon retains vertical crack-rooted channels. Across scan speeds <em>v</em> = 10–5500 mm s<sup>−1</sup> (fixed <em>f</em> = 50 kHz, line density <em>n</em><sub><em>ℓ</em></sub> = 1000 lines·mm<sup>−1</sup>, and pulse energy), the Si–O–Si stretching band (900–1200 cm<sup>−1</sup>) systematically weakens and narrows; the normalized oxide index <em>S</em><sub><em>oxide</em></sub> decreases from 1.00 to 0.60, while the AE response shifts toward higher-frequency content, indicating a transition from oxidation/redeposition-dominated to fracture-dominated regimes as the areal dose decreases. We rationalize these observations with a tunable dual-channel mechanism governed by the competition between (i) in-plume oxidation of ejected Si clusters followed by redeposition and (ii) thermo-elastic fracture in the bulk, further mapping the oxide–fracture transition into a schematic processing regime map parameterized by scan speed and areal dose. The resulting quantitative correlations provide practical design rules to tune sacrificial oxide formation versus crack-mediated microchannels for controllable silicon surface texturing and selective layer removal.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110438"},"PeriodicalIF":4.6,"publicationDate":"2026-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-21DOI: 10.1016/j.mssp.2026.110421
T. Brakstad, H. Lysne, M.G. Michaelsen, M. Kildemo, T. Reenaas
(Cr + N) co-doped TiO2 has been proposed as a candidate for intermediate band materials, and we calculate that an intermediate band solar cell based on TiO2 can reach a limiting efficiency of ∼44 % under AM1.5 solar radiation. The ideal smallest bandgap, i.e. the photon energy for the absorption onset, is ∼1.3 eV, aligning with reported optical properties for (Cr + N) co-doped TiO2. Since the ideal doping concentration is unknown, we use natural spread combinatorial pulsed laser deposition (nc-PLD) to fabricate co-doped films on 50.8 mm silicon wafers. This method enables a continuous compositional spread (CCS), with nominal Cr and N concentrations ranging from 2 to 10 at-% across the wafer. Unlike other PLD approaches reported, doping is achieved via separate ablation of TiO2 and CrN targets, offering high flexibility in doping levels. In our initial attempt, both targets were ablated in an oxygen background gas. While Cr was incorporated as intended, nitrogen content was only ∼1/6 of Cr. To improve N incorporation, we deposited test films using nitrogen gas or alternated between nitrogen and oxygen. Based on these results, we propose a scheme where CrN is ablated in nitrogen, then capped with a thin TiO2 layer also deposited in nitrogen to prevent exposure to oxygen. The remainder of the TiO2 is then deposited in oxygen. In Part 2 of this work, we present results from this optimized scheme, in which (Cr + N) co-doped TiO2 films with Cr and N contents comparable within experimental uncertainty were successfully deposited.
{"title":"Towards intermediate band solar cells based on (Cr + N) co-doped TiO2 – PART 1: Nitrogen incorporation","authors":"T. Brakstad, H. Lysne, M.G. Michaelsen, M. Kildemo, T. Reenaas","doi":"10.1016/j.mssp.2026.110421","DOIUrl":"10.1016/j.mssp.2026.110421","url":null,"abstract":"<div><div>(Cr + N) co-doped TiO<sub>2</sub> has been proposed as a candidate for intermediate band materials, and we calculate that an intermediate band solar cell based on TiO<sub>2</sub> can reach a limiting efficiency of ∼44 % under AM1.5 solar radiation. The ideal smallest bandgap, i.e. the photon energy for the absorption onset, is ∼1.3 eV, aligning with reported optical properties for (Cr + N) co-doped TiO<sub>2</sub>. Since the ideal doping concentration is unknown, we use natural spread combinatorial pulsed laser deposition (nc-PLD) to fabricate co-doped films on 50.8 mm silicon wafers. This method enables a continuous compositional spread (CCS), with nominal Cr and N concentrations ranging from 2 to 10 at-% across the wafer. Unlike other PLD approaches reported, doping is achieved via separate ablation of TiO<sub>2</sub> and CrN targets, offering high flexibility in doping levels. In our initial attempt, both targets were ablated in an oxygen background gas. While Cr was incorporated as intended, nitrogen content was only ∼1/6 of Cr. To improve N incorporation, we deposited test films using nitrogen gas or alternated between nitrogen and oxygen. Based on these results, we propose a scheme where CrN is ablated in nitrogen, then capped with a thin TiO<sub>2</sub> layer also deposited in nitrogen to prevent exposure to oxygen. The remainder of the TiO<sub>2</sub> is then deposited in oxygen. In Part 2 of this work, we present results from this optimized scheme, in which (Cr + N) co-doped TiO<sub>2</sub> films with Cr and N contents comparable within experimental uncertainty were successfully deposited.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110421"},"PeriodicalIF":4.6,"publicationDate":"2026-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035112","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-21DOI: 10.1016/j.mssp.2026.110451
Tae-Sung Kim , Young-Hyun Won , Chae-Yun Lim , Jae-Hun Lee , Ju-Hwan Jeong , Jong Yul Park , Sung-Jae Chang , Byoung-Gue Min , Dong Min Kang , Hyun-Seok Kim
This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by systematically varying the top source-connected field plate length (), which controls the overall source-connected field plate configuration. The simulation parameters are calibrated to measured data from fabricated 0.15 μm planar-gate AlGaN/GaN HEMTs with a source-connected field plate to maintain simulation reliability. The simulations identify the field plate configuration that co-optimizes DC, RF, and dynamic performances for between 0.1 μm and the conventional 1.4 μm. The results demonstrate that an increase in from 0.1 μm to 0.5 μm yields an approximately 9.34 % improvement in breakdown voltage (); however, further increases beyond 0.5 μm show saturation with no significant enhancement. Additionally, the gate-to-source capacitance displays a significant decrease as scales down from 1.4 μm to 0.5 μm, and it then reaches a plateau for further scaling to 0.1 μm. The cut-off frequency () converges to approximately 46.23 GHz for below 0.5 μm. As a result, the device with of 0.5 μm achieves the highest Johnson's figure of merit (=) of 5.31 THz-V, representing a 28.29 % improvement over the conventional 1.4 μm configuration. Moreover, the dynamic performance metrics, characterized by the suppressed current collapse and reduced normalized on-resistance, show only marginal improvement for values above 0.5 μm, which illustrates the limited benefit of further field plate extension in this regime. These findings indicate that AlGaN/GaN HEMTs with an optimized effectively balance high-power, high-frequency, and reliable operations, making them promising candidates for advanced power electronics and RF applications.
{"title":"Optimization of source-connected field plate in AlGaN/GaN HEMTs for high-performance and high-reliability operation: A simulation study","authors":"Tae-Sung Kim , Young-Hyun Won , Chae-Yun Lim , Jae-Hun Lee , Ju-Hwan Jeong , Jong Yul Park , Sung-Jae Chang , Byoung-Gue Min , Dong Min Kang , Hyun-Seok Kim","doi":"10.1016/j.mssp.2026.110451","DOIUrl":"10.1016/j.mssp.2026.110451","url":null,"abstract":"<div><div>This study investigates the operational characteristics of AlGaN/GaN high-electron-mobility transistors (HEMTs) by systematically varying the top source-connected field plate length (<span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span>), which controls the overall source-connected field plate configuration. The simulation parameters are calibrated to measured data from fabricated 0.15 μm planar-gate AlGaN/GaN HEMTs with a source-connected field plate to maintain simulation reliability. The simulations identify the field plate configuration that co-optimizes DC, RF, and dynamic performances for <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> between 0.1 μm and the conventional 1.4 μm. The results demonstrate that an increase in <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> from 0.1 μm to 0.5 μm yields an approximately 9.34 % improvement in breakdown voltage (<span><math><mrow><msub><mi>V</mi><mi>BD</mi></msub></mrow></math></span>); however, further increases beyond 0.5 μm show saturation with no significant enhancement. Additionally, the gate-to-source capacitance displays a significant decrease as <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> scales down from 1.4 μm to 0.5 μm, and it then reaches a plateau for further scaling to 0.1 μm. The cut-off frequency (<span><math><mrow><msub><mi>f</mi><mi>T</mi></msub></mrow></math></span>) converges to approximately 46.23 GHz for <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> below 0.5 μm. As a result, the device with <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> of 0.5 μm achieves the highest Johnson's figure of merit (=<span><math><mrow><msub><mi>V</mi><mi>BD</mi></msub><mo>×</mo><msub><mi>f</mi><mi>T</mi></msub></mrow></math></span>) of 5.31 THz-V, representing a 28.29 % improvement over the conventional 1.4 μm configuration. Moreover, the dynamic performance metrics, characterized by the suppressed current collapse and reduced normalized on-resistance, show only marginal improvement for <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> values above 0.5 μm, which illustrates the limited benefit of further field plate extension in this regime. These findings indicate that AlGaN/GaN HEMTs with an optimized <span><math><mrow><msub><mi>L</mi><mi>TSFP</mi></msub></mrow></math></span> effectively balance high-power, high-frequency, and reliable operations, making them promising candidates for advanced power electronics and RF applications.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110451"},"PeriodicalIF":4.6,"publicationDate":"2026-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035116","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-21DOI: 10.1016/j.mssp.2026.110445
Qi-Zhong Ren , Ling-Hui Nie , Dong-Liang Li , Yan-Ping Jiang , Xiu-Juan Jiang , Xin-Gui Tang
A brain-like neural network constructed by memristors has attracted wide attention, which is expected to break the limitations of traditional von Neumann design. In the work, a flexible artificial synaptic device was prepared by radio-frequency magnetron sputtering, and the resistive switching characteristics were investigated. The transition between the high and low resistance states of this device is primarily attributed to the formation and fracture of conductive filaments. The device can achieve typical synaptic behaviors, including short-term/long-term plasticity, paired pulse facilitation and peak time-dependent plasticity. Importantly, the device still has stable synaptic properties under bending conditions. In addition, the convolutional neural network (CNN) constructed by the device has good accuracy for MNIST handwritten digit dataset and Fashion-MNIST clothing dataset. These results provide a feasible method for creating an effective neuromorphic network in the future.
{"title":"Flexible memristors based on ZrO2/ZnO heterojunctions for neuromorphic computing","authors":"Qi-Zhong Ren , Ling-Hui Nie , Dong-Liang Li , Yan-Ping Jiang , Xiu-Juan Jiang , Xin-Gui Tang","doi":"10.1016/j.mssp.2026.110445","DOIUrl":"10.1016/j.mssp.2026.110445","url":null,"abstract":"<div><div>A brain-like neural network constructed by memristors has attracted wide attention, which is expected to break the limitations of traditional von Neumann design. In the work, a flexible artificial synaptic device was prepared by radio-frequency magnetron sputtering, and the resistive switching characteristics were investigated. The transition between the high and low resistance states of this device is primarily attributed to the formation and fracture of conductive filaments. The device can achieve typical synaptic behaviors, including short-term/long-term plasticity, paired pulse facilitation and peak time-dependent plasticity. Importantly, the device still has stable synaptic properties under bending conditions. In addition, the convolutional neural network (CNN) constructed by the device has good accuracy for MNIST handwritten digit dataset and Fashion-MNIST clothing dataset. These results provide a feasible method for creating an effective neuromorphic network in the future.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110445"},"PeriodicalIF":4.6,"publicationDate":"2026-01-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-19DOI: 10.1016/j.mssp.2026.110439
Peter G. Naguib , Ulrike Roesler , Matthias Knapp , Katherine Aristizabal , Jonas Bartsch , Constantin A. Walenta , Tomasz Jewula , Gregor Feiertag
Charge trapping layers suppress parasitic surface conduction on high-resistivity silicon substrates for radiofrequency (RF) applications. This work investigates silicon nitride (SixNy) as a charge trapping layer, using variants deposited by physical vapor deposition (PVD) and plasma-enhanced chemical vapor deposition (PECVD). Coplanar waveguide (CPW) insertion loss is measured to assess RF suitability. Layers are characterized by spectroscopic ellipsometry, Time-of-Flight Secondary-Ion-Mass-Spectroscopy, and Fourier transform infrared spectroscopy. Insertion loss is low for wafers with PVD SixNy and high for PECVD SixNy. CPW measurements at different temperatures show insertion loss increases for PVD SixNy but decreases for PECVD SixNy. Chemical and physical analysis reveals negligible hydrogen in PVD SixNy, while PECVD layers contain hydrogen at least an order of magnitude higher. Finite Element Method (FEM) simulations calculate insertion loss for high and low parasitic surface conductivity scenarios. Hydrogen presence appears to dominate insertion loss differences: traps in SixNy saturate with hydrogen, preventing suppression of parasitic surface conduction. The hypothesized mechanism involves changes in sheet conductivity in the Si carrier's space charge region. Simulations using varying conductivity values show 450 S/m matches PECVD SixNy measurements, while 2 S/m aligns with PVD SixNy. Variations in SixNy thickness do not significantly affect CPW insertion loss in simulations or measurements. Overall, hydrogen-free PVD SixNy is well suited as a charge trapping layer to reduce parasitic surface conduction on high-resistivity Si substrates.
{"title":"A charge trapping layer to suppress RF losses using silicon nitride on high resistivity silicon substrates","authors":"Peter G. Naguib , Ulrike Roesler , Matthias Knapp , Katherine Aristizabal , Jonas Bartsch , Constantin A. Walenta , Tomasz Jewula , Gregor Feiertag","doi":"10.1016/j.mssp.2026.110439","DOIUrl":"10.1016/j.mssp.2026.110439","url":null,"abstract":"<div><div>Charge trapping layers suppress parasitic surface conduction on high-resistivity silicon substrates for radiofrequency (RF) applications. This work investigates silicon nitride (Si<sub>x</sub>N<sub>y</sub>) as a charge trapping layer, using variants deposited by physical vapor deposition (PVD) and plasma-enhanced chemical vapor deposition (PECVD). Coplanar waveguide (CPW) insertion loss is measured to assess RF suitability. Layers are characterized by spectroscopic ellipsometry, Time-of-Flight Secondary-Ion-Mass-Spectroscopy, and Fourier transform infrared spectroscopy. Insertion loss is low for wafers with PVD Si<sub>x</sub>N<sub>y</sub> and high for PECVD Si<sub>x</sub>N<sub>y</sub>. CPW measurements at different temperatures show insertion loss increases for PVD Si<sub>x</sub>N<sub>y</sub> but decreases for PECVD Si<sub>x</sub>N<sub>y</sub>. Chemical and physical analysis reveals negligible hydrogen in PVD Si<sub>x</sub>N<sub>y</sub>, while PECVD layers contain hydrogen at least an order of magnitude higher. Finite Element Method (FEM) simulations calculate insertion loss for high and low parasitic surface conductivity scenarios. Hydrogen presence appears to dominate insertion loss differences: traps in Si<sub>x</sub>N<sub>y</sub> saturate with hydrogen, preventing suppression of parasitic surface conduction. The hypothesized mechanism involves changes in sheet conductivity in the Si carrier's space charge region. Simulations using varying conductivity values show 450 S/m matches PECVD Si<sub>x</sub>N<sub>y</sub> measurements, while 2 S/m aligns with PVD Si<sub>x</sub>N<sub>y</sub>. Variations in Si<sub>x</sub>N<sub>y</sub> thickness do not significantly affect CPW insertion loss in simulations or measurements. Overall, hydrogen-free PVD Si<sub>x</sub>N<sub>y</sub> is well suited as a charge trapping layer to reduce parasitic surface conduction on high-resistivity Si substrates.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110439"},"PeriodicalIF":4.6,"publicationDate":"2026-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035053","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-19DOI: 10.1016/j.mssp.2026.110433
Han He , Zijun Chen , Boxi Ye , Liting Liu , Honglong Ning , Xinpeng Wang , Bingsuo Zou , Hao Huang
A trade-off between mobility and stability fundamentally restricts the performance of IGZO thin-film transistor (TFT). Here, a magnetron sputtering-based bilayer IGO/IGZO TFT is designed. The performance of the bilayer IGO/IGZO TFT exhibits significant improvement compared to the IGZO TFT, including a high field-effect mobility that increases from 20.5 to 51.6 cm2/Vs, a low threshold voltage that decreases from 3.0 to −0.1 V, a high on/off current ratio that increases from 1.6×107 to 7.7×107, and a small subthreshold swing that decreases from 0.37 to 0.21 V/dec. This improvement can be attributed to the ultra-thin IGO thin film, which provides a high-speed electron transport channel and reduces the interface defect state density. Additionally, the bilayer IGO/IGZO TFT demonstrates threshold voltage shifts of +1.0 V and −5.9 V under positive and negative bias stress, respectively, which are significantly lower than the +4.6 V and −11.3 V observed in IGZO TFT under identical conditions. The results presented here provide a simple path to design high-performance oxide-based TFT.
{"title":"High-performance bilayer IGO/IGZO thin-film transistors based on defect self-compensation","authors":"Han He , Zijun Chen , Boxi Ye , Liting Liu , Honglong Ning , Xinpeng Wang , Bingsuo Zou , Hao Huang","doi":"10.1016/j.mssp.2026.110433","DOIUrl":"10.1016/j.mssp.2026.110433","url":null,"abstract":"<div><div>A trade-off between mobility and stability fundamentally restricts the performance of IGZO thin-film transistor (TFT). Here, a magnetron sputtering-based bilayer IGO/IGZO TFT is designed. The performance of the bilayer IGO/IGZO TFT exhibits significant improvement compared to the IGZO TFT, including a high field-effect mobility that increases from 20.5 to 51.6 cm<sup>2</sup>/Vs, a low threshold voltage that decreases from 3.0 to −0.1 V, a high on/off current ratio that increases from 1.6×10<sup>7</sup> to 7.7×10<sup>7</sup>, and a small subthreshold swing that decreases from 0.37 to 0.21 V/dec. This improvement can be attributed to the ultra-thin IGO thin film, which provides a high-speed electron transport channel and reduces the interface defect state density. Additionally, the bilayer IGO/IGZO TFT demonstrates threshold voltage shifts of +1.0 V and −5.9 V under positive and negative bias stress, respectively, which are significantly lower than the +4.6 V and −11.3 V observed in IGZO TFT under identical conditions. The results presented here provide a simple path to design high-performance oxide-based TFT.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110433"},"PeriodicalIF":4.6,"publicationDate":"2026-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035056","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-19DOI: 10.1016/j.mssp.2026.110450
Xinlong Zhao, Yongfeng Qu, Song Yang, Ningkang Deng, Jin Yuan, Wenbo Hu, Zhaoyang Zhang, Hongxing Wang
Achieving high-quality heterogeneous integration between single-crystal oxide materials and silicon-based platforms is a critical prerequisite for advancing the application of oxide devices. Yttria-stabilized zirconia (YSZ) is regarded as an ideal buffer layer material for complex oxides epitaxially grown on silicon substrates due to its excellent lattice matching and chemical inertness. However, a significant difference in thermal expansion coefficients between YSZ and silicon (Si) makes it difficult to achieve ideal quality standards for YSZ buffer layers prepared using conventional high-temperature processes. This study employed surface activation bonding technology to realize high-quality hetero-integration of YSZ/Si. The results obtained indicate an ideal YSZ/Si bonding area, with only trace localized voids observed at the edges. A 9.5 nm-thick transition layer formed at the interface, exhibiting atomic-level flatness and crack-free integrity. The interface formation mechanism is attributable to the dual effects of Ar atom bombardment and Fe atom sputtering-deposition, resulting in a bilayer structure composed of an amorphous Si layer and an α-Fe crystalline layer. YSZ maintained excellent single-crystal quality in the near-interface region. The investigation established a high-quality YSZ/Si platform, which was found to provide an outstanding substrate for the growth of various functional oxide materials and subsequent device fabrication.
{"title":"Room-temperature direct bonding of yttria-stabilized zirconia to silicon wafer via surface activation for advanced heterointegration","authors":"Xinlong Zhao, Yongfeng Qu, Song Yang, Ningkang Deng, Jin Yuan, Wenbo Hu, Zhaoyang Zhang, Hongxing Wang","doi":"10.1016/j.mssp.2026.110450","DOIUrl":"10.1016/j.mssp.2026.110450","url":null,"abstract":"<div><div>Achieving high-quality heterogeneous integration between single-crystal oxide materials and silicon-based platforms is a critical prerequisite for advancing the application of oxide devices. Yttria-stabilized zirconia (YSZ) is regarded as an ideal buffer layer material for complex oxides epitaxially grown on silicon substrates due to its excellent lattice matching and chemical inertness. However, a significant difference in thermal expansion coefficients between YSZ and silicon (Si) makes it difficult to achieve ideal quality standards for YSZ buffer layers prepared using conventional high-temperature processes. This study employed surface activation bonding technology to realize high-quality hetero-integration of YSZ/Si. The results obtained indicate an ideal YSZ/Si bonding area, with only trace localized voids observed at the edges. A 9.5 nm-thick transition layer formed at the interface, exhibiting atomic-level flatness and crack-free integrity. The interface formation mechanism is attributable to the dual effects of Ar atom bombardment and Fe atom sputtering-deposition, resulting in a bilayer structure composed of an amorphous Si layer and an α-Fe crystalline layer. YSZ maintained excellent single-crystal quality in the near-interface region. The investigation established a high-quality YSZ/Si platform, which was found to provide an outstanding substrate for the growth of various functional oxide materials and subsequent device fabrication.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110450"},"PeriodicalIF":4.6,"publicationDate":"2026-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035109","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-19DOI: 10.1016/j.mssp.2026.110443
Min Jeong Kim , Ojun Kwon , Seyoung Oh , Eunjeong Cho , Wondeok Seo , Yeongeun Kwon , Shinhoi Kim , Minhee Kim , Kyungmin Lee , Minyoung Choi , Ah Ra Kim , Jongwon Yoon , Woojin Park , Byungjin Cho
We report improved performance in tellurium (Te) homojunction field-effect transistor by combining metallic Te source and drain electrodes with a semiconducting Te channel deposited by RF sputtering. The electrical properties of the Te films were precisely controlled by varying the thickness. The structural and electrical properties of the homojunction-layered transistor were systematically investigated with respect to those of a reference device with Au/Cr electrodes. The Te homojunction device exhibited enhanced electrical performance, showing higher drive current, improved μFE, reduced contact resistance, and higher electrical durability. Reduced energy barrier height and lowered band offset in the Te homojunction transistor led to the significant improvement in its contact properties, which is strongly supported by temperature variable I-V based Schottky barrier height extraction and Kelvin probe force microscopy based contact potential difference measurement. Te-switching devices with few interfacial defect states provide a promising strategy for strategically integrating electronic circuitry.
{"title":"Performance improvements in All-2D Te field effect transistor with layer-engineered homojunction using sputtering deposition","authors":"Min Jeong Kim , Ojun Kwon , Seyoung Oh , Eunjeong Cho , Wondeok Seo , Yeongeun Kwon , Shinhoi Kim , Minhee Kim , Kyungmin Lee , Minyoung Choi , Ah Ra Kim , Jongwon Yoon , Woojin Park , Byungjin Cho","doi":"10.1016/j.mssp.2026.110443","DOIUrl":"10.1016/j.mssp.2026.110443","url":null,"abstract":"<div><div>We report improved performance in tellurium (Te) homojunction field-effect transistor by combining metallic Te source and drain electrodes with a semiconducting Te channel deposited by RF sputtering. The electrical properties of the Te films were precisely controlled by varying the thickness. The structural and electrical properties of the homojunction-layered transistor were systematically investigated with respect to those of a reference device with Au/Cr electrodes. The Te homojunction device exhibited enhanced electrical performance, showing higher drive current, improved μ<sub>FE</sub>, reduced contact resistance, and higher electrical durability. Reduced energy barrier height and lowered band offset in the Te homojunction transistor led to the significant improvement in its contact properties, which is strongly supported by temperature variable I-V based Schottky barrier height extraction and Kelvin probe force microscopy based contact potential difference measurement. Te-switching devices with few interfacial defect states provide a promising strategy for strategically integrating electronic circuitry.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110443"},"PeriodicalIF":4.6,"publicationDate":"2026-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-19DOI: 10.1016/j.mssp.2026.110441
Tao Zhang , Chen Li , Han Han , Naihan Li , Eryang Wang , Guanghui Liu , Meng Wei , Song Xu , Jiehu Cui
WO3 has been proved as a superior semiconductor candidate showing great prospect for solar hydrogen production. Whereas, the fast charge recombination significantly limits the solar-to-hydrogen efficiency. Herein, we proposed a synergistic strategy of BiVO4 and CoOOH coatings on WO3 to boost charge transfer and photoelectrochemical (PEC) water splitting efficiency. Benefiting from the co-contributions of BiVO4 and CoOOH coatings, the constructed triple WO3/BiVO4/CoOOH composite photoanode achieved a water-oxidation photocurrent of 1.57 mA cm−2 at 1.23 V vs RHE, which is about 3.8 times than bare WO3 (0.41 mA cm−2). In addition, the incident photon-to-current conversion efficiency (IPCE) of composite photoanode enhanced 2.6 times at 420 nm compared with WO3. The synergistic role of BiVO4 and CoOOH coatings on charge dynamics and PEC efficiency of WO3 photoelectrode were intensive investigated by comprehensive characterizations of Mott-Schottky measurement (M − S), electrochemical impedance spectroscopy (EIS) and intensity-modulated photocurrent spectroscopy (IMPS), which revealed the improved charge density (Nd), reduced charge transfer resistance, suppressed charge carrier recombination (krec) and accelerated charge carrier transfer (ηtran) enable the boosted PEC performance of WO3 photoelectrode. The research provides a dual-modification strategy to construct a multilayer structured WO3-based photoanode for enhanced PEC performance.
WO3已被证明是一种优良的候选半导体材料，在太阳能制氢方面具有广阔的应用前景。然而，快速充电重组极大地限制了太阳能制氢的效率。在此，我们提出了BiVO4和CoOOH涂层在WO3上的协同策略，以提高电荷转移和光电化学（PEC）水分解效率。得益于BiVO4和CoOOH涂层的共同贡献，构建的三重WO3/BiVO4/CoOOH复合光阳极在1.23 V vs RHE下获得了1.57 mA cm−2的水氧化光电流，是裸WO3 （0.41 mA cm−2）的3.8倍。在420 nm处，复合光阳极的入射光子-电流转换效率（IPCE）比WO3提高了2.6倍。通过Mott-Schottky测量（M−S）、电化学阻抗谱（EIS）和强度调制光电流谱（IMPS）的综合表征，深入研究了BiVO4和CoOOH涂层对WO3光电极的电荷动力学和PEC效率的协同作用，发现BiVO4和CoOOH涂层提高了WO3光电极的电荷密度（Nd），降低了电荷转移电阻，抑制载流子复合（krec）和加速载流子转移（ηtran）可以提高WO3光电极的PEC性能。该研究提供了一种双改性策略来构建多层结构的wo3基光阳极，以提高PEC性能。
{"title":"Synergistic effects of BiVO4 and CoOOH coatings to accelerate charge transfer of WO3 photoanodes for improved photoelectrochemical water splitting","authors":"Tao Zhang , Chen Li , Han Han , Naihan Li , Eryang Wang , Guanghui Liu , Meng Wei , Song Xu , Jiehu Cui","doi":"10.1016/j.mssp.2026.110441","DOIUrl":"10.1016/j.mssp.2026.110441","url":null,"abstract":"<div><div>WO<sub>3</sub> has been proved as a superior semiconductor candidate showing great prospect for solar hydrogen production. Whereas, the fast charge recombination significantly limits the solar-to-hydrogen efficiency. Herein, we proposed a synergistic strategy of BiVO<sub>4</sub> and CoOOH coatings on WO<sub>3</sub> to boost charge transfer and photoelectrochemical (PEC) water splitting efficiency. Benefiting from the co-contributions of BiVO<sub>4</sub> and CoOOH coatings, the constructed triple WO<sub>3</sub>/BiVO<sub>4</sub>/CoOOH composite photoanode achieved a water-oxidation photocurrent of 1.57 mA cm<sup>−2</sup> at 1.23 V vs RHE, which is about 3.8 times than bare WO<sub>3</sub> (0.41 mA cm<sup>−2</sup>). In addition, the incident photon-to-current conversion efficiency (IPCE) of composite photoanode enhanced 2.6 times at 420 nm compared with WO<sub>3</sub>. The synergistic role of BiVO<sub>4</sub> and CoOOH coatings on charge dynamics and PEC efficiency of WO<sub>3</sub> photoelectrode were intensive investigated by comprehensive characterizations of Mott-Schottky measurement (M − S), electrochemical impedance spectroscopy (EIS) and intensity-modulated photocurrent spectroscopy (IMPS), which revealed the improved charge density (<em>N</em><sub>d</sub>), reduced charge transfer resistance, suppressed charge carrier recombination (<em>k</em><sub>rec</sub>) and accelerated charge carrier transfer (<em>η</em><sub>tran</sub>) enable the boosted PEC performance of WO<sub>3</sub> photoelectrode. The research provides a dual-modification strategy to construct a multilayer structured WO<sub>3</sub>-based photoanode for enhanced PEC performance.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"206 ","pages":"Article 110441"},"PeriodicalIF":4.6,"publicationDate":"2026-01-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"146035115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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