Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733488
Kazuki Fukazawa, N. Mizumura, S. Saito, K. Sasaki
This paper will discuss the fundamental study on nano-silver die attach newly developed with a unique approach using MO (Metallo-organic) technology.Nano-silver provides a low-temperature sintering capability. The nano-silver die attach shows high thermal performance and strong adhesion to Ag and Au plated dies and lead-frame with the metallic bond without pressure during the curing process.In addition, resin reinforcing technology and lowering modulus technology have been developed to improve the mechanical properties. By adding special epoxy resins to the die attach, the porous area is filled with the resin and the sintered structure is reinforced. Additionally, the reliability can be further improved by thermoplastic resin particles. The modulus and the stress caused by the CTE mismatch between the die and lead-frame can be lowered by adding the resin particles to the die attach.To meet the requirement for applications without Ag or Au plated Cu lead-frame, nano-silver die attach for bare Cu application have newly been developed. The addition of a special additive is effectively establish metallic bonding between the nano-silver particles and bare Cu lead-frame because the additive removes the oxide layer on the surface of Cu lead-frame. By adjusting the amount of epoxy and thermoplastic resin, adhesion strength on the bare Cu lead-frame can be more improved. The fundamental investigation for the mechanism and the reliability test results in the molded package will also be discussed in this study.
{"title":"Development of Low-temperature Sintering Materials for Bare Cu lead-frame","authors":"Kazuki Fukazawa, N. Mizumura, S. Saito, K. Sasaki","doi":"10.23919/ICEP.2019.8733488","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733488","url":null,"abstract":"This paper will discuss the fundamental study on nano-silver die attach newly developed with a unique approach using MO (Metallo-organic) technology.Nano-silver provides a low-temperature sintering capability. The nano-silver die attach shows high thermal performance and strong adhesion to Ag and Au plated dies and lead-frame with the metallic bond without pressure during the curing process.In addition, resin reinforcing technology and lowering modulus technology have been developed to improve the mechanical properties. By adding special epoxy resins to the die attach, the porous area is filled with the resin and the sintered structure is reinforced. Additionally, the reliability can be further improved by thermoplastic resin particles. The modulus and the stress caused by the CTE mismatch between the die and lead-frame can be lowered by adding the resin particles to the die attach.To meet the requirement for applications without Ag or Au plated Cu lead-frame, nano-silver die attach for bare Cu application have newly been developed. The addition of a special additive is effectively establish metallic bonding between the nano-silver particles and bare Cu lead-frame because the additive removes the oxide layer on the surface of Cu lead-frame. By adjusting the amount of epoxy and thermoplastic resin, adhesion strength on the bare Cu lead-frame can be more improved. The fundamental investigation for the mechanism and the reliability test results in the molded package will also be discussed in this study.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123386958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733564
Dung Q. Nguyen, Kengo Ishiki, Maki Saito, Kota Iwamoto, H. Shiigi
Bacterial detection has attracted tremendous interests owing to its importance in biology, medical care, drug discovery, and public health. For such applications, bacterial cellimprinting technologies are regarded as potential methods, as they can create artificial tailor-made receptors for target cell recognition. In comparison to conventional methods, which generally require a few days for bacterial determination, cell-imprinted polymers can save a substantial amount of time. In this work, we applied the molecular imprinted polymer technique to form an artificial receptor for bacterial cells and fabricated two kinds of sensing materials: cell-imprinted microsphere and cell-imprinted 96-well microplate.
{"title":"Advanced Materials for Pathogenie Bacterial Sensing","authors":"Dung Q. Nguyen, Kengo Ishiki, Maki Saito, Kota Iwamoto, H. Shiigi","doi":"10.23919/ICEP.2019.8733564","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733564","url":null,"abstract":"Bacterial detection has attracted tremendous interests owing to its importance in biology, medical care, drug discovery, and public health. For such applications, bacterial cellimprinting technologies are regarded as potential methods, as they can create artificial tailor-made receptors for target cell recognition. In comparison to conventional methods, which generally require a few days for bacterial determination, cell-imprinted polymers can save a substantial amount of time. In this work, we applied the molecular imprinted polymer technique to form an artificial receptor for bacterial cells and fabricated two kinds of sensing materials: cell-imprinted microsphere and cell-imprinted 96-well microplate.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121538809","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733504
Shih-Jeh Wu, H. Hsu, Wen-Fei Lin, Yeh Chang, Ching-Pin Yen
It is well known that ceramic substrates provide excellent electrical insulation and protection from oxidation/corrosion in addition to idea heat dissipation while allowing heat dissipation through controlled paths, e.g. integrated heat sinks. Low pressure molding (LPM) with polyamide and polyolefin (hot-melt) materials is a process typically used to injection molding for waterproof, to encapsulate and environmentally to protect electronic components. The purpose further than epoxy encapsulation is to protect electronic components with finer pitch against moisture, dust dirt and vibration. There is a special need for SiP (System in Package) application utilizing both ceramic substrate and LPM package materials where ceramic serves as mechanical structure and thermal dissipation path and LPM for high density SMT (Surface Mount) package. The research of this paper is to apply nano UV (Ultraviolet) laser to machine the LPM and ceramic substrate (sapphire, Al2O3) and compare the results with nano green laser. The interactions of these two materials with laser are quite different and even conflicting for machining (LPM is ductile and hot-melt while ceramic is brittle), thus proper strategy has to be taken to satisfy needs for both materials. One of the major problem is the re-solidification of LPM material as temperature elevated during laser irradiation. It is necessary to provide a delay time between each laser pulsing. The laser ablation threshold (LAT) of green and UV laser for both materials is also investigated in this paper. The best parameters for processing ceramic substrates are speed 200 mm/s, frequency 95 kHz, delay time 450 ms, when processing LPM speed 700 mm/s, frequency 40 kHz, delay time 250 ms.
{"title":"An Investigation of Compound Machining of Ceramic-LPM Package by Ultrafast Laser","authors":"Shih-Jeh Wu, H. Hsu, Wen-Fei Lin, Yeh Chang, Ching-Pin Yen","doi":"10.23919/ICEP.2019.8733504","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733504","url":null,"abstract":"It is well known that ceramic substrates provide excellent electrical insulation and protection from oxidation/corrosion in addition to idea heat dissipation while allowing heat dissipation through controlled paths, e.g. integrated heat sinks. Low pressure molding (LPM) with polyamide and polyolefin (hot-melt) materials is a process typically used to injection molding for waterproof, to encapsulate and environmentally to protect electronic components. The purpose further than epoxy encapsulation is to protect electronic components with finer pitch against moisture, dust dirt and vibration. There is a special need for SiP (System in Package) application utilizing both ceramic substrate and LPM package materials where ceramic serves as mechanical structure and thermal dissipation path and LPM for high density SMT (Surface Mount) package. The research of this paper is to apply nano UV (Ultraviolet) laser to machine the LPM and ceramic substrate (sapphire, Al2O3) and compare the results with nano green laser. The interactions of these two materials with laser are quite different and even conflicting for machining (LPM is ductile and hot-melt while ceramic is brittle), thus proper strategy has to be taken to satisfy needs for both materials. One of the major problem is the re-solidification of LPM material as temperature elevated during laser irradiation. It is necessary to provide a delay time between each laser pulsing. The laser ablation threshold (LAT) of green and UV laser for both materials is also investigated in this paper. The best parameters for processing ceramic substrates are speed 200 mm/s, frequency 95 kHz, delay time 450 ms, when processing LPM speed 700 mm/s, frequency 40 kHz, delay time 250 ms.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132284683","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733570
Herbert Ötzlinger, Claudia Landstorfer, T. Onishi, Christian Dunkel, Raoul Schröder
New microelectronics applications such as smartphones, automotive computing and server/AI CPUs heavily rely on wafer-level packaging (WLP) to meet performance targets. To meet future cost targets as well, Outsourced Semiconductor Assembly and Test (OSAT) foundries look to panel level packaging (PLP) for significant cost reduction. One of the most difficult parameters for PLP is to establish an economical process for 2/2μm line/space fine line plating with good deposition speed as well as good uniformity. Due to the different handling and panel plating equipment originating from the PCB industry, target line/space dimensions were typically 20/20μm down to 10/10μm, which was easier to achieve considering the lack of rotational movement, large substrate size and substrate surface quality.We present the successful scaling of high speed, extremely uniform plating technology from horizontal wafer plating to vertical panel plating. Using the patented high speed plate technology, we are capable to inject cation-rich electrolyte very close to the substrate surface, with the possibility of disturbing and breaking the surface boundary layer. Within the same plate, we have electrolyte removal holes that allow a direct path to the anode, which allows for uniform electrical fields within 5% all over the substrate surface.
{"title":"High Speed Panel Level Metallization Technology","authors":"Herbert Ötzlinger, Claudia Landstorfer, T. Onishi, Christian Dunkel, Raoul Schröder","doi":"10.23919/ICEP.2019.8733570","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733570","url":null,"abstract":"New microelectronics applications such as smartphones, automotive computing and server/AI CPUs heavily rely on wafer-level packaging (WLP) to meet performance targets. To meet future cost targets as well, Outsourced Semiconductor Assembly and Test (OSAT) foundries look to panel level packaging (PLP) for significant cost reduction. One of the most difficult parameters for PLP is to establish an economical process for 2/2μm line/space fine line plating with good deposition speed as well as good uniformity. Due to the different handling and panel plating equipment originating from the PCB industry, target line/space dimensions were typically 20/20μm down to 10/10μm, which was easier to achieve considering the lack of rotational movement, large substrate size and substrate surface quality.We present the successful scaling of high speed, extremely uniform plating technology from horizontal wafer plating to vertical panel plating. Using the patented high speed plate technology, we are capable to inject cation-rich electrolyte very close to the substrate surface, with the possibility of disturbing and breaking the surface boundary layer. Within the same plate, we have electrolyte removal holes that allow a direct path to the anode, which allows for uniform electrical fields within 5% all over the substrate surface.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129862289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733541
Tsukasa Kosuda, Y. Nakajo, Konosuke Sasagawa, Yuto Nishikai, S. Shimizu, Y. Kumita, Toshihiko Kondo, N. Hashimoto
It is necessary to maintain the amount of moisture in the body to prevent heat stroke in construction site conditions under the scorching sun, and for that reason, it is important to ascertain the amount of whole-body sweating. This study focused on a helmet, which is mandatory gear at construction sites, and developed a helmet-type wearable device that is capable of measuring the amount of perspiration during various activities. In addition, the results of our investigation indicated the feasibility of measuring the amount of whole-body perspiration using this device.
{"title":"Development of a helmet-type wearable device capable of measuring perspiration during various activities","authors":"Tsukasa Kosuda, Y. Nakajo, Konosuke Sasagawa, Yuto Nishikai, S. Shimizu, Y. Kumita, Toshihiko Kondo, N. Hashimoto","doi":"10.23919/ICEP.2019.8733541","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733541","url":null,"abstract":"It is necessary to maintain the amount of moisture in the body to prevent heat stroke in construction site conditions under the scorching sun, and for that reason, it is important to ascertain the amount of whole-body sweating. This study focused on a helmet, which is mandatory gear at construction sites, and developed a helmet-type wearable device that is capable of measuring the amount of perspiration during various activities. In addition, the results of our investigation indicated the feasibility of measuring the amount of whole-body perspiration using this device.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128780429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733428
Wen-yu Wang, Huai-You Lee, C. Chung
Nanotechnology has also been widely used in many different fields. As one of the nanotechnologies, electrospinning is used to prepare nanofibers (nanofibers), for example: drug release, biomedical materials, applications of filter media, etc. In this study, we used polyvinylpyrrolidine (PVP, 1,300,000 Mw), alcohol, Dimethylformamide, hydrochloric acid, SiO2 as the precursor solution, and slowly added tetrabutyl titanate to prepare the spun fiber by single-needle electrospinning. The fibers are prepared by high temperature heat treatment and low temperature heat treatment. The motivation for selecting materials is that SiO2 has network properties and excellent chemical and physical properties. Therefore, we chose SiO2 as the matrix to be added, and the fibers will assume a bead structure. Later, due to the good optics, electrical and chemical properties of Si-Ti based compounds, which were suitable for use in photovoltaic materials, attempts were made to add tetrabutyl titanate and found that the structure of SiO2 fibers was produced after the addition of tetrabutyl titanate. After high temperature heat treatment, it can be converted into a film feature. The sample was analyzed through Multi-functional Field-Emission Scanning Electron Microscope (FE-SEM), Transmission Electron Microscope (TEM), X-ray diffraction analyzer (XRD), Thermogravimetric Analysis(TGA), Fourier-transform infrared spectroscopy (FT-IR), Therm- omechanical Analysis (TMA), Differential Scanning Calorimetry (DSC), Atomic Force Microscope (AFM) and Contact Angle Tester analyze as to determine the properties of nanofibers.
{"title":"Preparation of Si-Ti based nanofibers and thin film by single-needle electrospinning","authors":"Wen-yu Wang, Huai-You Lee, C. Chung","doi":"10.23919/ICEP.2019.8733428","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733428","url":null,"abstract":"Nanotechnology has also been widely used in many different fields. As one of the nanotechnologies, electrospinning is used to prepare nanofibers (nanofibers), for example: drug release, biomedical materials, applications of filter media, etc. In this study, we used polyvinylpyrrolidine (PVP, 1,300,000 Mw), alcohol, Dimethylformamide, hydrochloric acid, SiO2 as the precursor solution, and slowly added tetrabutyl titanate to prepare the spun fiber by single-needle electrospinning. The fibers are prepared by high temperature heat treatment and low temperature heat treatment. The motivation for selecting materials is that SiO2 has network properties and excellent chemical and physical properties. Therefore, we chose SiO2 as the matrix to be added, and the fibers will assume a bead structure. Later, due to the good optics, electrical and chemical properties of Si-Ti based compounds, which were suitable for use in photovoltaic materials, attempts were made to add tetrabutyl titanate and found that the structure of SiO2 fibers was produced after the addition of tetrabutyl titanate. After high temperature heat treatment, it can be converted into a film feature. The sample was analyzed through Multi-functional Field-Emission Scanning Electron Microscope (FE-SEM), Transmission Electron Microscope (TEM), X-ray diffraction analyzer (XRD), Thermogravimetric Analysis(TGA), Fourier-transform infrared spectroscopy (FT-IR), Therm- omechanical Analysis (TMA), Differential Scanning Calorimetry (DSC), Atomic Force Microscope (AFM) and Contact Angle Tester analyze as to determine the properties of nanofibers.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125731440","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733539
Yih-Ting Shen, Yu-Hsiang Liu, K. Chiang
Establishing a stress buffer layer under a solder ball is an effective method to improve the reliability of solder balls. However, large deformation of the stress buffer layer leads to a decrease in trace line reliability. In this study, we discussed the trace line reliability of FO-WLCSP structures after thermal cycling tests. We use three-dimensional finite element methods to analyze trace line reliability and the simulation process has been validated. This study designed and discussed many different wiring patterns. Simulation results show that stress and strain are mainly concentrated in the via, chip/filler interface and pad junction. In addition, the study also discussed the effect of delamination on trace line reliability. The simulation results show that the longer and deeper delamination along the interface boundary of the chip and molding compound, the worse the reliability of the trace line.
{"title":"Trace line Layout Design of FO-WLCSP","authors":"Yih-Ting Shen, Yu-Hsiang Liu, K. Chiang","doi":"10.23919/ICEP.2019.8733539","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733539","url":null,"abstract":"Establishing a stress buffer layer under a solder ball is an effective method to improve the reliability of solder balls. However, large deformation of the stress buffer layer leads to a decrease in trace line reliability. In this study, we discussed the trace line reliability of FO-WLCSP structures after thermal cycling tests. We use three-dimensional finite element methods to analyze trace line reliability and the simulation process has been validated. This study designed and discussed many different wiring patterns. Simulation results show that stress and strain are mainly concentrated in the via, chip/filler interface and pad junction. In addition, the study also discussed the effect of delamination on trace line reliability. The simulation results show that the longer and deeper delamination along the interface boundary of the chip and molding compound, the worse the reliability of the trace line.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115063381","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733426
Curtis Grosskopf, Feng Xue, David Locker, Sven Thomas, Jiayu Zheng, M. Tsuriya
In common industrial practices, new integrated circuit (IC) package technologies are qualified using procedures and test conditions based on experience with the most similar technology previously qualified. While previous experience is important to consider, it cannot be the only criterion. Relying too much on experience may result in overlooking new failure modes and/or new wear out mechanisms. Current test standards may not capture the reliability risk in the new package or may overstress the technology in the new package. On the other hand, lack of understanding of the assembly processes, application environments, and use conditions of all potential end-users versus targeted end-users poses challenges when developing the appropriate reliability test plan for new package technologies/materials. With shorter development cycle time and more frequent introduction of new package technologies, a thorough qualification methodology is necessary to identify reliability weaknesses and prevent reliability escapes during the qualification of new package technologies and materials.Therefore, iNEMI conducted two industry surveys to assess potential gaps in common package qualification practices. The surveys were made available to the entire electronics supply chain, from device users to device suppliers, fabless device suppliers, design houses, package suppliers (OSAT), and fab suppliers. The surveys covered such topics as new package materials, new package technologies, end-user concerns, test conditions, new application spaces, and new qualification requirements. This paper discusses the findings generated from the survey results and presents the roadmap for developing a methodology for qualifying new package technology to address the gaps identified in the survey’s responses.
{"title":"Benchmarking of Qualification Methodologies for New Package Technologies and Materials","authors":"Curtis Grosskopf, Feng Xue, David Locker, Sven Thomas, Jiayu Zheng, M. Tsuriya","doi":"10.23919/ICEP.2019.8733426","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733426","url":null,"abstract":"In common industrial practices, new integrated circuit (IC) package technologies are qualified using procedures and test conditions based on experience with the most similar technology previously qualified. While previous experience is important to consider, it cannot be the only criterion. Relying too much on experience may result in overlooking new failure modes and/or new wear out mechanisms. Current test standards may not capture the reliability risk in the new package or may overstress the technology in the new package. On the other hand, lack of understanding of the assembly processes, application environments, and use conditions of all potential end-users versus targeted end-users poses challenges when developing the appropriate reliability test plan for new package technologies/materials. With shorter development cycle time and more frequent introduction of new package technologies, a thorough qualification methodology is necessary to identify reliability weaknesses and prevent reliability escapes during the qualification of new package technologies and materials.Therefore, iNEMI conducted two industry surveys to assess potential gaps in common package qualification practices. The surveys were made available to the entire electronics supply chain, from device users to device suppliers, fabless device suppliers, design houses, package suppliers (OSAT), and fab suppliers. The surveys covered such topics as new package materials, new package technologies, end-user concerns, test conditions, new application spaces, and new qualification requirements. This paper discusses the findings generated from the survey results and presents the roadmap for developing a methodology for qualifying new package technology to address the gaps identified in the survey’s responses.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117303208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-04-01DOI: 10.23919/ICEP.2019.8733419
F. Mu, T. Suga
Integration of GaN with SiC and diamond is one solution for the heat dissipation of high-power and high-frequency GaN device. In this research, both of GaN-SiC integration and GaN-diamond integration have been realized by surface activated bonding methods at room temperature. The bonding interfaces were investigated to understand the bonding mechanisms.
{"title":"Integration of GaN-SiC and GaN-diamond by surface activated bonding methods","authors":"F. Mu, T. Suga","doi":"10.23919/ICEP.2019.8733419","DOIUrl":"https://doi.org/10.23919/ICEP.2019.8733419","url":null,"abstract":"Integration of GaN with SiC and diamond is one solution for the heat dissipation of high-power and high-frequency GaN device. In this research, both of GaN-SiC integration and GaN-diamond integration have been realized by surface activated bonding methods at room temperature. The bonding interfaces were investigated to understand the bonding mechanisms.","PeriodicalId":213025,"journal":{"name":"2019 International Conference on Electronics Packaging (ICEP)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121803502","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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