An Erratum to this paper has been published: https://doi.org/10.1134/S1063739723900043
An Erratum to this paper has been published: https://doi.org/10.1134/S1063739723900043
The probe and spectral measurements of the plasma of the BCl3–Cl2 gas medium are carried out. Data are obtained on the influence of the initial composition of the gas medium on the electric field strength, gas temperature, particle concentration, and reduced electric field strength under conditions of a direct current glow discharge. The emission spectra of the plasma of the BCl3–Cl2 gas medium are analyzed, the main emitting components are identified, and the relationships between radiation intensities and particle concentrations are established.
The properties of a bipolar NPN transistor when exposed to unmodulated incoherent radiation created by a white LED are studied. The static and dynamic characteristics of the transistor are measured at various exposure intensities. It is shown that the change in the characteristics of the transistor under the optical effect is due to the increased lifetime of nonequilibrium charge carriers and the photovoltaic effect in PN transitions. For these reasons, the gain increases, the switching threshold decreases, and the transistor’s speed increases. The results obtained are applicable both to the creation of high-speed transistors and integrated circuits of a fundamentally new type.
The results of the design of integrated multistage voltage multipliers as components of supply modules for wireless passive microdevices are presented. The parameters of transistors that are significant for the construction of multipliers are considered for three typical CMOS technologies: CM018G 180 nm, HCMOS8D 180 nm, and C250G 250 nm. The Cadence CAD simulation results demonstrate that when implementing an eight-stage multiplier using the CM018G technology, the minimum output voltage level required for operation of the microcircuit is achieved at input amplitude of 250 mV; and when implementing a similar device using the HCMOS8D technology, at an amplitude of 375 mV. Using the example of the constructed 16-stage multiplier, it is shown that the voltage multiplication efficiency values range from 20 to 54% for a wide range of the input voltage, and the efficiency decreases only by 1–3% compared to the 8-stage implementation. The proposed recommendations for the design of integrated voltage rectifiers-multipliers can be used in the development of the passive supply units for microelectronic devices.
Switches fabricated using MEMS technology are considered as a promising element base of radio electronics. The main characteristic of a MEMS switch is the ratio of capacitances in the closed and open states. For conventional devices, this ratio is of several units, but it can be significantly increased by implementing original design solutions. This paper studies the switch, which is a combination of capacitive and resistive devices. Its working characteristics are considered depending on the substrate properties and contact resistance. The switch provides a capacitance ratio of 27.7 and 46.1 when using sapphire and borosilicate glass substrates, while high-resistivity silicon does not allow attaining values above 7.4 due to the high parasitic capacitance. The isolation and insertion loss are 14.7–19.4 and 0.8–1.1 dB in the frequency range of 4–10 GHz on a sapphire wafer. Acceptable S-parameters are achieved when the contact resistance is not higher than 1 Ω.
The article develops the possibility of forming silicon oxide structures with tapered walls using dry etching methods, including a two-stage process involving the formation of a tapered photoresist mask and plasma etching of the silicon oxide. A study of the process of tapered resist etching was carried out. The influence of plasma parameters and composition on the etching process was studied, plasma diagnostics were carried out using Langmuir probe and optical emission actinometry methods, and the mechanisms of tapered resist etching were suggested. The etching process was optimized and structures with a resist thickness of 400 nm and a sidewall angle of up to 61° were obtained. A subsequent SiO2 etching process allowed the slope of the resist to be transferred. The slope of the SiO2 wall was 57°. The resulting structures with tapered SiO2 walls make it possible to produce capacitors for studying the characteristics of dielectrics, as well as the structure of microelectromechanics and microfluidics.
Carbon nanotubes have emerged as a major material for advanced CMOS devices. The diameter of the carbon has a significant impact on the device’s properties as well as the creation of circuits that use the CNFET. Variations in circuit characteristics with CNT diameter are more obvious in analog domain designs than in digital CNFET-based designs. The proposed study demonstrates the influence of CNT parameter change on a flexible analog device, the differential voltage current conveyor. The performance of a CNFET-based instrumentation amplifier is also studied. To show the studied, HSPICE simulations were done on 32 nm CNFETs.
A macromolecular system embedded in a semiconductor microelectronic device is considered as a biomolecular nano- or micro-sized domain that performs the functions of converting acoustic and electromagnetic signals. The issues of the choice of substances, the dynamic and structural-functional state of the domain, and the physical foundations of its interaction with matrix elements are discussed. The process of excitation of forced oscillations in amino acid molecules (for example, glycine, tryptophan, and diphenyl-L-alanine) under the influence of short (10–100 ps) packets of electrical signals in the IR range with a frequency in the range of 1–125 THz is studied by the method of supercomputer nonequilibrium modeling of molecular dynamics. The acoustoelectric interpretation of oscillation generation is carried out using a unified equivalent circuit of the peptide group. Examples of prototypes of heterogeneous devices being developed are given. It is concluded that embedded biomolecular domains, presented as a multifunctional element base, are promising for signal conversion in hybrid microelectronics.
A design and topological solution for a tunnel field-effect transistor of a new type is proposed and the simulation of the transistor is performed. The device is a vertical ballistic field-effect transistor with a cylindrical metallic gate based on a cylindrical undoped AlxGa1–xAs quantum nanowire located in an Al2O3 matrix. For the given geometry of the device structure, the optimum of the fraction of aluminum in the semiconductor composition varying along the transistor channel is found, at which, unlike a conventional tunnel field-effect transistor, not only is the complete suppression of the quantum barrier for electrons by a positive gate voltage ensured but also the minimum possible electrical resistance of the transistor channel is achieved. The current-voltage characteristics of the transistor are calculated within the framework of a rigorous quantum-mechanical description of the electron transport in its channel, taking into account the nonparabolic nature of the band structure of the semiconductor.
The requirement of high speed low power square wave generators that yield spike free signal enabled the design of Schmitt trigger circuit. The designs BJT or FET based circuits have disadvantages like spikes in output signal cannot be suppressed, the output signal gain control is required, low packing density, considerable power dissipation, etc. This has paved way to development of CMOS based design. Further low power requirement enabled the CMOS based low power design aspects for the Schmitt trigger circuit. The designs are modeled in DSCH and Microwind tools for schematic and layout development at various technologies like 90, 65, 45, 32 and 22 nm. The choice of designs used are basic Schmitt trigger circuit, dynamic CMOS logic based Schmitt trigger circuit, pseudo NMOS based Schmitt trigger circuit, weak PMOS domino based Schmitt trigger circuit, NORA logic based Schmitt trigger circuit, leakage control transistor (LECTOR) based Schmitt trigger circuit, GALEOR (gated leakage transistor) based Schmitt trigger circuit and feed-forward leakage self-suppression logic (FFLSSL) based Schmitt trigger circuit. While the least number of transistors used are in the pseudo NMOS based Schmitt trigger circuit and highest number of transistors are used in NORA logic based Schmitt trigger circuit. Still pseudo NMOS requires ratioed logic which is a measure drawback. The pseudo NMOS logic based Schmitt trigger circuit occupies very less area by at least 27.027%. The power dissipation is very less in FFLSSL based Schmitt Trigger circuit by at least 75%. The delay is less in FFLSSL based Schmitt trigger circuit by at least 10.15%.
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