2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)最新文献
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529905
A. Ghisi, A. Corigliano, S. Mariani, G. Allegato
A three-scale approach to thermo-compression, metallic wafer bonding is here presented. The approach focuses on the purely mechanical side of the process, identifying three different length-scales: the macro-scale, at which the whole wafer is considered, to define the average contact pressure within each single die; the mesoscale, at which the aforementioned average pressure at the die level is applied to the MEMS bonding ring, to study stress diffusion in it; and the micro-scale, at which a micro-mechanically informed morphology of a representative volume of the two metallic rings in contact is considered along with their surface roughness, to get insights into local features of the sealing. The proposed approach can describe local effects due to a space-varying pressure, and can help to enhance and speedup the design phase of the bonding rings.
{"title":"A multi-scale approach to wafer to wafer metallic bonding in MEMS","authors":"A. Ghisi, A. Corigliano, S. Mariani, G. Allegato","doi":"10.1109/EUROSIME.2013.6529905","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529905","url":null,"abstract":"A three-scale approach to thermo-compression, metallic wafer bonding is here presented. The approach focuses on the purely mechanical side of the process, identifying three different length-scales: the macro-scale, at which the whole wafer is considered, to define the average contact pressure within each single die; the mesoscale, at which the aforementioned average pressure at the die level is applied to the MEMS bonding ring, to study stress diffusion in it; and the micro-scale, at which a micro-mechanically informed morphology of a representative volume of the two metallic rings in contact is considered along with their surface roughness, to get insights into local features of the sealing. The proposed approach can describe local effects due to a space-varying pressure, and can help to enhance and speedup the design phase of the bonding rings.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"504 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125442762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529966
F. Kraemer, P. Ritter, S. Wiese, M. Moller
The paper describes a three-dimensional, dynamic finite element simulation of a wire bonding process on a soft polymeric substrate (PTFE). Wire bonding between the chip and the substrate can be used to improve the interface performance in multi-GHz applications and provides high quality inductors for inductive peaking. For such high speed applications special high frequency substrates are required, such as PTFE. Wire bonding on those substrates is not easy, because they are very soft. Thus, such substrates can absorb a lot of the ultrasonic energy that is needed for the welding of wire and metallization. The simulations presented here compare the mechanical stresses generated on two pad geometries of this high frequency setup. These geometries represent a ground pad and signal pad structure. The results of the explicit dynamic simulations show little differences in the mechanical stresses generated during the initial compression of the bond wire. The contact force on the bond pads, the substrate penetration and the final bond wire diameter show little differences. But in all cases the ground pad structure causes slightly higher mechanical loads. Some noticeable differences can be found in case of the mechanical stresses caused in the bond pads. However, if serious problems appear during the wedge bonding on PTFE substrates, these issues cannot be solved by the little reinforcement of the ground pads by the copper clamp.
{"title":"Deformation analysis of wire bonding on soft polymers","authors":"F. Kraemer, P. Ritter, S. Wiese, M. Moller","doi":"10.1109/EUROSIME.2013.6529966","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529966","url":null,"abstract":"The paper describes a three-dimensional, dynamic finite element simulation of a wire bonding process on a soft polymeric substrate (PTFE). Wire bonding between the chip and the substrate can be used to improve the interface performance in multi-GHz applications and provides high quality inductors for inductive peaking. For such high speed applications special high frequency substrates are required, such as PTFE. Wire bonding on those substrates is not easy, because they are very soft. Thus, such substrates can absorb a lot of the ultrasonic energy that is needed for the welding of wire and metallization. The simulations presented here compare the mechanical stresses generated on two pad geometries of this high frequency setup. These geometries represent a ground pad and signal pad structure. The results of the explicit dynamic simulations show little differences in the mechanical stresses generated during the initial compression of the bond wire. The contact force on the bond pads, the substrate penetration and the final bond wire diameter show little differences. But in all cases the ground pad structure causes slightly higher mechanical loads. Some noticeable differences can be found in case of the mechanical stresses caused in the bond pads. However, if serious problems appear during the wedge bonding on PTFE substrates, these issues cannot be solved by the little reinforcement of the ground pads by the copper clamp.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115477888","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529923
A. Kozlov, D. Randjelović
This paper presents the procedure for taking into account the packaging features in the analytical modelling of thermal microsensors. The case of sensor mounted in the standard packaging is considered. In such configuration, the active domain in which basic thermal processes take place is marked out. This domain includes the thermally isolated structure and the air gaps above and below this structure. It is substituted by the equivalent domain which is divided into some rectangular regions with homogeneous parameters. The temperature distribution in these regions is obtained using the Fourier method. The parameters characterising thermal conduction processes between adjacent regions are found using adjoint boundary conditions. Based on the presented model the temperature distribution in the chosen thermal microsensor was calculated and the dependence of the hot thermopile junctions temperature on the air gap between the top surface of the sensor structure and housing cover was determined. The dependencies of the heat flows in the structure of the thermal microsensor on the size of the air gap were also studied.
{"title":"Account of the package features in modelling of thermal microsensors","authors":"A. Kozlov, D. Randjelović","doi":"10.1109/EUROSIME.2013.6529923","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529923","url":null,"abstract":"This paper presents the procedure for taking into account the packaging features in the analytical modelling of thermal microsensors. The case of sensor mounted in the standard packaging is considered. In such configuration, the active domain in which basic thermal processes take place is marked out. This domain includes the thermally isolated structure and the air gaps above and below this structure. It is substituted by the equivalent domain which is divided into some rectangular regions with homogeneous parameters. The temperature distribution in these regions is obtained using the Fourier method. The parameters characterising thermal conduction processes between adjacent regions are found using adjoint boundary conditions. Based on the presented model the temperature distribution in the chosen thermal microsensor was calculated and the dependence of the hot thermopile junctions temperature on the air gap between the top surface of the sensor structure and housing cover was determined. The dependencies of the heat flows in the structure of the thermal microsensor on the size of the air gap were also studied.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129250132","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529892
Y. Bergmann, J. Reinmuth, B. Will, M. Hain
A novel Through Silicon Via approach developed by Bosch offers high integration density of MEMS with a great cost saving potential. In this paper a Si-TSV process for MEMS is presented. To assess the stress influence of the TSV process on the silicon substrate, the TSV process was integrated in a piezo-resistive pressure sensor as a Via-Last approach. Etching and deposition of multiple layers as well as grinding of a silicon wafer may cause thermal and mechanical stress, which may affect the sensor's operation and signal-processing. Electrical measurements were carried out to evaluate the stress-responsive sensor characteristics. Results show that the Si-TSV process presented does not cause any deterioration of the pressure sensor's characteristics.
{"title":"Integration of a new Through Silicon Via concept in a microelectronic pressure sensor","authors":"Y. Bergmann, J. Reinmuth, B. Will, M. Hain","doi":"10.1109/EUROSIME.2013.6529892","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529892","url":null,"abstract":"A novel Through Silicon Via approach developed by Bosch offers high integration density of MEMS with a great cost saving potential. In this paper a Si-TSV process for MEMS is presented. To assess the stress influence of the TSV process on the silicon substrate, the TSV process was integrated in a piezo-resistive pressure sensor as a Via-Last approach. Etching and deposition of multiple layers as well as grinding of a silicon wafer may cause thermal and mechanical stress, which may affect the sensor's operation and signal-processing. Electrical measurements were carried out to evaluate the stress-responsive sensor characteristics. Results show that the Si-TSV process presented does not cause any deterioration of the pressure sensor's characteristics.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131414908","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529944
Yafan Zhang, I. Belov, N. Sarius, M. Bakowski, H. Nee, P. Leisner
A thermal design of an integrated double-side cooled SiC 50kW-1200V-200A power inverter for hybrid electric vehicle applications has been proposed to enable cooling in two different automotive operating environments: under-hood and controlled temperature environment of passenger compartment. The power inverter is integrated with air/liquid cooled cold plates equipped with finned channels. Concept evaluation and CFD model calibration have been performed on a simplified thermal prototype. Computational experiments on the detailed model of the inverter, including packaging materials, have been performed for automotive industry defined application scenarios, including two extreme and one typical driving cycles. For the studied application scenarios the case temperature of the SiC transistors and diodes have been found to be below 210°C. The maximum steady-state temperature of the DC-link capacitor has been below 127 °C for the worst-case scenario including liquid cooling, and up to 140 °C for the worst-case scenario with air-cooling.
{"title":"Thermal evaluation of a liquid/air cooled integrated power inverter for hybrid vehicle applications","authors":"Yafan Zhang, I. Belov, N. Sarius, M. Bakowski, H. Nee, P. Leisner","doi":"10.1109/EUROSIME.2013.6529944","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529944","url":null,"abstract":"A thermal design of an integrated double-side cooled SiC 50kW-1200V-200A power inverter for hybrid electric vehicle applications has been proposed to enable cooling in two different automotive operating environments: under-hood and controlled temperature environment of passenger compartment. The power inverter is integrated with air/liquid cooled cold plates equipped with finned channels. Concept evaluation and CFD model calibration have been performed on a simplified thermal prototype. Computational experiments on the detailed model of the inverter, including packaging materials, have been performed for automotive industry defined application scenarios, including two extreme and one typical driving cycles. For the studied application scenarios the case temperature of the SiC transistors and diodes have been found to be below 210°C. The maximum steady-state temperature of the DC-link capacitor has been below 127 °C for the worst-case scenario including liquid cooling, and up to 140 °C for the worst-case scenario with air-cooling.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133542581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529987
Qiuxiao Qian, Y. Liu
In this paper, the reliability performance of next generation WLCSP is studied through modeling. Intensive study is carried out from single bump design to package dimension design and the application design in PCB board. Polyimide, solder joint array layout with different width and length ratio and the PCB board via layout are simulated to improve the reliability performance. The models with different polyimide layouts and different material are studied in both thermal cycling and drop test. Then, the impact of different bump array width and length ratio on the next generation of the WLCSP is studied for the reliability performance. Finally, the impact of different PCB board via design and layout on the reliability performance of next generation WLCSP is analyzed in thermal cycling test. Different through board vias and blind vias array in PCB board are studied.
{"title":"Reliability analysis of next generation wafer level chip scale","authors":"Qiuxiao Qian, Y. Liu","doi":"10.1109/EUROSIME.2013.6529987","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529987","url":null,"abstract":"In this paper, the reliability performance of next generation WLCSP is studied through modeling. Intensive study is carried out from single bump design to package dimension design and the application design in PCB board. Polyimide, solder joint array layout with different width and length ratio and the PCB board via layout are simulated to improve the reliability performance. The models with different polyimide layouts and different material are studied in both thermal cycling and drop test. Then, the impact of different bump array width and length ratio on the next generation of the WLCSP is studied for the reliability performance. Finally, the impact of different PCB board via design and layout on the reliability performance of next generation WLCSP is analyzed in thermal cycling test. Different through board vias and blind vias array in PCB board are studied.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117307729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529946
S. Eiser, M. Kaltenbacher, M. Nelhiebel
A thermo-mechanical investigation of a Smart Power Switch using the Finite Element Method is presented. We consider a non-conforming discretization of the computational domain to bridge the scales. It allows a high degree of flexibility for discretizing the region where a fine mesh is required. We benchmark a simplified, Lagrange multiplier based displacement method in terms of accuracy and runtime. Compared to the widespread submodeling technique, it eliminates the need for elaborate homogenization methods. Results are shown for two and three-dimensional problems.
{"title":"Non-conforming meshes in multi-scale thermo-mechanical Finite Element Analysis of semiconductor power devices","authors":"S. Eiser, M. Kaltenbacher, M. Nelhiebel","doi":"10.1109/EUROSIME.2013.6529946","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529946","url":null,"abstract":"A thermo-mechanical investigation of a Smart Power Switch using the Finite Element Method is presented. We consider a non-conforming discretization of the computational domain to bridge the scales. It allows a high degree of flexibility for discretizing the region where a fine mesh is required. We benchmark a simplified, Lagrange multiplier based displacement method in terms of accuracy and runtime. Compared to the widespread submodeling technique, it eliminates the need for elaborate homogenization methods. Results are shown for two and three-dimensional problems.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130918566","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529976
T. Hauck, I. Schmadlak
The reliability of electrical components and their solder joints in particular, with respect to vibration, also often referred to as high cycle fatigue, becomes more and more important to customers in the automotive industry. The industry increasingly requires a guaranteed life time of the solder joints considering a defined vibration load by means of modeling and simulation due to shorter time to market cycles for electronic control units and therefore less allowance for failure during product qualification. The paper presents an accepted and efficient procedure to calculate the solder joint life time, considering a given random vibration profile for a MAPBGA and discusses its possibilities and limits. A stress-life durability model is used to estimate the reliability of board level assemblies. It is based on a combination of Basquin's law for high cycle fatigue (HCF) and Coffin-Manson law for low cycle fatigue.
{"title":"Vibration durability of board mounted BallGridArrays","authors":"T. Hauck, I. Schmadlak","doi":"10.1109/EUROSIME.2013.6529976","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529976","url":null,"abstract":"The reliability of electrical components and their solder joints in particular, with respect to vibration, also often referred to as high cycle fatigue, becomes more and more important to customers in the automotive industry. The industry increasingly requires a guaranteed life time of the solder joints considering a defined vibration load by means of modeling and simulation due to shorter time to market cycles for electronic control units and therefore less allowance for failure during product qualification. The paper presents an accepted and efficient procedure to calculate the solder joint life time, considering a given random vibration profile for a MAPBGA and discusses its possibilities and limits. A stress-life durability model is used to estimate the reliability of board level assemblies. It is based on a combination of Basquin's law for high cycle fatigue (HCF) and Coffin-Manson law for low cycle fatigue.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133311206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529942
Byoungok Lee, A. Moon, Joonseo Son, Jihwan Kim
This article describes the thermal characterization of semiconductor packages that include MOSFET solutions for high current capability applications. MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and parasitic diode mode. This paper shows the results of a study on thermal characterization according to those electrical characteristics and parameters. The thermal resistance is defined by the function of the temperature difference between junction to referenced temperature and the power dissipation between them. Therefore, the thermal resistance has a different value due to different heating characteristics such as linear mode, saturation mode and diode mode heating respectively. For this paper, thermal simulation and measurement were conducted using CFD simulation and experimentation. In the results illustrated various thermal characteristics depending on the different structure of packages having either Al bonding directly to the substrate or Al bonding to the lead frame with DBC substrate.
{"title":"A novel methodology for thermal characterization of power packages in high current applications","authors":"Byoungok Lee, A. Moon, Joonseo Son, Jihwan Kim","doi":"10.1109/EUROSIME.2013.6529942","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529942","url":null,"abstract":"This article describes the thermal characterization of semiconductor packages that include MOSFET solutions for high current capability applications. MOSFETs have three kinds of electrical characteristic parameters in regards to the heat generation of the silicon die, such as linear, saturation and parasitic diode mode. This paper shows the results of a study on thermal characterization according to those electrical characteristics and parameters. The thermal resistance is defined by the function of the temperature difference between junction to referenced temperature and the power dissipation between them. Therefore, the thermal resistance has a different value due to different heating characteristics such as linear mode, saturation mode and diode mode heating respectively. For this paper, thermal simulation and measurement were conducted using CFD simulation and experimentation. In the results illustrated various thermal characteristics depending on the different structure of packages having either Al bonding directly to the substrate or Al bonding to the lead frame with DBC substrate.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116561973","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-14DOI: 10.1109/EUROSIME.2013.6529963
S. Mukherjee, A. Dasgupta
The current study employs a multiscale mechanistic model to capture the time-dependent viscoplastic response of SAC105-05Mn (Sn1.0Ag0.5Cu doped with 0.05 wt-percent Manganese (Mn)) and SAC105. This study is motivated to explain the improvement in creep resistance (1-2 orders of magnitude) observed in SAC105 due to addition of trace amount of Mn, as reported previously by authors. The effect of the microalloying on the microstructure is characterized using optical image processing techniques by quantifying the size, volume fraction, and inter-particle spacing of both nanoscale Ag3Sn intermetallic compounds (IMCs) and micronscale Cu6Sn5 IMCs. Addition of Mn as a fourth alloying element is found to promote homogeneous nucleation of micronscale Cu6Sn5 IMCs, thereby reducing its size and interparticle spacing compared to that in SAC105. Furthermore, the volume fraction of nanoscale Ag3Sn IMCs in eutectic Sn-Ag region is higher in SAC105-05Mn compared to that of SAC105, and the volume fraction of pure Sn dendrites in as-solidified microstructures is found to be lower in SAC105-05Mn compared to that in SAC105. Addition of Mn however does not change the average Sn grain size in SAC105 solder joint, as confirmed by cross-polarized microscopy. The effects of the above microstructural changes (obtained using image processing) on secondary creep constitutive response of SAC105-05Mn solder interconnects are then modeled using a mechanistic multiscale creep model. The mechanistic phenomena modeled include: i] dispersion strengthening and reinforcement strengthening provided by Ag3Sn IMCs and Cu6Sn5 IMCs respectively; and ii] load sharing between pure Sn dendrites and the surrounding eutectic Sn-Ag structure. The current model is isotropic and is intended for modeling secondary creep behavior, where the anisotropy is found to be weak. The modeling approach therefore uses a directional average of the creep along preferred slip systems and orientations in anisotropic Sn grains present in coarse grained SAC105 solder joints. The above mechanistic model is able to capture the trends in secondary-creep constitutive response of the above alloys fairly accurately and explain the improvement in creep resistance of SAC105 due to the addition of Mn.
{"title":"Multiscale creep modeling of the effect of micro-alloying Manganese into SAC105 solder","authors":"S. Mukherjee, A. Dasgupta","doi":"10.1109/EUROSIME.2013.6529963","DOIUrl":"https://doi.org/10.1109/EUROSIME.2013.6529963","url":null,"abstract":"The current study employs a multiscale mechanistic model to capture the time-dependent viscoplastic response of SAC105-05Mn (Sn1.0Ag0.5Cu doped with 0.05 wt-percent Manganese (Mn)) and SAC105. This study is motivated to explain the improvement in creep resistance (1-2 orders of magnitude) observed in SAC105 due to addition of trace amount of Mn, as reported previously by authors. The effect of the microalloying on the microstructure is characterized using optical image processing techniques by quantifying the size, volume fraction, and inter-particle spacing of both nanoscale Ag3Sn intermetallic compounds (IMCs) and micronscale Cu6Sn5 IMCs. Addition of Mn as a fourth alloying element is found to promote homogeneous nucleation of micronscale Cu6Sn5 IMCs, thereby reducing its size and interparticle spacing compared to that in SAC105. Furthermore, the volume fraction of nanoscale Ag3Sn IMCs in eutectic Sn-Ag region is higher in SAC105-05Mn compared to that of SAC105, and the volume fraction of pure Sn dendrites in as-solidified microstructures is found to be lower in SAC105-05Mn compared to that in SAC105. Addition of Mn however does not change the average Sn grain size in SAC105 solder joint, as confirmed by cross-polarized microscopy. The effects of the above microstructural changes (obtained using image processing) on secondary creep constitutive response of SAC105-05Mn solder interconnects are then modeled using a mechanistic multiscale creep model. The mechanistic phenomena modeled include: i] dispersion strengthening and reinforcement strengthening provided by Ag3Sn IMCs and Cu6Sn5 IMCs respectively; and ii] load sharing between pure Sn dendrites and the surrounding eutectic Sn-Ag structure. The current model is isotropic and is intended for modeling secondary creep behavior, where the anisotropy is found to be weak. The modeling approach therefore uses a directional average of the creep along preferred slip systems and orientations in anisotropic Sn grains present in coarse grained SAC105 solder joints. The above mechanistic model is able to capture the trends in secondary-creep constitutive response of the above alloys fairly accurately and explain the improvement in creep resistance of SAC105 due to the addition of Mn.","PeriodicalId":270532,"journal":{"name":"2013 14th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems (EuroSimE)","volume":"390 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2013-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130493322","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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