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2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)最新文献

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SiGeC and InP HBT Compact Modeling for mm-Wave and THz Applications 用于毫米波和太赫兹应用的SiGeC和InP HBT紧凑建模
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062466
M. Schroter, A. Pawlak, P. Sakalas, J. Krause, T. Nardmann
An overview on compact transistor modeling for mm-wave HBT technologies is provided. Using HICUM as a vehicle, a comparison to experimental DC, AC and large-signal data is performed. Selected examples are shown for advanced SiGeC and InP HBTs with operating frequencies (fT, fmax) of (300, 500) GHz and (350, 450) GHz, respectively. Good agreement between model and measurements is obtained for all characteristics
概述了毫米波HBT技术的紧凑晶体管建模。以HICUM为载体,与实验直流、交流和大信号数据进行了比较。给出了工作频率(fT, fmax)分别为(300,500)GHz和(350,450)GHz的高级SiGeC和InP hbt的选定示例。所有特性的模型和测量结果都很好地吻合
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引用次数: 7
III-V Quantum Well Field Effect Transistors on Silicon for Future High Performance and Low Power Logic Applications 面向未来高性能、低功耗逻辑应用的硅基量子阱场效应晶体管
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062431
G. Dewey, M. Radosavljevic, N. Mukherjee
This work summarizes the advantages and challenges of III-V channel transistors for high performance and low power logic applications with respect to Si CMOS. The challenge of heterogeneous integration of III-V on Si is addressed by integration of In0.7Ga0.3As QWFETs on Si substrates with a total composite buffer thickness successfully scaled down to 1.3um. The main advantages are demonstrated with Schottky-Gate In0.7Ga0.3As QWFET on Si substrate showing 4.6X to 3.3X effective velocity gain over Si n-MOSFET for a VCC range of 0.5V to 1.0V, and 65% intrinsic drive current gain over Si nMOSFET at VCC = 0.5V. In addition, the challenge of further scaling and reduction of the high gate leakage that occurs in Schottky-gate devices is addressed by successful integration of an advanced composite high-K gate stack in the In0.7Ga0.3As QWFET.
本工作总结了III-V通道晶体管相对于Si CMOS的高性能和低功耗逻辑应用的优势和挑战。通过在Si衬底上集成In0.7Ga0.3As qwfet,并成功地将总复合缓冲厚度缩小到1.3um,解决了III-V在Si上非均质集成的挑战。在Si衬底上的肖特基栅In0.7Ga0.3As QWFET的主要优点是,在VCC范围为0.5V至1.0V时,比Si n-MOSFET的有效速度增益为4.6倍至3.3倍,在VCC = 0.5V时,比Si n-MOSFET的固有驱动电流增益为65%。此外,通过在In0.7Ga0.3As QWFET中成功集成先进的复合高k栅极堆叠,解决了肖特基栅极器件中发生的进一步缩放和减少高栅极泄漏的挑战。
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引用次数: 2
History and Evolution of Millimetre-Wave MMICs for Point-to-Point Radio 用于点对点无线电的毫米波mmic的历史和发展
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062472
J. Harvey, S. Mahon, William F. Montgomery III
Over the last two decades, the capability and implementation of mm-wave point-to-point radios has changed almost beyond recognition. A manually-tuned, waveguide-aficionado's delight has evolved into a highly manufacturable, field programmable terminal with lower cost, higher performance and much greater utility. These changes have depended largely on the availability and performance of GaAs Microwave Monolithic Integrated Circuits (MMICs). Waveguide mounted diodes of various types have been replaced by highly integrated receiver LNA-mixer, transmitter mixer-buffer and PA blocks manufactured in commercial foundries and packaged in SMT packages which can be machine assembled onto micro strip radio boards. At these frequencies, "split" configurations are required to minimise RF losses, so the microwave components are exposed to a severe temperature range in an outdoor environment and power efficiency becomes very important.
在过去的二十年里,毫米波点对点无线电的能力和实现已经发生了几乎面目全非的变化。手动调谐,波导爱好者的喜悦已经演变成一个高度可制造,现场可编程终端具有更低的成本,更高的性能和更大的效用。这些变化很大程度上取决于GaAs微波单片集成电路(mmic)的可用性和性能。各种类型的波导安装二极管已被高度集成的接收器lna -混频器,发射器混频器-缓冲器和PA块所取代,这些块由商业代工厂制造,并封装在SMT封装中,可以机器组装到微带无线电板上。在这些频率下,需要“分裂”配置以最大限度地减少射频损耗,因此微波组件暴露在室外环境中的严重温度范围内,功率效率变得非常重要。
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引用次数: 4
Challenges and Requirements of Multimode Multiband Power Amplifiers for Mobile Applications 面向移动应用的多模多频带功率放大器的挑战与要求
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062432
N. Cheng, James P. Young
Multimode multiband (MMMB) power amplifiers have been developed in recent years for next generation mobile handsets and tablets applications. Designers face new and greater challenges due to more stringent requirements in functionality, performance, size and cost. This paper will discuss the motivations that drive MMMB PA development and the requirements, challenges and considerations relevant to power amplifier design.
近年来,多模多频段(MMMB)功率放大器被开发用于下一代移动电话和平板电脑应用。由于对功能、性能、尺寸和成本的要求越来越严格,设计师面临着新的更大的挑战。本文将讨论驱动MMMB PA开发的动机以及与功率放大器设计相关的要求、挑战和考虑因素。
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引用次数: 37
Development of InAlN/GaN HEMTs Power Devices in S-Band s波段InAlN/GaN HEMTs功率器件的研制
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062455
S. Piotrowicz, E. Chartier, O. Jardel, J. Dufraisse, G. Callet, J. Jacquet, D. Lancereau, E. Morvan, R. Aubry, N. Sarazin, C. Dua, M. Oualli, M. A. Di-Forte Poisson, S. Delage
We report on AlInN/GaN HEMTs fabricated using 0.7µm gate length on SiC substrate by Low Pressure Metal Organic Vapor Phase Epitaxy. Static and pulsed DC characteristics show a maximum dc transconductance of 275mS/mm and drain current of 0.9A/mm. Small signal characterizations show Ft and Fmag of 15 and 40 GHz respectively. Load-pull power measurements were performed at S-Band. At 3.5 GHz, an output power of 13W (41.2dBm) corresponding to 6.6W/mm of power density with a PAE of 70% is reached in pulse mode on 2mm devices. 19.2mm power dies allow us to achieve an output power of 56W with 54% of PAE at 2 GHz. To our knowledge, this result represents the highest output power ever reported for AlInN-based HEMT technology.
本文报道了采用低压金属有机气相外延技术在SiC衬底上采用0.7 μ m栅长制备AlInN/GaN hemt。静态和脉冲直流特性表明,最大直流跨导为275mS/mm,漏极电流为0.9A/mm。小信号特性显示Ft和Fmag分别为15 GHz和40 GHz。负载-拉力功率测量在s波段进行。在3.5 GHz时,在脉冲模式下,在2mm器件上达到13W (41.2dBm)的输出功率,对应于6.6W/mm的功率密度,PAE为70%。19.2mm电源模块使我们能够在2 GHz时实现56W的输出功率和54%的PAE。据我们所知,这一结果代表了基于alin的HEMT技术所报道的最高输出功率。
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引用次数: 5
Degradation of AlGaN/GaN High Electron Mobility Transistors from X-Band Operation x波段操作下AlGaN/GaN高电子迁移率晶体管的降解
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062458
E. Douglas, S. Pearton, B. Poling, F. Ren, E. Heller, D. Via
AlGaN/GaN HEMTs with a gate length of 0.125 µm were stressed at Class AB condition, 10 GHz under 3 dB compression for up to 350 hours. Devices exhibited excellent RF stability up to a drain bias of 20 V. Rapid degradation was observed for a drain bias of 25 V. Substantial Schottky contact degradation was observed for all three bias conditions. Electroluminescence indicates localized points of failure along the channel length, and micro- photoluminescence indicates an increase in non- radiative trap formation in regions of failure.
栅极长度为0.125µm的AlGaN/GaN hemt在AB类条件下,在3db压缩下,在10 GHz下承受长达350小时的应力。器件表现出优异的射频稳定性,直至漏极偏压为20 V。在漏极偏压为25 V时,观察到快速降解。在所有三种偏置条件下观察到大量的肖特基接触退化。电致发光表明沿通道长度的局部失效点,微光致发光表明失效区域非辐射陷阱形成的增加。
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引用次数: 1
A Robust AlGaN/GaN HEMT Technology for RF Switching Applications 用于射频开关应用的稳健AlGaN/GaN HEMT技术
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062456
M. D. Hodge, R. Vetury, J. Shealy, R. Adams
The authors report results suggesting that GaN HEMTs developed for RF switching applications do not suffer from an inverse piezo effect related reliability failure mechanism. A critical voltage was not observed prior to breakdown voltage, suggesting a robust GaN HEMT technology well suited for RF switching applications.
作者报告的结果表明,为射频开关应用开发的GaN hemt不会受到反向压电效应相关的可靠性失效机制的影响。在击穿电压之前没有观察到临界电压,这表明稳健的GaN HEMT技术非常适合射频开关应用。
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引用次数: 12
A 6 Vpp, 52 dB, 30-dB Dynamic Range, 43 Gb/s InP DHBT Differential Limiting Amplifier 一个6 Vpp, 52 dB, 30 dB动态范围,43 Gb/s InP DHBT差分限制放大器
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062441
J. Dupuy, A. Konczykowska, F. Jorge, M. Riet, P. Berdaguer, J. Godin
We report the design, fabrication and measurement of a 43 Gb/s differential limiting amplifier integrating a transimpedance amplifier (TIA) as input stage and a distributed amplifier (Driver) as output stage, realised in a 1.5-µm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. With a differential gain higher than 52 dB, the TIA-Driver provides a constant 6 Vpp differential output amplitude for an input amplitude ranging from 12.7 mVpp to 405 mVpp, achieving more than 30 dB of electrical dynamic range, for a power consumption of 2.7 W. Designed to be used between a photodiode and an electro-optical modulator, this circuit is well suited for optical-to-electrical-to-optical (O-E-O) wavelength converters at up to 43 Gb/s.
本文报道了采用1.5µm磷化铟(InP)双异质结双极晶体管(DHBT)技术实现的43 Gb/s差分限幅放大器的设计、制造和测量,该差分限幅放大器将跨阻放大器(TIA)作为输入级,分布式放大器(Driver)作为输出级。TIA-Driver的差分增益高于52 dB,在12.7 mVpp至405 mVpp的输入幅值范围内提供恒定的6 Vpp差分输出幅值,实现超过30 dB的电动态范围,功耗为2.7 W。该电路设计用于光电二极管和电光调制器之间,非常适合于光-电-光(O-E-O)波长转换器,速度高达43 Gb/s。
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引用次数: 3
A MMIC Frequency Doubler Using AlGaN/GaN HEMT Technology 一种采用AlGaN/GaN HEMT技术的MMIC倍频器
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062491
V. Zomorrodian, R. York
A MMIC frequency doubler using the AlGaN/GaN HEMT technology is presented in this letter. At the design frequency of f0 = 4 GHz and VDS = 35 V the circuit produced maximum output power of 30 dBm with a conversion gain of 5.5 dB, and maximum conversion gain of 13.8 dB with output power of 23 dBm and output fundamental suppression of more than 11 dBc. The best output fundamental suppression was achieved at f0 = 4.15 GHz. At this input frequency the circuit produced maximum output power of 28.7 dBm with a conversion gain of 4.5 dB, and maximum conversion gain of 13.6 dB at the output power level of 22.8 dBm with output fundamental suppression of better than 19 dBc. The reason for the better output fundamental suppression at f0 = 4.15 GHz is the slight mistuning in the high Q shunt resonator in the output network.
本文介绍了一种采用AlGaN/GaN HEMT技术的MMIC倍频器。在设计频率为f0 = 4 GHz, VDS = 35 V时,电路的最大输出功率为30 dBm,转换增益为5.5 dB,最大转换增益为13.8 dB,输出功率为23 dBm,输出基波抑制大于11 dBc。在f0 = 4.15 GHz时实现了最佳的输出基波抑制。在此输入频率下,电路的最大输出功率为28.7 dBm,转换增益为4.5 dB;在输出功率为22.8 dBm时,电路的最大转换增益为13.6 dB,输出基波抑制优于19 dBc。f0 = 4.15 GHz时输出基波抑制较好的原因是输出网络中高Q分流谐振器的轻微失谐。
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引用次数: 3
A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link 用于100千兆以太网链路的CMOS低功耗10:4 MUX和4:10 DEMUX变速箱IC
Pub Date : 2011-11-01 DOI: 10.1109/CSICS.2011.6062438
Koji Fukuda, G. Ono, K. Watanabe, T. Muto, H. Yamashita, N. Masuda, R. Nemoto, Eiichi Suzuki, T. Takemoto, F. Yuki, M. Yagyu, H. Toyoda, M. Kono, Akihiro Kambe, Seiichi Umai, T. Saito, S. Nishimura
The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).
世界上第一个基于65纳米CMOS技术的CMOS“变速箱LSI”,即结合10:4多路复用器和4:10解路复用器的2 w 100千兆以太网变速箱LSI,被开发出来。它的功耗比传统的基于sig的齿轮箱LSI低75%。其12.5 Gb/s接口功耗为0.98 mW/(Gb/s), 25gb /s接口功耗为14 mW/(Gb/s)。
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引用次数: 2
期刊
2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)
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