Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062463
M. Parlak, J. Buckwalter
This paper presents a single-pole double-throw (SPDT), transmit/receive (T/R) switch operating from DC to 60 GHz. The SPDT switch is based on a series-shunt circuit with broadband input and output matching circuits and is implemented in a partially-depleted, 45-nm silicon-on-insulator (SOI) process. A buried oxide (BOX) layer is demonstrated to minimize substrate coupling. The switch exhibits a measured insertion loss of less than 1.7 dB at 45 GHz and less than 2.5 dB at 60 GHz with an isolation of greater than 25 dB at 45 GHz. To our knowledge, this is the lowest insertion loss demonstrated for an SPDT switch at 60 GHz in a CMOS process. With a control voltage of 1.2 V, the measured P1dB and IIP3 are 7.1 dBm and 18.2 dBm, respectively. The active chip area is 0.18×0.22 mm2.
{"title":"A 2.5-dB Insertion Loss, DC-60 GHz CMOS SPDT Switch in 45-nm SOI","authors":"M. Parlak, J. Buckwalter","doi":"10.1109/CSICS.2011.6062463","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062463","url":null,"abstract":"This paper presents a single-pole double-throw (SPDT), transmit/receive (T/R) switch operating from DC to 60 GHz. The SPDT switch is based on a series-shunt circuit with broadband input and output matching circuits and is implemented in a partially-depleted, 45-nm silicon-on-insulator (SOI) process. A buried oxide (BOX) layer is demonstrated to minimize substrate coupling. The switch exhibits a measured insertion loss of less than 1.7 dB at 45 GHz and less than 2.5 dB at 60 GHz with an isolation of greater than 25 dB at 45 GHz. To our knowledge, this is the lowest insertion loss demonstrated for an SPDT switch at 60 GHz in a CMOS process. With a control voltage of 1.2 V, the measured P1dB and IIP3 are 7.1 dBm and 18.2 dBm, respectively. The active chip area is 0.18×0.22 mm2.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129585575","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062472
J. Harvey, S. Mahon, William F. Montgomery III
Over the last two decades, the capability and implementation of mm-wave point-to-point radios has changed almost beyond recognition. A manually-tuned, waveguide-aficionado's delight has evolved into a highly manufacturable, field programmable terminal with lower cost, higher performance and much greater utility. These changes have depended largely on the availability and performance of GaAs Microwave Monolithic Integrated Circuits (MMICs). Waveguide mounted diodes of various types have been replaced by highly integrated receiver LNA-mixer, transmitter mixer-buffer and PA blocks manufactured in commercial foundries and packaged in SMT packages which can be machine assembled onto micro strip radio boards. At these frequencies, "split" configurations are required to minimise RF losses, so the microwave components are exposed to a severe temperature range in an outdoor environment and power efficiency becomes very important.
{"title":"History and Evolution of Millimetre-Wave MMICs for Point-to-Point Radio","authors":"J. Harvey, S. Mahon, William F. Montgomery III","doi":"10.1109/CSICS.2011.6062472","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062472","url":null,"abstract":"Over the last two decades, the capability and implementation of mm-wave point-to-point radios has changed almost beyond recognition. A manually-tuned, waveguide-aficionado's delight has evolved into a highly manufacturable, field programmable terminal with lower cost, higher performance and much greater utility. These changes have depended largely on the availability and performance of GaAs Microwave Monolithic Integrated Circuits (MMICs). Waveguide mounted diodes of various types have been replaced by highly integrated receiver LNA-mixer, transmitter mixer-buffer and PA blocks manufactured in commercial foundries and packaged in SMT packages which can be machine assembled onto micro strip radio boards. At these frequencies, \"split\" configurations are required to minimise RF losses, so the microwave components are exposed to a severe temperature range in an outdoor environment and power efficiency becomes very important.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128360610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062432
N. Cheng, James P. Young
Multimode multiband (MMMB) power amplifiers have been developed in recent years for next generation mobile handsets and tablets applications. Designers face new and greater challenges due to more stringent requirements in functionality, performance, size and cost. This paper will discuss the motivations that drive MMMB PA development and the requirements, challenges and considerations relevant to power amplifier design.
{"title":"Challenges and Requirements of Multimode Multiband Power Amplifiers for Mobile Applications","authors":"N. Cheng, James P. Young","doi":"10.1109/CSICS.2011.6062432","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062432","url":null,"abstract":"Multimode multiband (MMMB) power amplifiers have been developed in recent years for next generation mobile handsets and tablets applications. Designers face new and greater challenges due to more stringent requirements in functionality, performance, size and cost. This paper will discuss the motivations that drive MMMB PA development and the requirements, challenges and considerations relevant to power amplifier design.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"125 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128422097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062473
S. Mahon
A new technique is proposed for the design of linear and power amplifiers at mm-wave frequencies where load-pull of large transistor output cells is difficult. The technique transforms the load-pull data on a small, standard foundry transistor layout to a pair of common-gate contours for the intrinsic device; one gate-source and one gate-drain. These are then recombined as an intrinsic drain-source contour for a larger and arbitrary transistor layout. A driver amplifier for the ETSI 42 GHz point-to-point radio band has been designed using the proposed technique. The fabricated MMIC consumes 1.5 watts and has a gain of 25 dB, and OIP3 of 36 dBm, OIP5 of 28 dBm and P1dB of 23 dBm which is believed to be the best reported result to date.
{"title":"A 42 GHz Amplifier Designed Using Common-Gate Load Pull","authors":"S. Mahon","doi":"10.1109/CSICS.2011.6062473","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062473","url":null,"abstract":"A new technique is proposed for the design of linear and power amplifiers at mm-wave frequencies where load-pull of large transistor output cells is difficult. The technique transforms the load-pull data on a small, standard foundry transistor layout to a pair of common-gate contours for the intrinsic device; one gate-source and one gate-drain. These are then recombined as an intrinsic drain-source contour for a larger and arbitrary transistor layout. A driver amplifier for the ETSI 42 GHz point-to-point radio band has been designed using the proposed technique. The fabricated MMIC consumes 1.5 watts and has a gain of 25 dB, and OIP3 of 36 dBm, OIP5 of 28 dBm and P1dB of 23 dBm which is believed to be the best reported result to date.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114344646","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062444
Jerry Wang, J. Stanback, K. Fujii
An AlGaAs/InGaAs pHEMT process employing Deep-UV Phase-Shift lithography to create 0.15uM Y-shape gates has been developed and released to manufacturing. The gate formation process has high throughput and low cost compared to E-beam lithography and excellent process control has been achieved. Typical Fet characteristics are: peak fT=86Ghz, Vp=-1.0V, Gmmax=520mS/mm, Imax=575mA/mm, and BVdg=14 volts. A 9-section traveling wave amplifier (TWA) with 10dB gain up to 88 Ghz has been manufactured in this process.
{"title":"0.15uM Y-Gate pHEMT Process Using Deep-UV Phase-Shift Lithography","authors":"Jerry Wang, J. Stanback, K. Fujii","doi":"10.1109/CSICS.2011.6062444","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062444","url":null,"abstract":"An AlGaAs/InGaAs pHEMT process employing Deep-UV Phase-Shift lithography to create 0.15uM Y-shape gates has been developed and released to manufacturing. The gate formation process has high throughput and low cost compared to E-beam lithography and excellent process control has been achieved. Typical Fet characteristics are: peak fT=86Ghz, Vp=-1.0V, Gmmax=520mS/mm, Imax=575mA/mm, and BVdg=14 volts. A 9-section traveling wave amplifier (TWA) with 10dB gain up to 88 Ghz has been manufactured in this process.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114466618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062458
E. Douglas, S. Pearton, B. Poling, F. Ren, E. Heller, D. Via
AlGaN/GaN HEMTs with a gate length of 0.125 µm were stressed at Class AB condition, 10 GHz under 3 dB compression for up to 350 hours. Devices exhibited excellent RF stability up to a drain bias of 20 V. Rapid degradation was observed for a drain bias of 25 V. Substantial Schottky contact degradation was observed for all three bias conditions. Electroluminescence indicates localized points of failure along the channel length, and micro- photoluminescence indicates an increase in non- radiative trap formation in regions of failure.
{"title":"Degradation of AlGaN/GaN High Electron Mobility Transistors from X-Band Operation","authors":"E. Douglas, S. Pearton, B. Poling, F. Ren, E. Heller, D. Via","doi":"10.1109/CSICS.2011.6062458","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062458","url":null,"abstract":"AlGaN/GaN HEMTs with a gate length of 0.125 µm were stressed at Class AB condition, 10 GHz under 3 dB compression for up to 350 hours. Devices exhibited excellent RF stability up to a drain bias of 20 V. Rapid degradation was observed for a drain bias of 25 V. Substantial Schottky contact degradation was observed for all three bias conditions. Electroluminescence indicates localized points of failure along the channel length, and micro- photoluminescence indicates an increase in non- radiative trap formation in regions of failure.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"35 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114104079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062456
M. D. Hodge, R. Vetury, J. Shealy, R. Adams
The authors report results suggesting that GaN HEMTs developed for RF switching applications do not suffer from an inverse piezo effect related reliability failure mechanism. A critical voltage was not observed prior to breakdown voltage, suggesting a robust GaN HEMT technology well suited for RF switching applications.
{"title":"A Robust AlGaN/GaN HEMT Technology for RF Switching Applications","authors":"M. D. Hodge, R. Vetury, J. Shealy, R. Adams","doi":"10.1109/CSICS.2011.6062456","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062456","url":null,"abstract":"The authors report results suggesting that GaN HEMTs developed for RF switching applications do not suffer from an inverse piezo effect related reliability failure mechanism. A critical voltage was not observed prior to breakdown voltage, suggesting a robust GaN HEMT technology well suited for RF switching applications.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124960761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062441
J. Dupuy, A. Konczykowska, F. Jorge, M. Riet, P. Berdaguer, J. Godin
We report the design, fabrication and measurement of a 43 Gb/s differential limiting amplifier integrating a transimpedance amplifier (TIA) as input stage and a distributed amplifier (Driver) as output stage, realised in a 1.5-µm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. With a differential gain higher than 52 dB, the TIA-Driver provides a constant 6 Vpp differential output amplitude for an input amplitude ranging from 12.7 mVpp to 405 mVpp, achieving more than 30 dB of electrical dynamic range, for a power consumption of 2.7 W. Designed to be used between a photodiode and an electro-optical modulator, this circuit is well suited for optical-to-electrical-to-optical (O-E-O) wavelength converters at up to 43 Gb/s.
{"title":"A 6 Vpp, 52 dB, 30-dB Dynamic Range, 43 Gb/s InP DHBT Differential Limiting Amplifier","authors":"J. Dupuy, A. Konczykowska, F. Jorge, M. Riet, P. Berdaguer, J. Godin","doi":"10.1109/CSICS.2011.6062441","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062441","url":null,"abstract":"We report the design, fabrication and measurement of a 43 Gb/s differential limiting amplifier integrating a transimpedance amplifier (TIA) as input stage and a distributed amplifier (Driver) as output stage, realised in a 1.5-µm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. With a differential gain higher than 52 dB, the TIA-Driver provides a constant 6 Vpp differential output amplitude for an input amplitude ranging from 12.7 mVpp to 405 mVpp, achieving more than 30 dB of electrical dynamic range, for a power consumption of 2.7 W. Designed to be used between a photodiode and an electro-optical modulator, this circuit is well suited for optical-to-electrical-to-optical (O-E-O) wavelength converters at up to 43 Gb/s.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123277048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062491
V. Zomorrodian, R. York
A MMIC frequency doubler using the AlGaN/GaN HEMT technology is presented in this letter. At the design frequency of f0 = 4 GHz and VDS = 35 V the circuit produced maximum output power of 30 dBm with a conversion gain of 5.5 dB, and maximum conversion gain of 13.8 dB with output power of 23 dBm and output fundamental suppression of more than 11 dBc. The best output fundamental suppression was achieved at f0 = 4.15 GHz. At this input frequency the circuit produced maximum output power of 28.7 dBm with a conversion gain of 4.5 dB, and maximum conversion gain of 13.6 dB at the output power level of 22.8 dBm with output fundamental suppression of better than 19 dBc. The reason for the better output fundamental suppression at f0 = 4.15 GHz is the slight mistuning in the high Q shunt resonator in the output network.
{"title":"A MMIC Frequency Doubler Using AlGaN/GaN HEMT Technology","authors":"V. Zomorrodian, R. York","doi":"10.1109/CSICS.2011.6062491","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062491","url":null,"abstract":"A MMIC frequency doubler using the AlGaN/GaN HEMT technology is presented in this letter. At the design frequency of f0 = 4 GHz and VDS = 35 V the circuit produced maximum output power of 30 dBm with a conversion gain of 5.5 dB, and maximum conversion gain of 13.8 dB with output power of 23 dBm and output fundamental suppression of more than 11 dBc. The best output fundamental suppression was achieved at f0 = 4.15 GHz. At this input frequency the circuit produced maximum output power of 28.7 dBm with a conversion gain of 4.5 dB, and maximum conversion gain of 13.6 dB at the output power level of 22.8 dBm with output fundamental suppression of better than 19 dBc. The reason for the better output fundamental suppression at f0 = 4.15 GHz is the slight mistuning in the high Q shunt resonator in the output network.","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"54 34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132161732","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/CSICS.2011.6062438
Koji Fukuda, G. Ono, K. Watanabe, T. Muto, H. Yamashita, N. Masuda, R. Nemoto, Eiichi Suzuki, T. Takemoto, F. Yuki, M. Yagyu, H. Toyoda, M. Kono, Akihiro Kambe, Seiichi Umai, T. Saito, S. Nishimura
The world's first CMOS "gearbox LSI" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).
世界上第一个基于65纳米CMOS技术的CMOS“变速箱LSI”，即结合10:4多路复用器和4:10解路复用器的2 w 100千兆以太网变速箱LSI，被开发出来。它的功耗比传统的基于sig的齿轮箱LSI低75%。其12.5 Gb/s接口功耗为0.98 mW/(Gb/s)， 25gb /s接口功耗为14 mW/(Gb/s)。
{"title":"A CMOS Low-Power 10:4 MUX and 4:10 DEMUX Gearbox IC for 100-Gigabit Ethernet Link","authors":"Koji Fukuda, G. Ono, K. Watanabe, T. Muto, H. Yamashita, N. Masuda, R. Nemoto, Eiichi Suzuki, T. Takemoto, F. Yuki, M. Yagyu, H. Toyoda, M. Kono, Akihiro Kambe, Seiichi Umai, T. Saito, S. Nishimura","doi":"10.1109/CSICS.2011.6062438","DOIUrl":"https://doi.org/10.1109/CSICS.2011.6062438","url":null,"abstract":"The world's first CMOS \"gearbox LSI\" based on 65-nm CMOS technology-namely, a 2-W 100-gigabit-Ethernet gearbox LSI combining a 10:4 multiplexer and a 4:10 demultiplexer-was developed. Its power consumption is 75% lower than that of a conventional SiGe-based gearbox LSI. The power consumption of its 12.5-Gb/s interface is 0.98 mW/(Gb/s), while that of its 25- Gb/s interface is 14 mW/(Gb/s).","PeriodicalId":275064,"journal":{"name":"2011 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116536314","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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