Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962767
S. Stoyanov, A. Dabek, C. Bailey
Current trends in electronics packaging are driven by the demands imposed by the ever increasing high-volume consumer electronics market. The consequence of this, along with the introduction of the European Union legislations that banned the use of lead (Pb) and other hazardous materials in electrical and electronic products, is that high reliability equipment manufacturers have their component selection choices almost entirely limited to lead-free packaged commercial-of-the-shelf (COTS) components. The widespread adoption of lead-free electronic components into complex electronic systems designed for the Aerospace, Defence and High Performance (ADHP) industry must be judiciously planned in order to preserve the industry's reliability expectations. One area of concern for BGAs is thermo-mechanically induced premature (intermittent) electronic faults. One strategy to eliminate that risk is to replace the Pb-free solder balls with the baseline tin-lead solder alloy. Post-manufacturing processes that can be used to remove (deballing) and then deposit back (reballing) BGA solder balls are increasingly put in practice. The discussion in this paper focuses on the modelbased approach for assessing the thermo-mechanical responses of BGAs subjected to laser reballing. The findings of this work are that laser assisted BGA re-balling is a safe process with very localised thermal effects that present very small or no risk of thermally induced damage in relation to the discussed failure modes.
{"title":"Thermo-mechanical impact of laser-induced solder ball attach process on ball grid arrays","authors":"S. Stoyanov, A. Dabek, C. Bailey","doi":"10.1109/ESTC.2014.6962767","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962767","url":null,"abstract":"Current trends in electronics packaging are driven by the demands imposed by the ever increasing high-volume consumer electronics market. The consequence of this, along with the introduction of the European Union legislations that banned the use of lead (Pb) and other hazardous materials in electrical and electronic products, is that high reliability equipment manufacturers have their component selection choices almost entirely limited to lead-free packaged commercial-of-the-shelf (COTS) components. The widespread adoption of lead-free electronic components into complex electronic systems designed for the Aerospace, Defence and High Performance (ADHP) industry must be judiciously planned in order to preserve the industry's reliability expectations. One area of concern for BGAs is thermo-mechanically induced premature (intermittent) electronic faults. One strategy to eliminate that risk is to replace the Pb-free solder balls with the baseline tin-lead solder alloy. Post-manufacturing processes that can be used to remove (deballing) and then deposit back (reballing) BGA solder balls are increasingly put in practice. The discussion in this paper focuses on the modelbased approach for assessing the thermo-mechanical responses of BGAs subjected to laser reballing. The findings of this work are that laser assisted BGA re-balling is a safe process with very localised thermal effects that present very small or no risk of thermally induced damage in relation to the discussed failure modes.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125517532","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962797
A. Alastalo, J. Leppaniemi, K. Ojanpera, H. Majumdar
This paper focuses on circuit simulation for thin film transistors that can be based on organic or inorganic metal-oxide materials and fabricated using solution processing such as printing or using the more conventional methods such as sputtering. In particular, the paper focuses on solution processed metal oxides. Existing compact device models are generalized in the article to include AC properties and statistical variations. Simulation results for a four-transistor flip-flop circuit are compared against measured characteristics to verify model predictions. The simulation tools will serve in building more complicated analogue and digital printed circuits.
{"title":"Modelling of printable metal-oxide TFTs for circuit simulation","authors":"A. Alastalo, J. Leppaniemi, K. Ojanpera, H. Majumdar","doi":"10.1109/ESTC.2014.6962797","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962797","url":null,"abstract":"This paper focuses on circuit simulation for thin film transistors that can be based on organic or inorganic metal-oxide materials and fabricated using solution processing such as printing or using the more conventional methods such as sputtering. In particular, the paper focuses on solution processed metal oxides. Existing compact device models are generalized in the article to include AC properties and statistical variations. Simulation results for a four-transistor flip-flop circuit are compared against measured characteristics to verify model predictions. The simulation tools will serve in building more complicated analogue and digital printed circuits.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126926895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962747
R. Dudek, M. Hildebrandt, R. Doering, S. Rzepka, H. Trageser, R. Kohl, C. Wang
Due to the relatively short use time of lead-free solders, the issue of solder joint service life is not fully resolved yet. In particular, there is a lack of testing data for long term thermal cyclic under benign cyclic conditions as well as a on a reliable predictive model for solder fatigue acceleration. This subject has been addressed by long-term testing. Boards from series production were subjected to field cycles 23°C/93°C, 6 hours. After 3 ½ and 4 ½ years or 4800 and 6500 cycles, respectively, the test boards were analyzed. Both solders under investigation, SAC 305 and Innolot, were additionally tested under -40/150°C, 1hour, test cycling conditions. An acceleration factor of approximately 11 was figured out based on computer tomography and cross sectioning analyses. For SAC acceleration predictions based on different published analytical models (Norris/Landsberg equations) were compared to the testing results. The predicted range of acceleration factors was 4.9-39.4, i.e. this type of prediction can be misleading. A second type of comparison was made based on finite element analysis and a related phenomenological model, which gave predictions of the acceleration at least on the save side. For Innolot less fatigue was generally seen, however, kinds of brittle cracking were observed different for field and test loadings. In a final part of the paper an additional study on the effect of two test cycles, 0/100°C and -40/125°C, 1 hour, on multi row QFN fatigue is discussed which shows that involvement of plastic package with Tg in the cyclic range can cause acceleration totally different from analytical predictions.
{"title":"Solder fatigue acceleration prediction and testing results for different thermal test- and field cycling environments","authors":"R. Dudek, M. Hildebrandt, R. Doering, S. Rzepka, H. Trageser, R. Kohl, C. Wang","doi":"10.1109/ESTC.2014.6962747","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962747","url":null,"abstract":"Due to the relatively short use time of lead-free solders, the issue of solder joint service life is not fully resolved yet. In particular, there is a lack of testing data for long term thermal cyclic under benign cyclic conditions as well as a on a reliable predictive model for solder fatigue acceleration. This subject has been addressed by long-term testing. Boards from series production were subjected to field cycles 23°C/93°C, 6 hours. After 3 ½ and 4 ½ years or 4800 and 6500 cycles, respectively, the test boards were analyzed. Both solders under investigation, SAC 305 and Innolot, were additionally tested under -40/150°C, 1hour, test cycling conditions. An acceleration factor of approximately 11 was figured out based on computer tomography and cross sectioning analyses. For SAC acceleration predictions based on different published analytical models (Norris/Landsberg equations) were compared to the testing results. The predicted range of acceleration factors was 4.9-39.4, i.e. this type of prediction can be misleading. A second type of comparison was made based on finite element analysis and a related phenomenological model, which gave predictions of the acceleration at least on the save side. For Innolot less fatigue was generally seen, however, kinds of brittle cracking were observed different for field and test loadings. In a final part of the paper an additional study on the effect of two test cycles, 0/100°C and -40/125°C, 1 hour, on multi row QFN fatigue is discussed which shows that involvement of plastic package with Tg in the cyclic range can cause acceleration totally different from analytical predictions.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133030100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962737
A. Gadda, R. Tuovinen, H. Rimminen, S. Lalu, J. Saarilahti, A. Karkkainen
Advanced 3D packaging of a Micro Electro Mechanical Systems (MEMS) chip and a CMOS/ASIC Chip was studied. We successfully introduced redistribution process applying two spin coated polybenzoxazole (PBO) polymer layers and two metal layers on 200 mm ASIC wafer. Both MEMS and ASIC bump pad openings were set to 60 μm in diameter. Sputtering and electrochemical plating (ECP) techniques were utilized for metallization. On the Al pads of the sensor Au stud bumps were created. The redistributed ASIC pads were coated with sputtered Au on top of the ECP nickel metal layer and thus Au-Au flip chip bonding was accomplished. The MEMS sensor element in this study was capacitive pressure sensing diaphragm. The diaphragm was made of poly-Si. The pressure range tested was typical barometric range from 35 kPa to 115 kPa. The device operating temperature range from - 40 °C to + 85 °C was tested. Along with the packaging process, solder ball transfer jig was fabricated using bulk silicon wafer. It enabled transfer of eight solder balls to the Chip Scale Packaging (CSP) at one time. The solder ball landing pad was sputtered Au as well. The solder ball pad openings were 300 μm in diameter. Two different size of solder balls were used, 310 μm and 410 μm to ensure enough clearance between CSP and Printed Circuit Board (PCB). Solder balls were consisted of polymer core ball with SnAgCu (SAC) solder metal layers. Several thermo compression bondings were carried out and fine-tune solder ball connections. Functionality was verified by electrical device measurements. To improve productivity, replacement of the Au stud bumps was demonstrated using wafer level ECP to make SnAg μbumps. The plating quality attained within 1 μm height uniformity inside a bonding chip area. SEM observation showed that connection of SnAg micro bump to Au-pad metal was realized.
{"title":"3D flip chip packaging of MEMS sensor","authors":"A. Gadda, R. Tuovinen, H. Rimminen, S. Lalu, J. Saarilahti, A. Karkkainen","doi":"10.1109/ESTC.2014.6962737","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962737","url":null,"abstract":"Advanced 3D packaging of a Micro Electro Mechanical Systems (MEMS) chip and a CMOS/ASIC Chip was studied. We successfully introduced redistribution process applying two spin coated polybenzoxazole (PBO) polymer layers and two metal layers on 200 mm ASIC wafer. Both MEMS and ASIC bump pad openings were set to 60 μm in diameter. Sputtering and electrochemical plating (ECP) techniques were utilized for metallization. On the Al pads of the sensor Au stud bumps were created. The redistributed ASIC pads were coated with sputtered Au on top of the ECP nickel metal layer and thus Au-Au flip chip bonding was accomplished. The MEMS sensor element in this study was capacitive pressure sensing diaphragm. The diaphragm was made of poly-Si. The pressure range tested was typical barometric range from 35 kPa to 115 kPa. The device operating temperature range from - 40 °C to + 85 °C was tested. Along with the packaging process, solder ball transfer jig was fabricated using bulk silicon wafer. It enabled transfer of eight solder balls to the Chip Scale Packaging (CSP) at one time. The solder ball landing pad was sputtered Au as well. The solder ball pad openings were 300 μm in diameter. Two different size of solder balls were used, 310 μm and 410 μm to ensure enough clearance between CSP and Printed Circuit Board (PCB). Solder balls were consisted of polymer core ball with SnAgCu (SAC) solder metal layers. Several thermo compression bondings were carried out and fine-tune solder ball connections. Functionality was verified by electrical device measurements. To improve productivity, replacement of the Au stud bumps was demonstrated using wafer level ECP to make SnAg μbumps. The plating quality attained within 1 μm height uniformity inside a bonding chip area. SEM observation showed that connection of SnAg micro bump to Au-pad metal was realized.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129794395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962740
S. Tuukkanen, S. Lehtimäki, F. Jahangir, Antti-Pekka Eskelinen, Donald Lupo, Sami Franssila
Supercapacitors are promising energy storage devices providing capacitance much higher than conventional capacitors and higher power density and longer cycle life than Li-batteries. We report printable and disposable supercapacitors fabricated from solution-processed carbon nanotube (CNT) composite material as active electrodes and nanocellulose (NC) as a separator. Use of a highly porous and electrically conducting CNT film as electrode materials eliminates the need of current collector. NC is a robust separator material used instead of conventional polymer separator films. Supercapacitor characterization was done with a galvanostatic discharge method according to an industrial standard. The capacitance of 1.8 cm2 devices was 14.9-16.5 mF (7.4-9.1 mF/cm2 or 2.4-2.9 F/g) and equivalent series resistance (ESR) 74-155 Ω. This type of low-cost energy storage devices fabricated from safe and environmentally friendly materials have obvious applications in autonomous intelligence and disposable low-end products.
{"title":"Printable and disposable supercapacitor from nanocellulose and carbon nanotubes","authors":"S. Tuukkanen, S. Lehtimäki, F. Jahangir, Antti-Pekka Eskelinen, Donald Lupo, Sami Franssila","doi":"10.1109/ESTC.2014.6962740","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962740","url":null,"abstract":"Supercapacitors are promising energy storage devices providing capacitance much higher than conventional capacitors and higher power density and longer cycle life than Li-batteries. We report printable and disposable supercapacitors fabricated from solution-processed carbon nanotube (CNT) composite material as active electrodes and nanocellulose (NC) as a separator. Use of a highly porous and electrically conducting CNT film as electrode materials eliminates the need of current collector. NC is a robust separator material used instead of conventional polymer separator films. Supercapacitor characterization was done with a galvanostatic discharge method according to an industrial standard. The capacitance of 1.8 cm2 devices was 14.9-16.5 mF (7.4-9.1 mF/cm2 or 2.4-2.9 F/g) and equivalent series resistance (ESR) 74-155 Ω. This type of low-cost energy storage devices fabricated from safe and environmentally friendly materials have obvious applications in autonomous intelligence and disposable low-end products.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129809073","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962788
M. Oppermann, Felix Thurow, B. Bunz
Future applications like new types of multifunctional sensors (e.g. surveillance radar) will be realised with cost-effective and high yield manufacturing solutions, like high-volume SMD based electronic products. Different package types, e.g. QFN (Quad Flat no-Lead) and ceramic based packages in L/HTCC (Low/High Temperature Cofired Ceramic) technology, mainly used for power devices will be shown and compared. Next generation of GaN (Gallium Nitride) MMICs will cover more functionalities on the same chip. Therefore specific package designs with higher number of RF interfaces are mandatory. Multifunctional MMICs will allow very compact T/R (Transmit/Receive) module designs, and will reduce the number of active devices and packages used in PCB (Printed Circuit Board) based module solutions.
{"title":"GaN/SiC MMICs and packaging for use in future transmit / receive modules","authors":"M. Oppermann, Felix Thurow, B. Bunz","doi":"10.1109/ESTC.2014.6962788","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962788","url":null,"abstract":"Future applications like new types of multifunctional sensors (e.g. surveillance radar) will be realised with cost-effective and high yield manufacturing solutions, like high-volume SMD based electronic products. Different package types, e.g. QFN (Quad Flat no-Lead) and ceramic based packages in L/HTCC (Low/High Temperature Cofired Ceramic) technology, mainly used for power devices will be shown and compared. Next generation of GaN (Gallium Nitride) MMICs will cover more functionalities on the same chip. Therefore specific package designs with higher number of RF interfaces are mandatory. Multifunctional MMICs will allow very compact T/R (Transmit/Receive) module designs, and will reduce the number of active devices and packages used in PCB (Printed Circuit Board) based module solutions.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129958366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962731
P. Karioja, K. Kautio, J. Ollila, K. Keranen, M. Karppinen, V. Heikkinen, T. Jaakola, M. Lahti
In order to fulfill the specifications of photonic systems, various optoelectronic chips, MEMS, MOEMS and RF-MEMS devices, micro-optical elements and integrated circuits needs to be integrated into functional components, modules and systems. The sub-systems of the photonic system must be fabricated by the use of cost-efficient, reproducible, well-established, high-volume manufacturing technologies. The functionality of the system is outlined by the combination of the functionalities of individual devices. The performance of the system, however, is defined by packaging and integration methods and configurations. Low temperature cofired ceramics (LTCC) is one of our key technology assets for photonics and MEMS/MOEMS/RF-MEMS packaging. In photonics integration, the tolerance of device alignment is the key issue of integration. In order to be able to use mass-manufacturing tools, the primary aim is to process 3D structures, such as, grooves, cavities, holes, bumps and alignment fiducials, which can be used for the passive alignment of devices. The tolerances of LTCC structures are typically ±5μm and in some specific cases ±2μm. Therefore, LTCC provides means for the passive alignment of multimode fiber as well as MOEMS devices. Thermal management by the use of thermal vias in LTCC is a well-established technique, and liquid cooling channels in the LTCC substrate provide efficient additional means for high-power laser cooling. When targeting for thermally controlled systems, thermal bridge structures can be used to isolate critical devices from main structures. LTCC provides inherently hermetic substrate allowing for the possibility to hermetic encapsulation. Hermetic fiber feed throughs and transparent windows can be integrated in LTCC structures. Cavities, channels and sealed gas cells can be fabricated, also. RF antennas and coil structures for electro-magnetic field control can be integrated in the LTCC substrate. Therefore, 3D packaging of MEMS, MOEMS and photonic devices is enabled by LTCC.
{"title":"MEMS, MOEMS, RF-MEMS and photonics packaging based on LTCC technology","authors":"P. Karioja, K. Kautio, J. Ollila, K. Keranen, M. Karppinen, V. Heikkinen, T. Jaakola, M. Lahti","doi":"10.1109/ESTC.2014.6962731","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962731","url":null,"abstract":"In order to fulfill the specifications of photonic systems, various optoelectronic chips, MEMS, MOEMS and RF-MEMS devices, micro-optical elements and integrated circuits needs to be integrated into functional components, modules and systems. The sub-systems of the photonic system must be fabricated by the use of cost-efficient, reproducible, well-established, high-volume manufacturing technologies. The functionality of the system is outlined by the combination of the functionalities of individual devices. The performance of the system, however, is defined by packaging and integration methods and configurations. Low temperature cofired ceramics (LTCC) is one of our key technology assets for photonics and MEMS/MOEMS/RF-MEMS packaging. In photonics integration, the tolerance of device alignment is the key issue of integration. In order to be able to use mass-manufacturing tools, the primary aim is to process 3D structures, such as, grooves, cavities, holes, bumps and alignment fiducials, which can be used for the passive alignment of devices. The tolerances of LTCC structures are typically ±5μm and in some specific cases ±2μm. Therefore, LTCC provides means for the passive alignment of multimode fiber as well as MOEMS devices. Thermal management by the use of thermal vias in LTCC is a well-established technique, and liquid cooling channels in the LTCC substrate provide efficient additional means for high-power laser cooling. When targeting for thermally controlled systems, thermal bridge structures can be used to isolate critical devices from main structures. LTCC provides inherently hermetic substrate allowing for the possibility to hermetic encapsulation. Hermetic fiber feed throughs and transparent windows can be integrated in LTCC structures. Cavities, channels and sealed gas cells can be fabricated, also. RF antennas and coil structures for electro-magnetic field control can be integrated in the LTCC substrate. Therefore, 3D packaging of MEMS, MOEMS and photonic devices is enabled by LTCC.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132292149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962711
Roman Ostholt, N. Ambrosius, R. A. Kruger
Silicon and organic materials are largely accepted as substrates for interposer. Glass outperforms the current interposer materials in a number of properties such as mechanical strength, low loss and chemical resistance. In addition it offers the potential of being a low cost but high density substrate material. As this is recognized glass is an emerging material for interposer application. While metallization is widely solved, via formation is still one of main drawbacks of glass interposers. Current glass drilling technologies lack either in speed, minimal diameter or quality for interposer application. In this paper a new high speed Through-Glass-Via (TGV) manufacturing process is presented. The new process is based on a laser induced chemical etching of the glass substrate. Laser induced glass etching technologies are known in the art. Using ultra short laser pulses a permanent modification of the glass is generated which triggers an anisotropic etching. In contrast to the state of the art, the presented process generates a modification from one surface of the glass substrate to the other with one shot only. Therefore the technology enables structuring on the fly. The speed of the on the fly process only depends on the dynamics of the base machine. Structuring speeds of around 5000 TGV/s can be achieved. The process works with standard glasses used for interposer. It does not depend on a special glass additive or additional thermal treatments of the glass before etching. Results are shown for glass thicknesses between 50 μm and 200 μm. Depending on the length of the etching step TGV diameter between 10 μm and 50 μm can be achieved. The TGVs have a small taper of below 5°.
{"title":"High speed through glass via manufacturing technology for interposer","authors":"Roman Ostholt, N. Ambrosius, R. A. Kruger","doi":"10.1109/ESTC.2014.6962711","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962711","url":null,"abstract":"Silicon and organic materials are largely accepted as substrates for interposer. Glass outperforms the current interposer materials in a number of properties such as mechanical strength, low loss and chemical resistance. In addition it offers the potential of being a low cost but high density substrate material. As this is recognized glass is an emerging material for interposer application. While metallization is widely solved, via formation is still one of main drawbacks of glass interposers. Current glass drilling technologies lack either in speed, minimal diameter or quality for interposer application. In this paper a new high speed Through-Glass-Via (TGV) manufacturing process is presented. The new process is based on a laser induced chemical etching of the glass substrate. Laser induced glass etching technologies are known in the art. Using ultra short laser pulses a permanent modification of the glass is generated which triggers an anisotropic etching. In contrast to the state of the art, the presented process generates a modification from one surface of the glass substrate to the other with one shot only. Therefore the technology enables structuring on the fly. The speed of the on the fly process only depends on the dynamics of the base machine. Structuring speeds of around 5000 TGV/s can be achieved. The process works with standard glasses used for interposer. It does not depend on a special glass additive or additional thermal treatments of the glass before etching. Results are shown for glass thicknesses between 50 μm and 200 μm. Depending on the length of the etching step TGV diameter between 10 μm and 50 μm can be achieved. The TGVs have a small taper of below 5°.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129551230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962748
G. Lorenz, F. Naumann, M. Mittag, M. Petzold
Today, micro- and power electronic components are used within a rapidly increasing number of different automotive applications playing a key role within power generation and energy conversion systems. As a consequence, particularly the interconnecting materials of electronics systems are extremely challenged by harsh environment conditions like high operational temperatures, which are partially superposed by intensive mechanical loading and high thermo mechanical stresses. In order to meet the robustness and reliability demands required for industrial applications, detailed understanding of the material response regarding (visco-) elastic, plastic or creep deformation behavior as a function of temperature is necessary. In this study, elastic and plastic material properties of bond wire materials at temperatures up to 350°C have been determined by nanoindentation. Using a Voce model to consider the plastic material behavior, the applied material parameter extraction procedure was exemplarily demonstrated for three different heavy bond wire materials as a model system. The test method presented has been validated by comparing results from reference tensile testing with the deformation behavior gained from nanoindentation testing. Thus, the testing method and data evaluation procedure can also be applied to determine local material parameters in critical process- or application-affected regions of microelectronic packaging materials.
{"title":"Mechanical characterization of bond wire materials in electronic devices at elevated temperatures","authors":"G. Lorenz, F. Naumann, M. Mittag, M. Petzold","doi":"10.1109/ESTC.2014.6962748","DOIUrl":"https://doi.org/10.1109/ESTC.2014.6962748","url":null,"abstract":"Today, micro- and power electronic components are used within a rapidly increasing number of different automotive applications playing a key role within power generation and energy conversion systems. As a consequence, particularly the interconnecting materials of electronics systems are extremely challenged by harsh environment conditions like high operational temperatures, which are partially superposed by intensive mechanical loading and high thermo mechanical stresses. In order to meet the robustness and reliability demands required for industrial applications, detailed understanding of the material response regarding (visco-) elastic, plastic or creep deformation behavior as a function of temperature is necessary. In this study, elastic and plastic material properties of bond wire materials at temperatures up to 350°C have been determined by nanoindentation. Using a Voce model to consider the plastic material behavior, the applied material parameter extraction procedure was exemplarily demonstrated for three different heavy bond wire materials as a model system. The test method presented has been validated by comparing results from reference tensile testing with the deformation behavior gained from nanoindentation testing. Thus, the testing method and data evaluation procedure can also be applied to determine local material parameters in critical process- or application-affected regions of microelectronic packaging materials.","PeriodicalId":299981,"journal":{"name":"Proceedings of the 5th Electronics System-integration Technology Conference (ESTC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-11-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123814015","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-11-24DOI: 10.1109/ESTC.2014.6962817
Haksun Lee, Y. Eom, Hyun-Cheol Bae, Kwang-Seong Choi, J. H. Lee
This paper focuses on development of a low contact resistance interconnection for low temperature bonding applications. Alternative to conventional display interconnection mechanisms using anisotropic conductive film (ACF), solder and underfill method using low melting point Bi58-Sn solder is suggested. Solder bumping is carried out using a maskless Solder-on-Pad technology. An average bump height of 16.4μm with 80μm bump pitch is achieved by optimizing the solder paste material called Solder-Bump-Maker. The test vehicle with bumps is flip chip bonded with a top die using Fluxing underfill. In order to analyze the quality of the bonded interconnection, contact resistance was measured using the 4-point probe method, and a moisture absorption test was conducted in a 85°C/85% relative humidity condition for 100 hours. The contact resistance values before and after the reliability test show no significant difference, which demonstrates that the suggested interconnection is a robust joint with increased electrical performance.
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