Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51062
B. Jalali, E. S. Yang
The confinement property of polysilicon contacts, leading to storage of minority carriers, has been studied using the photoconductivity technique. Steady-state and transient optical measurement show a considerable increase of stored carriers by these contacts. A model has been developed that allows the extraction of contact parameters.<>
{"title":"Characterization of polysilicon contacts by photoconductance measurements","authors":"B. Jalali, E. S. Yang","doi":"10.1109/BIPOL.1988.51062","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51062","url":null,"abstract":"The confinement property of polysilicon contacts, leading to storage of minority carriers, has been studied using the photoconductivity technique. Steady-state and transient optical measurement show a considerable increase of stored carriers by these contacts. A model has been developed that allows the extraction of contact parameters.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132905517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51063
M. C. Wilson, D. Gold, P. Hunt, G. Booker
The 2D equi-concentration dopant contours are revealed for the first time for a cross-section through a 1 mu m double-layer polysilicon bipolar device. The planarity of the emitter junction is shown to be dependent on the presence of emitter sidewall spacer filters. Implications for ultrashallow junction devices are presented.<>
{"title":"The effect of emitter sidewall isolation on the emitter junction in a double layer polysilicon bipolar process","authors":"M. C. Wilson, D. Gold, P. Hunt, G. Booker","doi":"10.1109/BIPOL.1988.51063","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51063","url":null,"abstract":"The 2D equi-concentration dopant contours are revealed for the first time for a cross-section through a 1 mu m double-layer polysilicon bipolar device. The planarity of the emitter junction is shown to be dependent on the presence of emitter sidewall spacer filters. Implications for ultrashallow junction devices are presented.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114399118","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51061
J. Brighton, D. Verret, T.T. Ten Eyck, M.T. Welch, R. E. McMann, M. Torreno, A. Appel, M. Keleher
Several issues encountered in scaling ExCL technology are discussed. It is shown that doping profile scaling below 0.15 mu m base width puts severe restrictions on process latitude. It is demonstrated that the polysilicon emitter resistance can be significantly reduced by rapid thermal annealing. Capacitance calculations show that interconnect-related parasitics do not scale below 3 mu m pitch, and intralevel coupling may provide the ultimate limitation of interconnect scaling. Finally, the ExCL metallization scheme is proven to be scalable to 2 mu m metal pitch.<>
{"title":"Scaling issues in the evolution of ExCL bipolar technology","authors":"J. Brighton, D. Verret, T.T. Ten Eyck, M.T. Welch, R. E. McMann, M. Torreno, A. Appel, M. Keleher","doi":"10.1109/BIPOL.1988.51061","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51061","url":null,"abstract":"Several issues encountered in scaling ExCL technology are discussed. It is shown that doping profile scaling below 0.15 mu m base width puts severe restrictions on process latitude. It is demonstrated that the polysilicon emitter resistance can be significantly reduced by rapid thermal annealing. Capacitance calculations show that interconnect-related parasitics do not scale below 3 mu m pitch, and intralevel coupling may provide the ultimate limitation of interconnect scaling. Finally, the ExCL metallization scheme is proven to be scalable to 2 mu m metal pitch.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123035334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51073
B. Tufte
A 1.25 mu m current mode logic (CML) bipolar standard cell library with subnanosecond loaded gate delays is discussed. Unique computer-aided design CAD tools that produce accurate models of the library cells and optimize designs for area, speed, and power are also discussed. The interplay between the library and the tools can produce higher speed, lower power chips, at less cost.<>
{"title":"CML III bipolar standard cell library","authors":"B. Tufte","doi":"10.1109/BIPOL.1988.51073","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51073","url":null,"abstract":"A 1.25 mu m current mode logic (CML) bipolar standard cell library with subnanosecond loaded gate delays is discussed. Unique computer-aided design CAD tools that produce accurate models of the library cells and optimize designs for area, speed, and power are also discussed. The interplay between the library and the tools can produce higher speed, lower power chips, at less cost.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122786710","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51076
F. Lindholm, B. Wu
Simulations using bipolar device simulators show that moderate injection can exist in heavily doped portions of a transistor base and that very high injection can exist throughout a current-extended or pushed out part of a quasineutral base layer of a high-speed digital device. Physical models now in bipolar device simulators neglect the dependence of the effective intrinsic density and the corresponding effective energy-gap contraction on high concentrations of mobile electrons and holes. Further they assume that the conduction-band and valence-band shifts are equal in magnitude and thus equal to half of the magnitude of the generalized electron-affinity contraction. New results from experiment and theory demonstrate the incompleteness of these physical models, and the engineering significance of this incompleteness is assessed.<>
{"title":"Energy-gap and electron-affinity contractions and their importance in bipolar device simulators","authors":"F. Lindholm, B. Wu","doi":"10.1109/BIPOL.1988.51076","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51076","url":null,"abstract":"Simulations using bipolar device simulators show that moderate injection can exist in heavily doped portions of a transistor base and that very high injection can exist throughout a current-extended or pushed out part of a quasineutral base layer of a high-speed digital device. Physical models now in bipolar device simulators neglect the dependence of the effective intrinsic density and the corresponding effective energy-gap contraction on high concentrations of mobile electrons and holes. Further they assume that the conduction-band and valence-band shifts are equal in magnitude and thus equal to half of the magnitude of the generalized electron-affinity contraction. New results from experiment and theory demonstrate the incompleteness of these physical models, and the engineering significance of this incompleteness is assessed.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125124807","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51068
M. Caggiano
A transmission line approach was employed in the design of the package for the laser driver. Two configurations were needed for routing the RF signal paths for the inputs and outputs. A modified microstrip, with ground shielding on both sides, was used to route the signal from the external lead to the central part of the package. A via, centered between two rows of ground vias, was used to route the signal path up to the chip level in the package. The results of electrical measurements performed on the four RF signal leads of the package are included. The measurements were made employing an HP-8510B network analyzer calibrated with a set of TRL fixtures. The results showed that the package would be good to 4.3 GHz for a return loss of -20 dB.<>
{"title":"Package design for a microwave laser driver","authors":"M. Caggiano","doi":"10.1109/BIPOL.1988.51068","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51068","url":null,"abstract":"A transmission line approach was employed in the design of the package for the laser driver. Two configurations were needed for routing the RF signal paths for the inputs and outputs. A modified microstrip, with ground shielding on both sides, was used to route the signal from the external lead to the central part of the package. A via, centered between two rows of ground vias, was used to route the signal path up to the chip level in the package. The results of electrical measurements performed on the four RF signal leads of the package are included. The measurements were made employing an HP-8510B network analyzer calibrated with a set of TRL fixtures. The results showed that the package would be good to 4.3 GHz for a return loss of -20 dB.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129626069","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51079
J. de Jong, R. Lane, J. de Groot, G. Conner
An advanced self-aligned high-speed bipolar transistor (HS4) with a polysilicon emitter is presented. The silicided external base region is separated from the polysilicon emitter by an oxide sidewall spacer. The effect of the spacer width and the dopant concentration underneath this spacer on the electron recombination current at the base contact is described.<>
{"title":"Electron recombination at the silicided base contact of an advanced self-aligned poly-silicon emitter","authors":"J. de Jong, R. Lane, J. de Groot, G. Conner","doi":"10.1109/BIPOL.1988.51079","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51079","url":null,"abstract":"An advanced self-aligned high-speed bipolar transistor (HS4) with a polysilicon emitter is presented. The silicided external base region is separated from the polysilicon emitter by an oxide sidewall spacer. The effect of the spacer width and the dopant concentration underneath this spacer on the electron recombination current at the base contact is described.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126593791","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51043
C.L. Williams, D.M. Kim, C. Clawson
Presented herein are the results of an experimental and theoretical investigation of the factors influencing the current gain of a polysilicon-emitter-contacted bipolar transistor (PEC transistor). Specifically, the temperature behavior of gain and its optimization are comprehensively discussed. The results show that the PEC transistor exhibits a stronger temperature dependence when compared with conventional transistors. This is attributed to the diffusion length of minority carriers (holes) in the polysilicon. The modeling of the gain (h/sub fe/) reveals that the mobility and the recombination lifetime of the minority carriers in the polysilicon are the key parameters for optimizing h/sub fe/ in PEC transistors.<>
{"title":"Optimization and temperature dependence of current gain in polysilicon-emitter-contacted bipolar transistors","authors":"C.L. Williams, D.M. Kim, C. Clawson","doi":"10.1109/BIPOL.1988.51043","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51043","url":null,"abstract":"Presented herein are the results of an experimental and theoretical investigation of the factors influencing the current gain of a polysilicon-emitter-contacted bipolar transistor (PEC transistor). Specifically, the temperature behavior of gain and its optimization are comprehensively discussed. The results show that the PEC transistor exhibits a stronger temperature dependence when compared with conventional transistors. This is attributed to the diffusion length of minority carriers (holes) in the polysilicon. The modeling of the gain (h/sub fe/) reveals that the mobility and the recombination lifetime of the minority carriers in the polysilicon are the key parameters for optimizing h/sub fe/ in PEC transistors.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127165085","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51049
T. Ngo, R. Hester
A three-stage operational amplifier has been designed and fabricated on a conventional process that achieves an unprecedented combination of performance for a precision operational amplifier. The amplifier provides high speed, wide bandwidth, precision DC characteristics, and high-output current drive capability. It also has the highest open-loop voltage gain and smallest chip size recorded for a precision op amp.<>
{"title":"A precision op amp with +/-80 mA output current, 200 v/usec slew rate, and a gain-bandwidth product of 0.7 GHz","authors":"T. Ngo, R. Hester","doi":"10.1109/BIPOL.1988.51049","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51049","url":null,"abstract":"A three-stage operational amplifier has been designed and fabricated on a conventional process that achieves an unprecedented combination of performance for a precision operational amplifier. The amplifier provides high speed, wide bandwidth, precision DC characteristics, and high-output current drive capability. It also has the highest open-loop voltage gain and smallest chip size recorded for a precision op amp.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127806408","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1988-09-12DOI: 10.1109/BIPOL.1988.51050
M. Metcalf
A monolithic JFET input comparator with performance that far exceeds any prior art has been designed on a semicustom IC. The use of the analog array provided benefits in design effort, manufacturing time and layout versatility without sacrificing excellence performance.<>
{"title":"JFET-input, high speed comparator standard cell designed on a new series of analog arrays","authors":"M. Metcalf","doi":"10.1109/BIPOL.1988.51050","DOIUrl":"https://doi.org/10.1109/BIPOL.1988.51050","url":null,"abstract":"A monolithic JFET input comparator with performance that far exceeds any prior art has been designed on a semicustom IC. The use of the analog array provided benefits in design effort, manufacturing time and layout versatility without sacrificing excellence performance.<<ETX>>","PeriodicalId":302949,"journal":{"name":"Proceedings of the 1988 Bipolar Circuits and Technology Meeting,","volume":"65 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1988-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128309002","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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