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2014 7th International Silicon-Germanium Technology and Device Meeting (ISTDM)最新文献

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Spin lifetime in strained silicon films 应变硅薄膜的自旋寿命
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874695
V. Sverdlov, D. Osintsev, S. Selberherr
The outstanding increase in performance of integrated circuits is facilitated and supported by the continuous miniaturization of CMOS components; however, growing technological challenges [1] and soaring costs are gradually expected to bring scaling to an end. This puts foreseeable limitations to the future performance increase, and research on alternative technologies and computational principles becomes paramount. The MOSFET, the main building block of modern integrated circuits, fundamentally operates by employing the charge degree of freedom of an electron. The electron charge interacts with the electrostatic field induced by the gate. The transistor channel can be closed or opened by creating or removing a gate induced potential barrier. Another intrinsic electron property, the electron spin, attracts much attention as a possible candidate for complimenting or even replacing the charge in future electron devices. The electron spin state is characterized by the two possible spin projections on a given axis and thus has potential in digital information processing. In addition, the small amount of energy needed to invert the spin orientation is attractive for low power applications.
集成电路性能的显著提高是由CMOS元件的持续小型化促进和支持的;然而,不断增长的技术挑战[1]和飙升的成本预计将逐渐终结规模化。这给未来的性能提升带来了可预见的限制,对替代技术和计算原理的研究变得至关重要。MOSFET是现代集成电路的主要组成部分,其基本原理是利用电子的电荷自由度来工作。电子电荷与栅极产生的静电场相互作用。晶体管通道可以通过产生或移除栅极感应电位势垒来关闭或打开。电子的另一个固有性质,电子自旋,作为补充甚至取代未来电子器件中电荷的可能候选,引起了人们的广泛关注。电子自旋态的特征是在给定轴上有两种可能的自旋投影,因此在数字信息处理中具有潜力。此外,反转自旋方向所需的少量能量对于低功率应用具有吸引力。
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引用次数: 0
Weak anti-localization behavior of high mobility 2D hole gas in a strained Ge QW heterostructure 应变锗量子阱异质结构中高迁移率二维空穴气体的弱反局域行为
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874644
J. Foronda, C. Morrison, M. Myronov, J. Halpin, S. Rhead, D. Leadley
We have measured the low temperature and low field MR of a high mobility Ge 2DHG. The resulting MR curves demonstrate WL-like behavior at temperatures below 2K with WAL-like behavior appearing between 3K and 12K. Evidence of WAL has not been previously observed in Ge. We believe this transition to be the result of a summation of WL and WAL effects in the main conduction channel and parallel conduction channel(s).This is a promising result for Ge as a possible channel for future spin-FETs.
我们测量了高迁移率g2dhg的低温低场磁流变。所得MR曲线在低于2K的温度下表现出类似wl的行为,在3K和12K之间表现出类似wall的行为。以前没有在Ge中观察到WAL的证据。我们认为这种转变是主传导通道和平行传导通道中WL和WAL效应叠加的结果。这对于Ge作为未来自旋场效应管的可能通道是一个很有希望的结果。
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引用次数: 0
Growth and crystalline properties of Ge1−x−ySnxCy ternary alloy thin films on Ge(001) substrate Ge1−x−ySnxCy三元合金薄膜在Ge(001)衬底上的生长和结晶性能
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874666
K. Terasawa, T. Yamaha, M. Kurosawa, W. Takeuchi, N. Taoka, O. Nakatsuka, E. Kamiyama, R. Matsutani, R. Suwa, K. Kashima, K. Izunome, K. Sueoka, S. Zaima
We achieved the world's first epitaxial growth of a Ge1-x-ySnxCy layer, and investigated the effect of Sn incorporation on the growth of Ge1-xCx. Sn incorporation can decrease the epitaxial temperature of Ge1-xCx layer. Also, Sn incorporation can make C atoms stable at the substitutional site. This Ge1-x-ySnxCy layer is expected to realize the energy band engineering independently on the lattice parameter and promises to extend the potential of group-IV semiconductor materials for nanoelectronics and optoelectronic applications.
我们实现了世界上第一个Ge1-x-ySnxCy层的外延生长,并研究了Sn掺入对Ge1-xCx生长的影响。Sn的掺入可以降低Ge1-xCx层的外延温度。此外,Sn的掺入可以使C原子在取代位点稳定。该Ge1-x-ySnxCy层有望在晶格参数上独立实现能带工程,并有望扩展iv族半导体材料在纳米电子和光电子应用中的潜力。
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引用次数: 3
Quantum transport of a high mobility two dimensional hole gas in a strained Ge quantum well 应变锗量子阱中高迁移率二维空穴气体的量子输运
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874636
C. Morrison, M. Myronov, J. Foronda, C. Casteleiro, J. Halpin, S. Rhead, D. Leadley
A high mobility (780,000 cm2/Vs) 2DHG has been created in a strained Ge quantum well structure, through B modulation doping. The mobility and carrier density were measured through Hall effect measurements at temperatures between 0.3 K and 300 K, revealing a low temperature carrier density of 2×1011cm-2. Low temperature magnetoresistance measurements show a complex, multiple frequency oscillatory behavior in the SdH oscillations for this modulation doped quantum well. This may be attributed to oscillations from carriers in other layers in the heterostructure superimposed on the oscillations due to transport in the quantum well, due to parallel conduction.
通过B调制掺杂,在应变Ge量子阱结构中产生了高迁移率(780,000 cm2/Vs)的2DHG。在0.3 K ~ 300 K的温度范围内,通过霍尔效应测量了载流子密度和迁移率,得到了低温载流子密度2×1011cm-2。低温磁阻测量表明,该调制掺杂量子阱的SdH振荡具有复杂的多频振荡行为。这可能归因于异质结构中其他层的载流子的振荡,这些载流子叠加在量子阱中由平行传导引起的输运振荡上。
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引用次数: 0
Tensile strain mapping in flat germanium membranes 平面锗膜的拉伸应变映射
S. Rhead, V. Shah, J. Halpin, M. Myronov, D. Patchett, P. Allred, V. Kachkanov, I. Dolbnya, N. Wilson, D. Leadley
The membranes have the potential to be excellent growth and integration platforms: compared to bulk Ge epitaxially grown on Si (001) they are perfectly flat and XRD and PV-TEM confirm the misfit dislocation network has been removed. The strain profile across the membrane is symmetrical and the membrane is slightly more tensile strained than the bulk material. The difference in strain across the membrane is too small to create a large variation in optical device performance across the entire membrane. Coupled with the smoother surface and absence of misfit dislocation network compared to the bulk material, the membranes are both excellent strain tuning platforms for optical applications and, more generally, for growth of subsequent active layers.
该膜具有成为优异生长和集成平台的潜力:与在Si(001)上外延生长的块状Ge相比,它们非常平坦,XRD和PV-TEM证实了错配位错网络已经被去除。膜上的应变分布是对称的,膜的拉伸应变略大于体材。跨膜的应变差异太小,不能在整个膜上产生光学器件性能的大变化。再加上与块状材料相比,表面更光滑,没有错配位错网络,这些膜都是光学应用的优秀应变调谐平台,更普遍的是,用于后续活性层的生长。
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引用次数: 13
Growth and interface engineering of highly strained low bandgap group IV semiconductors 高应变低带隙IV族半导体的生长与界面工程
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874645
S. Wirths, M. Pampillón, E. San Andrés, D. Stange, A. Tiedemann, G. Mussler, A. Fox, U. Breuer, J. Hartmann, S. Mantl, D. Buca
Highly tensile strained Ge(Sn) layers epitaxially grown on GeSn strain relaxed buffer layer have been presented. Electrical characterization exhibits good interfacial quality of the high-k gate stacks employing HfO2 on Ge and strained Ge. These results mark a first step towards electronic device integration of low bandgap highly tensely strained group IV semiconductors.
在GeSn应变松弛缓冲层上外延生长出高拉伸应变的Ge(Sn)层。电学表征表明,在锗和应变锗上使用HfO2的高k栅极堆具有良好的界面质量。这些结果标志着向低带隙高张力IV族半导体电子器件集成迈出了第一步。
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引用次数: 1
Atomic-scale planarization of Ge (111), (110) and (100) surfaces Ge(111)、(110)和(100)表面的原子尺度平面化
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874698
T. Nishimura, C. Lee, T. Yajima, K. Nagashio, A. Toriumi
The Ge surfaces are planarized in H2 annealing with atomically flat manner on (110) and (100) surfaces in addition to that on (111) surface. The terrace widths on (111) and (110) are almost controlled by the off-angle of the initial surface. The low thermal budget of 500°C in H2 to form the atomically flat surface is advantageous for the device fabrication on Ge (111) and (110) surfaces, because these surface orientations fortunately are expected to facilitate the high electron and hole mobility for n- and p-FETs, respectively.
在H2退火中,除(111)表面外,(110)和(100)表面上的Ge表面以原子平坦的方式平面化。(111)和(110)的阶地宽度几乎由初始表面的离角控制。在H2中形成原子平面的500°C的低热平衡对于在Ge(111)和Ge(110)表面上制造器件是有利的,因为幸运的是,这些表面取向有望分别促进n-和p-场效应管的高电子和空穴迁移率。
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引用次数: 0
Automated Micro Hall Effect measurements 自动微霍尔效应测量
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874677
D. H. Petersen, H. H. Henrichsen, R. Lin, P. Nielsen, O. Hansen
With increasing complexity of processes and variety of materials used for semiconductor devices, stringent control of the electronic properties is becoming ever more relevant. Collinear micro four-point probe (M4PP) based measurement systems have become high-end metrology methods for characterization and monitoring of sheet resistance as well as sheet carrier density and mobility via the Micro Hall Effect (MHE) method.
随着半导体器件的工艺复杂性和材料种类的增加,对电子性能的严格控制变得越来越重要。基于共线微四点探头(M4PP)的测量系统已经成为通过微霍尔效应(MHE)方法表征和监测薄片电阻以及薄片载流子密度和迁移率的高端计量方法。
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引用次数: 0
III/V layer growth on Si and Ge surfaces for direct wafer bonding as a path for hybrid CMOS 在Si和Ge表面生长III/V层作为混合CMOS的直接晶圆键合路径
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874703
E. Uccelli, N. Daix, L. Czornomaz, D. Caimi, C. Rossel, M. Sousa, H. Siegwart, C. Marchiori, J. Hartmann, J. Fompeyrine
As Si-CMOS scaling has become increasingly challenging, III-V compound semiconductors such as InxGa1-xAs (x≥0.53) (InGaAs) are receiving much interest as channel material for nFET [1,2]. Together with SiGe as a pFET channel, they are considered as potential candidates to replace silicon for low power, high performance CMOS thanks to their better transport properties. A prerequisite in view of integration at VLSI scale is the formation of high quality III-V heterostructures on a silicon substrate to enable production on large size wafers.
随着Si-CMOS缩放变得越来越具有挑战性,III-V化合物半导体,如InxGa1-xAs (x≥0.53)(InGaAs)作为nfeet的通道材料受到越来越多的关注[1,2]。与SiGe一起作为pet通道,由于其更好的传输特性,它们被认为是取代低功耗,高性能CMOS硅的潜在候选者。考虑到VLSI规模集成的先决条件是在硅衬底上形成高质量的III-V异质结构,以便在大尺寸晶圆上生产。
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引用次数: 2
Observation of in situ B-doped Epitaxial Ge layer growth on Si(111) by ultra-high vacuum chemical vapor deposition 超高真空化学气相沉积法在Si(111)上原位生长掺b外延Ge层的观察
Pub Date : 2014-06-02 DOI: 10.1109/ISTDM.2014.6874662
Byongju Kim, H. Jang, D. Byeon, Sangmo Koo, D. Ko
In situ B-doped epitaxial Ge layers were grown on a Si(111) substrate using UHV CVD for the application to S/D regions of pMOS devices. The Ge surface evolution with the deposition time, showing (111) terrace structures, were influenced by the B2H6 flow rate.
在Si(111)衬底上用UHV CVD生长了原位掺b外延Ge层,用于pMOS器件的S/D区。Ge表面随沉积时间的演化受B2H6流量的影响,表现为阶地结构。
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2014 7th International Silicon-Germanium Technology and Device Meeting (ISTDM)
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