Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387145
Yung-Shou Jeng, Wei-Da Guo, G. Shiue, Chien-Min Lin, R. Wu
Based on the concept of impedance matching, this paper presents a novel design method that can efficiently achieve the least reflection noise for differentia-via transitions. The relation between the effective via-impedance and the physical dimension is well approximated by a three-layer neural network. In use of the full-wave simulation, the time-domain reflectometry waveform is also acquired to confirm the accuracy of the proposed approach.
{"title":"Reflectionless Design for Differential-Via Transitions Using Neural Network-Based Approach","authors":"Yung-Shou Jeng, Wei-Da Guo, G. Shiue, Chien-Min Lin, R. Wu","doi":"10.1109/EPEP.2007.4387145","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387145","url":null,"abstract":"Based on the concept of impedance matching, this paper presents a novel design method that can efficiently achieve the least reflection noise for differentia-via transitions. The relation between the effective via-impedance and the physical dimension is well approximated by a three-layer neural network. In use of the full-wave simulation, the time-domain reflectometry waveform is also acquired to confirm the accuracy of the proposed approach.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115096684","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387157
R. Schmitt, H. Lan, C. Madden, C. Yuan
Minimizing the jitter due to supply noise is the most important design goal for the power delivery system of highspeed interfaces. We present a detailed analysis of supply noise induced jitter in a high-speed interface. We first simulate the supply noise spectrum generated in the interface. We then measure the sensitivity of the interface circuits to noise as a function of noise frequency. Next, we analyze the jitter spectrum by combining these two parameters. Based on this analysis, we observe large jitter contributions at medium frequencies. This is not expected if we consider only the supply noise current spectrum since the medium frequency is way below the data rate or the frequencies of internal clock signals. However, it can be easily explained with the power supply network impedance profile. Finally, we correlate the predicted jitter spectrum with the measured jitter spectrum of a serial link operating at 6.4 Gbps.
{"title":"Investigating the Impact of Supply Noise on the Jitter in Gigabit I/O Interfaces","authors":"R. Schmitt, H. Lan, C. Madden, C. Yuan","doi":"10.1109/EPEP.2007.4387157","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387157","url":null,"abstract":"Minimizing the jitter due to supply noise is the most important design goal for the power delivery system of highspeed interfaces. We present a detailed analysis of supply noise induced jitter in a high-speed interface. We first simulate the supply noise spectrum generated in the interface. We then measure the sensitivity of the interface circuits to noise as a function of noise frequency. Next, we analyze the jitter spectrum by combining these two parameters. Based on this analysis, we observe large jitter contributions at medium frequencies. This is not expected if we consider only the supply noise current spectrum since the medium frequency is way below the data rate or the frequencies of internal clock signals. However, it can be easily explained with the power supply network impedance profile. Finally, we correlate the predicted jitter spectrum with the measured jitter spectrum of a serial link operating at 6.4 Gbps.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133878161","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387132
William E. McKinzie
A new type of hybrid electromagnetic bandgap (EBG) structure is proposed for noise suppression in a power distribution network (PDN) where each unit cell contains the combined features of series surface mounted technology (SMT) inductors and at least one SMT decoupling capacitor as a shunt load. An example is shown where effective noise suppression is demonstrated to cover a frequency range of near 25 MHz to at least 10 GHz.
{"title":"A Hybrid Electromagnetic Bandgap (EBG) Power Plane with Discrete Inductors for Broadband Noise Suppression","authors":"William E. McKinzie","doi":"10.1109/EPEP.2007.4387132","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387132","url":null,"abstract":"A new type of hybrid electromagnetic bandgap (EBG) structure is proposed for noise suppression in a power distribution network (PDN) where each unit cell contains the combined features of series surface mounted technology (SMT) inductors and at least one SMT decoupling capacitor as a shunt load. An example is shown where effective noise suppression is demonstrated to cover a frequency range of near 25 MHz to at least 10 GHz.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114229885","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387140
M. J. Choi, V. Pandit, W. Ryu
SI-PD co-modeling, co-simulation, and system response optimization are demonstrated that employ passive modeling of signals and power delivery networks to optimize the system response. Decomposition of the system response and system optimization examples are introduced as well.
{"title":"SI-PD Co-simulation and Co-design Methodology for High Speed Channel","authors":"M. J. Choi, V. Pandit, W. Ryu","doi":"10.1109/EPEP.2007.4387140","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387140","url":null,"abstract":"SI-PD co-modeling, co-simulation, and system response optimization are demonstrated that employ passive modeling of signals and power delivery networks to optimize the system response. Decomposition of the system response and system optimization examples are introduced as well.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"221 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115104734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387153
Zhenan Zhou, K. Melde
This paper presents a method to create broadband material models for microstrip using measurements and simulations. A closed-form equation is used to solve for the real part of the permittivity from the measured propagation constant. The Debye equation is used to relate the imaginary part of the permittivity to the real part.
{"title":"Physically-Consistent Broadband Material Model Generation for Microstrip Transmission Lines","authors":"Zhenan Zhou, K. Melde","doi":"10.1109/EPEP.2007.4387153","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387153","url":null,"abstract":"This paper presents a method to create broadband material models for microstrip using measurements and simulations. A closed-form equation is used to solve for the real part of the permittivity from the measured propagation constant. The Debye equation is used to relate the imaginary part of the permittivity to the real part.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122265643","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387108
W. Lambert, R. Ayyanar
CPU generated loads useful for analysis and characterization of microprocessor power delivery networks are described along with potential applications. The loads are generated by a functional microprocessor operating in PLL BYPASS mode.
{"title":"CPU Generated Binary and Ternary Loads for Power Delivery Assessment","authors":"W. Lambert, R. Ayyanar","doi":"10.1109/EPEP.2007.4387108","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387108","url":null,"abstract":"CPU generated loads useful for analysis and characterization of microprocessor power delivery networks are described along with potential applications. The loads are generated by a functional microprocessor operating in PLL BYPASS mode.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"333 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124697857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387120
Y. Mekonnen, J. Schutt-Ainé
The vector-fitting algorithm has been used as the main macromodeling tool for approximating frequency domain responses of complex interconnects and electrical packages [5]. In this paper, a new methodology is proposed to fit transfer functions of frequency or time response data obtained from numerical electromagnetic simulation or measured frequency-domain or time-domain response data. This new method, z-domain vector-fitting (ZDVF), is a formulation of vector-fitting method in the z domain; it has an advantage of faster convergence and better numerical stability compared to the s-domain vector-fitting method (VF). The fast convergence of the method reduces the overall macromodel generation time. The accuracy, numerical stability and convergence speed of VF and ZDVF are compared. Examples are provided to demonstrate the advantage of the ZDVF.
{"title":"Fast Macromodeling Technique of Sampled Time/Frequency Data Using z-domain Vector-Fitting Method","authors":"Y. Mekonnen, J. Schutt-Ainé","doi":"10.1109/EPEP.2007.4387120","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387120","url":null,"abstract":"The vector-fitting algorithm has been used as the main macromodeling tool for approximating frequency domain responses of complex interconnects and electrical packages [5]. In this paper, a new methodology is proposed to fit transfer functions of frequency or time response data obtained from numerical electromagnetic simulation or measured frequency-domain or time-domain response data. This new method, z-domain vector-fitting (ZDVF), is a formulation of vector-fitting method in the z domain; it has an advantage of faster convergence and better numerical stability compared to the s-domain vector-fitting method (VF). The fast convergence of the method reduces the overall macromodel generation time. The accuracy, numerical stability and convergence speed of VF and ZDVF are compared. Examples are provided to demonstrate the advantage of the ZDVF.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125426692","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387179
K. Payandehjoo, D. Kostka, R. Abhari
Multiconductor transmission line theory (MTL) is employed in modeling of multilayer power distribution networks. This approach is utilized to predict the impedance profile of a mesh-based PDN at various port locations and results are verified by IBM's EIP tool. EIP is also employed to predict the current distribution on the grid and to simplify the MTL model.
{"title":"Analysis of Power Distribution Networks using Multiconductor Transmission Line Theory","authors":"K. Payandehjoo, D. Kostka, R. Abhari","doi":"10.1109/EPEP.2007.4387179","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387179","url":null,"abstract":"Multiconductor transmission line theory (MTL) is employed in modeling of multilayer power distribution networks. This approach is utilized to predict the impedance profile of a mesh-based PDN at various port locations and results are verified by IBM's EIP tool. EIP is also employed to predict the current distribution on the grid and to simplify the MTL model.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128882637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387166
T. Demeester, D. De Zutter
On-chip conductors have a finite thickness and are often composed of different metals. An efficient method to model the broadband resistive and inductive behaviour of such conductors is derived and applied to a few illustrative configurations.
{"title":"Modeling of the Resistive and Inductive Behaviour of Layered and Coated Conductors","authors":"T. Demeester, D. De Zutter","doi":"10.1109/EPEP.2007.4387166","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387166","url":null,"abstract":"On-chip conductors have a finite thickness and are often composed of different metals. An efficient method to model the broadband resistive and inductive behaviour of such conductors is derived and applied to a few illustrative configurations.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132617937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-11-21DOI: 10.1109/EPEP.2007.4387116
D. Oh, F. Lambrecht, Jihong Ren, Sam Chang, B. Chia, C. Madden, C. Yuan
Conventional ways of summing component specifications to balance voltage and timing budgets are increasingly problematic as data rates continue to scale higher for high speed links. For instance, performance degradation caused by transmitter jitter is more severe than that caused by receiver jitter due to jitter coloring by the passive channel. Furthermore, certain jitter components could interact in the system so it is inaccurate to treat them as independent variables. A system voltage and timing budgeting process hence requires a sophisticated method to accurately predict the overall system performance based on the component specifications. With the recent introduction of a statistical CAD tool, the impact of each individual component, including both deterministic and random jitter, can be co-simulated [l]-[3]. This paper demonstrates the usage of this statistical CAD tool for modeling component budgets. We verify the accuracy of our modeling approach by correlating with a FlexIOreg parallel link interface. Then, we apply the proposed methodology to a PCI Expressreg bus system to estimate the system performance based on published component jitter specification.
{"title":"Prediction of System Performance Based on Component Jitter and Noise Budgets","authors":"D. Oh, F. Lambrecht, Jihong Ren, Sam Chang, B. Chia, C. Madden, C. Yuan","doi":"10.1109/EPEP.2007.4387116","DOIUrl":"https://doi.org/10.1109/EPEP.2007.4387116","url":null,"abstract":"Conventional ways of summing component specifications to balance voltage and timing budgets are increasingly problematic as data rates continue to scale higher for high speed links. For instance, performance degradation caused by transmitter jitter is more severe than that caused by receiver jitter due to jitter coloring by the passive channel. Furthermore, certain jitter components could interact in the system so it is inaccurate to treat them as independent variables. A system voltage and timing budgeting process hence requires a sophisticated method to accurately predict the overall system performance based on the component specifications. With the recent introduction of a statistical CAD tool, the impact of each individual component, including both deterministic and random jitter, can be co-simulated [l]-[3]. This paper demonstrates the usage of this statistical CAD tool for modeling component budgets. We verify the accuracy of our modeling approach by correlating with a FlexIOreg parallel link interface. Then, we apply the proposed methodology to a PCI Expressreg bus system to estimate the system performance based on published component jitter specification.","PeriodicalId":402571,"journal":{"name":"2007 IEEE Electrical Performance of Electronic Packaging","volume":"89 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2007-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126473844","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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