Pub Date : 2024-01-30DOI: 10.1109/TNANO.2024.3360312
Manoj Kumar;Ming-Hung Wu;Tuo-Hung Hou;Manan Suri
We propose a Non-Volatile Ternary Content Addressable Memory (nvTCAM) by utilizing two Resistive Random-Access Memory (RRAM) cells integrated with individual selector transistors (i.e., 2-Transistor, 2-RRAM). A 2T2R cell configured either in complementary resistive switching mode (i.e., if one 1T1R cell is in low resistance state then the other cell will be in high resistance state or vice-versa) or both RRAMs in high resistance state is utilized to implement a single nvTCAM unit. Through Monte-Carlo (MC) simulations and power supply scaling (i.e., $V_{DD}$