Pub Date : 2024-03-03DOI: 10.1109/TNANO.2024.3396505
Sameh O. Abdellatif;Hana Mosalam;Salma A. Hussien
As the interest in human health and customized medicine has grown recently, many researchers' investigations have concentrated on biosensors to develop a cost-effective device for sensing different medical parameters. Among the wide range of organic electronic devices, organic field effect transistor (OFET) has been used in manufacturing flexible biosensors due to their light weight, flexibility, and lower energy usage. In this study, a carrier transport electronic model, verified with experimental data, simulates the biosensing process in two different biosensors: lactate and troponin. Initially, a random forest machine learning model was used to optimize the OFET device with a new figure of merit. Consequently, the sensor's sensitivity and limit of detection were calculated. Two active layers were investigated: polyaniline and pentacene, where the polyaniline showed better sensitivity for lactate biosensor 220 (nM) -1 and troponin 484 (g/ml) -1 . Moreover, the polyaniline recorded nearly ten times lower power consumption because of its extremely low threshold voltage of -170 mV.
{"title":"Experimentally Verified Effective Doping Model for Lactate and Troponin OFET Biosensors Using Machine Learning Algorithm","authors":"Sameh O. Abdellatif;Hana Mosalam;Salma A. Hussien","doi":"10.1109/TNANO.2024.3396505","DOIUrl":"10.1109/TNANO.2024.3396505","url":null,"abstract":"As the interest in human health and customized medicine has grown recently, many researchers' investigations have concentrated on biosensors to develop a cost-effective device for sensing different medical parameters. Among the wide range of organic electronic devices, organic field effect transistor (OFET) has been used in manufacturing flexible biosensors due to their light weight, flexibility, and lower energy usage. In this study, a carrier transport electronic model, verified with experimental data, simulates the biosensing process in two different biosensors: lactate and troponin. Initially, a random forest machine learning model was used to optimize the OFET device with a new figure of merit. Consequently, the sensor's sensitivity and limit of detection were calculated. Two active layers were investigated: polyaniline and pentacene, where the polyaniline showed better sensitivity for lactate biosensor 220 (nM)\u0000<sup>-1</sup>\u0000 and troponin 484 (g/ml)\u0000<sup>-1</sup>\u0000. Moreover, the polyaniline recorded nearly ten times lower power consumption because of its extremely low threshold voltage of -170 mV.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"415-421"},"PeriodicalIF":2.4,"publicationDate":"2024-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140834681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We investigated the electrical and material characteristics of atomic layer deposition (ALD) deposition with different sequences and concentrations of HfAlO x in Indium-Tungsten-Oxide thin film transistors (IWO-TFTs). Under the 1A10H case, we observed the best electrical properties, with threshold voltage (Vt) closest to 0 V, Ion/Ioff value of approximately 6.7 × 107, subthreshold swing (SS) of 95 mV/dec, smaller interface trap density (Nit) of 5.7 × 1012 cm −2 , and superior immunity to stress-induced degradation. The X-ray photoelectron spectroscopy (XPS) results provided insights into the stability of the interface between the gate dielectric layer and the channel layer. Specifically, the 1A10H conditions exhibited a more stable interface with fewer defects. Furthermore, the choice of HfO 2 as the interface layer material between HfAlO x and IWO, compared to Al 2 O 3 , demonstrated superior performance for different Hf/Al sequence combinations. These findings offer promising directions for enhancing the stability of IWO-TFTs through improvements in the interface between the channel layer and the gate dielectric layer.
{"title":"Effect of Electrical Performance and Reliability by Adjustment of the Sequence and Concentration of HfAlOx on IWO Thin-Film Transistors","authors":"Yi-Xuan Chen;Fu-Jyuan Li;Yi-Lin Wang;Meng-Chien Lee;Hui-Hsuan Li;Yu-Hsien Lin;Chao-Hsin Chien","doi":"10.1109/TNANO.2024.3396502","DOIUrl":"10.1109/TNANO.2024.3396502","url":null,"abstract":"We investigated the electrical and material characteristics of atomic layer deposition (ALD) deposition with different sequences and concentrations of HfAlO\u0000<sub>x</sub>\u0000 in Indium-Tungsten-Oxide thin film transistors (IWO-TFTs). Under the 1A10H case, we observed the best electrical properties, with threshold voltage (Vt) closest to 0 V, Ion/Ioff value of approximately 6.7 × 107, subthreshold swing (SS) of 95 mV/dec, smaller interface trap density (Nit) of 5.7 × 1012 cm\u0000<sup>−2</sup>\u0000, and superior immunity to stress-induced degradation. The X-ray photoelectron spectroscopy (XPS) results provided insights into the stability of the interface between the gate dielectric layer and the channel layer. Specifically, the 1A10H conditions exhibited a more stable interface with fewer defects. Furthermore, the choice of HfO\u0000<sub>2</sub>\u0000 as the interface layer material between HfAlO\u0000<sub>x</sub>\u0000 and IWO, compared to Al\u0000<sub>2</sub>\u0000O\u0000<sub>3</sub>\u0000, demonstrated superior performance for different Hf/Al sequence combinations. These findings offer promising directions for enhancing the stability of IWO-TFTs through improvements in the interface between the channel layer and the gate dielectric layer.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"422-426"},"PeriodicalIF":2.4,"publicationDate":"2024-03-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140834766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-01DOI: 10.1109/TNANO.2024.3395986
Rajesh C. Junghare;Ganesh C. Patil
In this work, comprehensive analysis of Schottky barrier (SB) field effect transistors (FETs) having 2D mono-elemental (X-enes) nanoribbon (NR) with width of 10 dimers along the armchair direction as a channel material has been carried out. The multi-scale approach used for simulating the hydrogen passivated X-ene NR SBFETs consists of density functional theory (DFT), Wannier function based tight binding and the non-equilibrium Green's Function formalism (NEGF). The derived bandgaps for X-enes such as graphene, germanene, phosphorene and silicene are 1.27, 0.379, 1.036 and 0.431 eV respectively. To incorporate the effect of band-bending at the metal-X-ene interface the modification in the conventional multi-scale approach has also been proposed. To mimic the effect of band bending at metal-X-ene interface the schemes proposed in the model are, addition of equivalent channel potential energy in the Hamiltonian matrix and the addition of fixed charges in initial charge profile. Further, the impact of SB width, Fermi level pinning and the scattering on the device performance has also been explored. The results show that the on-state drive current-to-off-state leakage current ratio in the case of graphene and phosphorene SBFETs is up-to the order ∼10 7 whereas for silicene and germanene SBFETs it is in the order of ∼10 3 .
{"title":"Performance Comparison of 2D Mono-Elemental (X-enes) Armchair Nanoribbon Schottky Barrier Field Effect Transistors","authors":"Rajesh C. Junghare;Ganesh C. Patil","doi":"10.1109/TNANO.2024.3395986","DOIUrl":"10.1109/TNANO.2024.3395986","url":null,"abstract":"In this work, comprehensive analysis of Schottky barrier (SB) field effect transistors (FETs) having 2D mono-elemental (X-enes) nanoribbon (NR) with width of 10 dimers along the armchair direction as a channel material has been carried out. The multi-scale approach used for simulating the hydrogen passivated X-ene NR SBFETs consists of density functional theory (DFT), Wannier function based tight binding and the non-equilibrium Green's Function formalism (NEGF). The derived bandgaps for X-enes such as graphene, germanene, phosphorene and silicene are 1.27, 0.379, 1.036 and 0.431 eV respectively. To incorporate the effect of band-bending at the metal-X-ene interface the modification in the conventional multi-scale approach has also been proposed. To mimic the effect of band bending at metal-X-ene interface the schemes proposed in the model are, addition of equivalent channel potential energy in the Hamiltonian matrix and the addition of fixed charges in initial charge profile. Further, the impact of SB width, Fermi level pinning and the scattering on the device performance has also been explored. The results show that the on-state drive current-to-off-state leakage current ratio in the case of graphene and phosphorene SBFETs is up-to the order ∼10\u0000<sup>7</sup>\u0000 whereas for silicene and germanene SBFETs it is in the order of ∼10\u0000<sup>3</sup>\u0000.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"408-414"},"PeriodicalIF":2.4,"publicationDate":"2024-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140834765","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-29DOI: 10.1109/TNANO.2024.3371582
Donghyun Ryu;Junsu Yu;Woo Young Choi
Reverse charge injection (RCI) dual-gate synaptic transistors and their effective weight update method are proposed. First, the structural features of the proposed RCI dual-gate synaptic transistors are discussed in comparison with our previous work. Second, the weight update efficiency of the proposed synaptic transistors is discussed by analyzing the coupling capacitance components, which determine the electric field distribution across the tunneling and blocking oxides. Consequently, the program voltage and pulse width are reduced by 56.4% and 99.0%, respectively. The power consumption for the weight update operation is lowered by 99.6%. In addition, the anti-back-tunneling effect resulting from the low erase voltage is discussed. Third, the weight update conditions of the proposed synaptic transistors are optimized by adjusting the bottom gate length. Fourth, the proposed synaptic transistors implement 16 stable states (32 states with inhibitory synapses) and a fairly linear weight update by using both the increment step pulse program (ISPP) and increment step pulse erase (ISPE). Finally, the PGM/ERS operation of target cell and inhibit operation of surrounding cells are verified in RCI dual-gate synaptic transistor-based 2 × 2 NOR-type array.
{"title":"Reverse Charge Injection Dual-Gate Synaptic Transistors for Effective Weight Update","authors":"Donghyun Ryu;Junsu Yu;Woo Young Choi","doi":"10.1109/TNANO.2024.3371582","DOIUrl":"10.1109/TNANO.2024.3371582","url":null,"abstract":"Reverse charge injection (RCI) dual-gate synaptic transistors and their effective weight update method are proposed. First, the structural features of the proposed RCI dual-gate synaptic transistors are discussed in comparison with our previous work. Second, the weight update efficiency of the proposed synaptic transistors is discussed by analyzing the coupling capacitance components, which determine the electric field distribution across the tunneling and blocking oxides. Consequently, the program voltage and pulse width are reduced by 56.4% and 99.0%, respectively. The power consumption for the weight update operation is lowered by 99.6%. In addition, the anti-back-tunneling effect resulting from the low erase voltage is discussed. Third, the weight update conditions of the proposed synaptic transistors are optimized by adjusting the bottom gate length. Fourth, the proposed synaptic transistors implement 16 stable states (32 states with inhibitory synapses) and a fairly linear weight update by using both the increment step pulse program (ISPP) and increment step pulse erase (ISPE). Finally, the PGM/ERS operation of target cell and inhibit operation of surrounding cells are verified in RCI dual-gate synaptic transistor-based 2 × 2 NOR-type array.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"217-222"},"PeriodicalIF":2.4,"publicationDate":"2024-02-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140006214","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-27DOI: 10.1109/TNANO.2024.3370717
R. Rajasekar
A novel photonic crystal nanoresonator-based optical bandpass filter is designed with ultra narrow bandwidth, high quality factor, low optical loss and very small compact size. The proposed S-Shaped nanostructure is playing a very significant role on narrow wavelength filtering and effectively localize the incident light signal which leads to the high-quality factor is obtained with 100% transmission. The different light coupling mechanism is used to realize the four dissimilar narrow bandpass filters. These nano-filter performance parameters are numerically investigated by Finite Difference Time Domain Method (FDTD). The nanoresonator coupled waveguides platform is designed with high quality factor as about 3873.70, ultra narrow bandwidth of 60 GHz and 0.13 THz. The presented photonics platform footprint is very compact as about 128.52 μm 2 . These enhanced results highly suitable for optical integrated circuits, 5G and 6G optical wireless network.
{"title":"Numerical Investigation of Nanoresonator Based Ultra Narrow-Band Photonic Filters","authors":"R. Rajasekar","doi":"10.1109/TNANO.2024.3370717","DOIUrl":"10.1109/TNANO.2024.3370717","url":null,"abstract":"A novel photonic crystal nanoresonator-based optical bandpass filter is designed with ultra narrow bandwidth, high quality factor, low optical loss and very small compact size. The proposed S-Shaped nanostructure is playing a very significant role on narrow wavelength filtering and effectively localize the incident light signal which leads to the high-quality factor is obtained with 100% transmission. The different light coupling mechanism is used to realize the four dissimilar narrow bandpass filters. These nano-filter performance parameters are numerically investigated by Finite Difference Time Domain Method (FDTD). The nanoresonator coupled waveguides platform is designed with high quality factor as about 3873.70, ultra narrow bandwidth of 60 GHz and 0.13 THz. The presented photonics platform footprint is very compact as about 128.52 μm\u0000<sup>2</sup>\u0000. These enhanced results highly suitable for optical integrated circuits, 5G and 6G optical wireless network.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"188-194"},"PeriodicalIF":2.4,"publicationDate":"2024-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140006152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-27DOI: 10.1109/TNANO.2024.3370098
Hao Ding;Lan Chen;Wentao Huang
Carbon nanotube field-effect transistors (CNFETs) possess high current density and carrier mobility, enabling high intrinsic gains below the 20-nm technology node. Thus, they demonstrate superior performance compared to traditional silicon analog integrated circuits (ICs). Here, the relevant parameters of a CNFET in analog IC designs were analyzed and simulated, elucidating the influence of physical parameters on the CNFET device. All simulations were performed at technology nodes smaller than 22 nm. To evaluate the performance of a CNFET analog circuit, the g m /I d method for CNFET was employed, and a nanoscale two-stage operational amplifier was designed using complementary CNFET technology with a channel length of 14 nm. In addition, the impact of CNFET's physical parameters on circuit performance were examined. Our results showcased the advantages of CNFET analog circuits over traditional silicon-based analog circuits, as well as the significant influence of CNFET physical parameters on circuit performance. Consequently, this study provides a reference for productive CNFET technologies.
{"title":"Optimization of a Nanoscale Operational Amplifier Based on a Complementary Carbon Nanotube Field-Effect Transistor by Adjusting Physical Parameters","authors":"Hao Ding;Lan Chen;Wentao Huang","doi":"10.1109/TNANO.2024.3370098","DOIUrl":"10.1109/TNANO.2024.3370098","url":null,"abstract":"Carbon nanotube field-effect transistors (CNFETs) possess high current density and carrier mobility, enabling high intrinsic gains below the 20-nm technology node. Thus, they demonstrate superior performance compared to traditional silicon analog integrated circuits (ICs). Here, the relevant parameters of a CNFET in analog IC designs were analyzed and simulated, elucidating the influence of physical parameters on the CNFET device. All simulations were performed at technology nodes smaller than 22 nm. To evaluate the performance of a CNFET analog circuit, the g\u0000<sub>m</sub>\u0000/I\u0000<sub>d</sub>\u0000 method for CNFET was employed, and a nanoscale two-stage operational amplifier was designed using complementary CNFET technology with a channel length of 14 nm. In addition, the impact of CNFET's physical parameters on circuit performance were examined. Our results showcased the advantages of CNFET analog circuits over traditional silicon-based analog circuits, as well as the significant influence of CNFET physical parameters on circuit performance. Consequently, this study provides a reference for productive CNFET technologies.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"180-187"},"PeriodicalIF":2.4,"publicationDate":"2024-02-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140006157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-22DOI: 10.1109/TNANO.2024.3368628
Aokun Hu;Wenjie Li;Dongxu Lyu;Guanghui He
Stochastic computing (SC) has emerged as a promising technique for reducing hardware costs in various applications, particularly in multiply-accumulate (MAC) intensive tasks such as neural networks. However, conventional SC still faces challenges in terms of achieving high accuracy and throughput. To enhance the precision, Sobol bit-stream has been widely adopted in SC. On the other hand, the throughput is frequently increased by means of parallel computing architecture. Nevertheless, directly increasing parallelism will incur significant additional hardware costs. In this paper, we propose Pseudo-Sobol bit-streams based on which an efficient parallel stochastic computing architecture for MAC operations is further developed. The proposed design leverages the properties of Pseudo-Sobol bit-streams and integrates the computation and conversion units to improve hardware efficiency. We evaluate the effectiveness of our design in two typical applications, general matrix multiplication (GEMM) and convolution. Experimental results show that our proposed design is capable of increasing energy efficiency by up to 36% and area efficiency by up to 70%.
随机计算（SC）已成为在各种应用中降低硬件成本的一种有前途的技术，特别是在神经网络等多累积（MAC）密集型任务中。然而，传统的随机计算在实现高精度和高吞吐量方面仍面临挑战。为了提高精度，Sobol 比特流被广泛应用于 SC。另一方面，吞吐量经常通过并行计算架构来提高。然而，直接提高并行性会产生大量额外的硬件成本。在本文中，我们提出了伪 Sobol 比特流，并在此基础上进一步开发了用于 MAC 运算的高效并行随机计算架构。我们提出的设计充分利用了伪索波尔比特流的特性，并整合了计算和转换单元，从而提高了硬件效率。我们在通用矩阵乘法（GEMM）和卷积这两个典型应用中评估了设计的有效性。实验结果表明，我们提出的设计能够将能效提高 36%，面积效率提高 70%。
{"title":"Efficient Parallel Stochastic Computing Multiply-Accumulate (MAC) Technique Using Pseudo-Sobol Bit-Streams","authors":"Aokun Hu;Wenjie Li;Dongxu Lyu;Guanghui He","doi":"10.1109/TNANO.2024.3368628","DOIUrl":"10.1109/TNANO.2024.3368628","url":null,"abstract":"Stochastic computing (SC) has emerged as a promising technique for reducing hardware costs in various applications, particularly in multiply-accumulate (MAC) intensive tasks such as neural networks. However, conventional SC still faces challenges in terms of achieving high accuracy and throughput. To enhance the precision, Sobol bit-stream has been widely adopted in SC. On the other hand, the throughput is frequently increased by means of parallel computing architecture. Nevertheless, directly increasing parallelism will incur significant additional hardware costs. In this paper, we propose Pseudo-Sobol bit-streams based on which an efficient parallel stochastic computing architecture for MAC operations is further developed. The proposed design leverages the properties of Pseudo-Sobol bit-streams and integrates the computation and conversion units to improve hardware efficiency. We evaluate the effectiveness of our design in two typical applications, general matrix multiplication (GEMM) and convolution. Experimental results show that our proposed design is capable of increasing energy efficiency by up to 36% and area efficiency by up to 70%.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"170-179"},"PeriodicalIF":2.4,"publicationDate":"2024-02-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139950618","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Inference and on-chip training of Artificial Neural Networks (ANNs) are challenging computational processes for large datasets; hardware implementations are needed to accelerate this computation, while meeting metrics such as operating frequency, power dissipation and accuracy. In this article, a high-performance ASIC-based design is proposed to implement both forward and backward propagations of multi-layer perceptrons (MLPs) at the nanoscales. To attain a higher accuracy, floating-point arithmetic units for a multiply-and-accumulate (MAC) array are employed in the proposed design; moreover, a hybrid implementation scheme is utilized to achieve flexibility (for networks of different size) and comprehensively low hardware overhead. The proposed design is fully pipelined, and its performance is independent of network size, except for the number of cycles and latency. The efficiency of the proposed nanoscale MLP-based design for inference (as taking place over multiple steps) and training (due to the complex processing in backward propagation by eliminating many redundant calculations) is analyzed. Moreover, the impact of different floating-point precision formats on the final accuracy and hardware metrics under the same design constraints is studied. A comparative evaluation of the proposed MLP design for different datasets and floating-point precision formats is provided. Results show that compared to current schemes found in the technical literatures, the proposed design has the best operating frequency and accuracy with still good latency and energy dissipation.
{"title":"ASIC Design of Nanoscale Artificial Neural Networks for Inference/Training by Floating-Point Arithmetic","authors":"Farzad Niknia;Ziheng Wang;Shanshan Liu;Pedro Reviriego;Ahmed Louri;Fabrizio Lombardi","doi":"10.1109/TNANO.2024.3367916","DOIUrl":"10.1109/TNANO.2024.3367916","url":null,"abstract":"Inference and on-chip training of Artificial Neural Networks (ANNs) are challenging computational processes for large datasets; hardware implementations are needed to accelerate this computation, while meeting metrics such as operating frequency, power dissipation and accuracy. In this article, a high-performance ASIC-based design is proposed to implement both forward and backward propagations of multi-layer perceptrons (MLPs) at the nanoscales. To attain a higher accuracy, floating-point arithmetic units for a multiply-and-accumulate (MAC) array are employed in the proposed design; moreover, a hybrid implementation scheme is utilized to achieve flexibility (for networks of different size) and comprehensively low hardware overhead. The proposed design is fully pipelined, and its performance is independent of network size, except for the number of cycles and latency. The efficiency of the proposed nanoscale MLP-based design for inference (as taking place over multiple steps) and training (due to the complex processing in backward propagation by eliminating many redundant calculations) is analyzed. Moreover, the impact of different floating-point precision formats on the final accuracy and hardware metrics under the same design constraints is studied. A comparative evaluation of the proposed MLP design for different datasets and floating-point precision formats is provided. Results show that compared to current schemes found in the technical literatures, the proposed design has the best operating frequency and accuracy with still good latency and energy dissipation.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"208-216"},"PeriodicalIF":2.4,"publicationDate":"2024-02-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139950623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-09DOI: 10.1109/TNANO.2024.3364254
E. M. Sheta;Azrul Azlan Hamzah;Umi Zulaikha Mohd Azmi;Ishak Mansor;Pankaj Kumar Choudhury
A layered metamaterial comprising periodic blue glass and FTO mediums was investigated for gamma (γ) radiation dosimetry. The device acts on the principle of absorption of the incidence radiation with sharp resonance absorption peaks which undergo shifts in the presence of γ-radiation. The more the radiation dose is, the more shift happens in the resonance absorption spectrum – the feature that can be exploited in the design of polarization insensitive γ-radiation dosimetry device.
{"title":"On the γ-Radiation Dosimetry Using a Layered Metamaterial Structure Comprising FTO and Blue Glass","authors":"E. M. Sheta;Azrul Azlan Hamzah;Umi Zulaikha Mohd Azmi;Ishak Mansor;Pankaj Kumar Choudhury","doi":"10.1109/TNANO.2024.3364254","DOIUrl":"10.1109/TNANO.2024.3364254","url":null,"abstract":"A layered metamaterial comprising periodic blue glass and FTO mediums was investigated for gamma (γ) radiation dosimetry. The device acts on the principle of absorption of the incidence radiation with sharp resonance absorption peaks which undergo shifts in the presence of γ-radiation. The more the radiation dose is, the more shift happens in the resonance absorption spectrum – the feature that can be exploited in the design of polarization insensitive γ-radiation dosimetry device.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"23 ","pages":"158-163"},"PeriodicalIF":2.4,"publicationDate":"2024-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139950622","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-02DOI: 10.1109/tnano.2024.3361718
Bowen Wang, Fernando García-Redondo, Marie Garcia Bardon, Hyungrock Oh, Mohit Gupta, Woojin Kim, Diego Favaro, Yukai Chen, Wim Dehaene
{"title":"Stochastic Aware Modeling of Voltage Controlled Magnetic Anisotropy MRAM","authors":"Bowen Wang, Fernando García-Redondo, Marie Garcia Bardon, Hyungrock Oh, Mohit Gupta, Woojin Kim, Diego Favaro, Yukai Chen, Wim Dehaene","doi":"10.1109/tnano.2024.3361718","DOIUrl":"https://doi.org/10.1109/tnano.2024.3361718","url":null,"abstract":"","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"1 1","pages":""},"PeriodicalIF":2.4,"publicationDate":"2024-02-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139956881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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