Electronic Materials Letters最新文献

Introducing high dielectric constant (high-k) ceramic fillers into dielectric polymers is a widely adopted strategy for improving the energy storage density of nanocomposites. However, the mismatch in electrical properties between ceramic fillers and polymer matrix often results in reduced dielectric breakdown strength and increased dielectric loss. This study addresses these challenges by utilizing TiO₂ nanowires (NWs) decorated with ultra-small palladium (Pd) or gold (Au) nanoparticles, leveraging the quantum-confinement effect of nanometals to enhance energy storage performance. The decorated TiO₂ NWs exhibit a core-satellite structure, where the nanometal particles mitigate the interfacial polarization between the ceramic fillers and the polymer matrix, reducing dielectric loss and increasing breakdown strength. Compared to pristine P(VDF-HFP) polymer, the composite with 6 vol% TiO₂@PDA@Pd NWs demonstrated a 535% improvement in discharge energy density. This significant enhancement arises from the synergistic effects of the quantum-confinement properties of the metal nanoparticles and the optimized interface between the fillers and the polymer matrix.

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Topological insulators (TIs) represent a unique state of matter that has attracted significant interest in condensed matter physics due to their surface conduction states with high spin polarization. Despite extensive studies on the properties of TIs, there has been limited exploration of the Rashba parameter and large-scale film growth. In this work, we investigate the Rashba effect in molecular-beam-epitaxy(MBE)-grown Bi₂Te₃ channels by measuring anisotropic magnetoresistance (AMR). The extracted Rashba parameter is as large as 16.3 eV·Å, significantly exceeding values reported in previous studies. This strong Rashba field is attributed to the minimization of imperfections and crystal defects during film fabrication. Furthermore, nonreciprocal charge transport induced by the Rashba-like effective field is clearly observed up to room temperature through harmonic resistance measurements. The temperature dependence of the nonreciprocal coefficient exhibits a non-monotonic behavior, which is believed to arise from the temperature dependence of the Fermi level position.

Graphic Abstract

Topological insulators (TIs) represent a unique state of matter that has attracted significant interest in condensed matter physics due to their surface conduction states with high spin polarization. In this work, we investigate the Rashba effect in molecular-beam-epitaxy(MBE)-grown Bi₂ Te₃ channel and temperature dependence of nonreciprocal charge transport.

Recent advancements have been made in perovskite solar cells (PSCs) using atomic layer deposition (ALD) of aluminum oxide (Al₂O₃) and other suitable metal oxides such as zirconium oxide (ZrO₂) as a perovskite surface passivation technique. ALD has demonstrated significant potential for enhancing photovoltaic (PV) performance and the long-term light, thermal, humidity, and ultraviolet (UV) stability of PSCs by addressing surface defects leading to higher charge extraction and mitigating environmental degradation with only a few nanometers of thickness. However, direct ALD deposition on perovskite films can sometimes degrade the perovskite film from ALD precursor reactivity, elevated temperatures, and vacuum-induced instabilities. This perspective discusses recent strategies, challenges, and future directions for surface passivation of the perovskite solar absorber using ALD to improve device performance and long-term stability for commercialization of PSCs.

In this study, a multi-wavelengths Raman spectroscopy method was employed to evaluate the quality of epitaxial grown silicon (Epi-Si) wafers by analyzing defects, stress, and crystallinity. Unlike conventional electrical property analysis, which is typically conducted post-process through device failure testing, this study demonstrated the potential for non-destructive and real-time assessment of thin film properties at the wafer stage using Raman spectroscopy. By comparing two 8-inch wafers fabricated under different deposition conditions, Raman shift and Full Width at Half Maximum (FWHM) were established as primary evaluation indicators to analyze the point-specific characteristics of the wafers. We applied multi-wavelength Raman spectroscopy with 532 nm and 405 nm laser to measure stress distribution of wafer - scale Epi-Si layers and compared it with wafer failure maps to demonstrate the validity of stress analysis of thin films using Raman spectroscopy. The residual stress and FWHM of epitaxially grown Si thin films were quantitatively analyzed for 9 points of Epi-Si. The point-by-point residual stress and crystallinity evaluations measured by Raman spectroscopy were in good agreement with the wafer failure map, and the stress variation in the failure region could be evaluated highlighting g potential of Raman spectroscopy enabling precise analysis across a broader range of samples and having the practical utility for non-destructive, early-stage assessment of thin film properties, as well as for the in-situ detection of defects and stress.

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The effects of Ar/N₂ two-step plasma treatments on the interfacial adhesion energies of low-temperature Cu–Cu bonding interfaces were systematically investigated with four-point bending (4-PB) test. It was confirmed that the Cu surface roughness had increased, and a Cu nitride layer was formed by the Ar/N₂ two-step plasma treatment. X-ray photoelectron spectroscopy clearly showed that the Ar/N₂ two-step plasma treatment formed less Cu oxide due to the formation of a Cu nitride layer. As a result of the 4-PB test, as the N₂ RF power was increased, the interfacial adhesion energy decreased. An analysis of the delaminated surface after the 4-PB test confirmed that a Cu nitride layer was not formed, which was thought to be due to decomposition during the bonding process. As the N₂ RF power was increased, the roughness also increased, leading to poor Cu-Cu bonding. The decrease in Cu-N bonding resulted in the progression of Cu oxidation. Additionally, the interfacial adhesion energy decreased due to the formation of a disordered Cu layer on the Cu surface.

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Micro-bump plays a pivotal role in enabling high density interconnect required for three-dimensional integrated-circuits (3D ICs) packaging. However, the growth rate of intermetallic compounds (IMCs) in micro-bumps increases with shrinking bump size due to the emergence of surface diffusion channels, posing significant challenges to the reliability of small-sized micro-bumps. In this study, Fe-Co alloys were introduced as innovative diffusion barrier layers to effectively suppress IMC growth in solder bumps, achieving an exceptionally low IMC growth rate of 0.0118 μm/h^0.5. No sidewall IMCs were observed in micro-bumps, demonstrating the Fe-Co alloys’ effectiveness in inhibiting surface diffusion. Notably, an interesting size effect on IMC growth was observed, with larger Cu plate solder joints exhibiting faster IMC growth compared to 12 μm micro-bumps during aging. This behavior was attributed to grain size differences in the Fe-Co barriers, where smaller grain sizes in larger joints facilitated grain boundary diffusion, thereby accelerating IMC growth. Finite element analysis (FEA) simulations further demonstrated that variations in current density during electrodeposition led to differences in grain size. These findings propose a powerful candidate for high-performance barrier materials in small-sized micro-bumps and provide critical insights into the role of grain boundary diffusion in IMC growth, offering valuable strategies for enhancing the reliability of electronic packaging.

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Flexible micro light-emitting diodes (micro-LEDs) have garnered significant attention due to their exceptional properties, including high luminance, energy efficiency, and mechanical robustness, positioning them as a promising technology for next-generation displays and electronic devices. As the Internet of Things (IoT) paradigm advances, the demand for portable and adaptable devices has led to an acceleration in flexible micro-LED research. This review comprehensively examines advanced fabrication techniques for flexible micro-LEDs, encompassing epitaxial growth, various lift-off processes, and mass transfer strategies. These methods are systematically integrated to optimize device performance and scalability. Furthermore, it explores diverse applications of flexible micro-LEDs, ranging from flexible displays and biomedical sensors to IoT and smart devices. These applications harness the unique properties of flexible micro-LEDs, enabling their integration into various form factors and opening up new possibilities for user interfaces and information displays. This work emphasizes the transformative role of flexible micro-LEDs in driving innovations across multiple fields, paving the way for the next generation of flexible and intelligent technologies.

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In the pursuit of increasing the sintering temperature of multi-layer ceramic capacitors (MLCCs) of the metal electrode layer, this study examines the effect of secondary metal additives on the sintering behavior of nickel (Ni) nanoparticles. Traditionally, the discrepancy in sintering temperatures between metal and dielectric particles poses a challenge in MLCC fabrication, often resulting in uneven layer formation and device shortage. We introduced 0.1 atomic percent of tin (Sn), antimony (Sb), and cobalt (Co) into Ni nanoparticles and investigated their influence on sintering temperatures in the metal layer. Utilizing in-situ stress analysis and field emission scanning electron microscope (FE-SEM) imaging, we found that Sn and Sb effectively hindered the onset of neck formation and coalescence by forming intermetallic phases, whereas Co showed no such effect. These findings suggest that the strategic addition of specific secondary metals can shift the sintering behavior initiation of Ni related to the structural integrity during the MLCC fabrication and the performance of MLCCs. The research highlights the potential of using secondary metal additives to refine the thermal processing steps in electronic component manufacturing, aiming for more reliable and efficient devices.

High stretchability and flexibility are essential characteristics for wearable devices that attach to a living body to store data and analyze electrical signals. Memristors, the promising next generation of intelligent semiconductors, are expected to be lightweight and highly integrated by dramatically reducing device size due to its unique characteristics. The non-volatile nature of memristors is expected to be utilized in wearable devices that can store and analyze bioelectrical signals. To improve the resistive switching mechanism of the memristor, annealing process above 400 °C are widely utilized due to the certainty of the process. However, it is difficult to apply high-temperature annealing processes to flexible substrate like polyethylene terephthalate or polyethylene naphthalate. Here, we developed the low temperature Dual plasma-annealing treatment (DPA) process that combines a low-temperature annealing treatment process with an O₂ plasma process for glass/ITO/TiO₂/TiO_2−x/Ag thin film-based memristor devices, and to analyze the effect of this series DPA processes on memristor devices, we fabricated devices with different process temperatures. Also, we measured the enhancement in I–V curve, retention test and different of bandgap and ohmic conduction. The results showed that the resistive switching behavior of the device processed at 160 °C was best enhanced temperature and confirmed that the DPA process can replace the high temperature annealing treatment process and be applied to flexible substrates.

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Beom Gu Lee et al., TiO₂ memristors prepared based on sputtering-processeshave many advantages, such as the characteristic of resistive switchingmechanism, However, these devices require high-temperature annealing, whichposes challenges for their application on high-stretchable substrates. This workhas shown that the performance of the devices switching mechanism can beimproved by subjecting the devices to plasma treatment with low temperatureannealing process.