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IEEE Transactions on Circuits and Systems I: Regular Papers最新文献

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Process-Variation-Aware In-Memory Computation With Improved Linearity Using On-Chip Configurable Current-Steering Thermometric DAC 利用片上可配置电流转向测温 DAC 改进线性度的过程变化感知内存计算
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-02 DOI: 10.1109/tcsi.2024.3422883
Prasanna Kumar Saragada, Bishnu Prasad Das
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引用次数: 0
Energy Efficient Resistor-Transconductor Hybrid-Based Full-Duplex Transceiver for Serial Link 用于串行链路的高能效电阻器-电感器混合型全双工收发器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-02 DOI: 10.1109/tcsi.2024.3435530
V. K. Surya, Suraj Kumar Prusty, Bibhu Datta Sahoo, Nijwm Wary
{"title":"Energy Efficient Resistor-Transconductor Hybrid-Based Full-Duplex Transceiver for Serial Link","authors":"V. K. Surya, Suraj Kumar Prusty, Bibhu Datta Sahoo, Nijwm Wary","doi":"10.1109/tcsi.2024.3435530","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3435530","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884512","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
NOMA System Performance Improvement Using Chaos and Deep Learning 利用混沌和深度学习提高 NOMA 系统性能
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-02 DOI: 10.1109/tcsi.2024.3431470
Hui-Ping Yin, Hai-Peng Ren
{"title":"NOMA System Performance Improvement Using Chaos and Deep Learning","authors":"Hui-Ping Yin, Hai-Peng Ren","doi":"10.1109/tcsi.2024.3431470","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3431470","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884510","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
CorTile: A Scalable Neuromorphic Processing Core for Cortical Simulation With Hybrid-Mode Router and TCAM CorTile：利用混合模式路由器和 TCAM 进行大脑皮层仿真的可扩展神经形态处理核心
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-02 DOI: 10.1109/tcsi.2024.3431036
Fanxi Yang, Yuhan He, Jinqiao Yang, Anqin Xiao, Lufei Fan, Ning Ma, Li-Rong Zheng, Zhuo Zou
{"title":"CorTile: A Scalable Neuromorphic Processing Core for Cortical Simulation With Hybrid-Mode Router and TCAM","authors":"Fanxi Yang, Yuhan He, Jinqiao Yang, Anqin Xiao, Lufei Fan, Ning Ma, Li-Rong Zheng, Zhuo Zou","doi":"10.1109/tcsi.2024.3431036","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3431036","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884508","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography LiCryptor：用于轻量级密码学的高速紧凑型多粒度可重构加速器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-01 DOI: 10.1109/tcsi.2024.3434686
Hoai Luan Pham, Vu Trung Duong Le, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima
{"title":"LiCryptor: High-Speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography","authors":"Hoai Luan Pham, Vu Trung Duong Le, Van Duy Tran, Tuan Hai Vu, Yasuhiko Nakashima","doi":"10.1109/tcsi.2024.3434686","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3434686","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Artificial Neural Network Based Calibration for a 12 b 250 MS/s Pipelined-SAR ADC With Ring Amplifier in 40-nm CMOS 基于人工神经网络的 12 b 250 MS/s 管排式合成孔径雷达 ADC 校准（40 纳米 CMOS，带环形放大器
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-01 DOI: 10.1109/tcsi.2024.3429309
Bin Liu, Nannan Li, Xuhui Chen, Zhichao Dai, Yufeng Ge, Zheng Jiang, Huanhuan Qi, Jie Zhang, Jinfu Wang, Xiaofei Wang, Zhenhai Chen, Yan Xue, Hong Zhang
{"title":"Artificial Neural Network Based Calibration for a 12 b 250 MS/s Pipelined-SAR ADC With Ring Amplifier in 40-nm CMOS","authors":"Bin Liu, Nannan Li, Xuhui Chen, Zhichao Dai, Yufeng Ge, Zheng Jiang, Huanhuan Qi, Jie Zhang, Jinfu Wang, Xiaofei Wang, Zhenhai Chen, Yan Xue, Hong Zhang","doi":"10.1109/tcsi.2024.3429309","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3429309","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Layer-Wise Mixed-Modes CNN Processing Architecture With Double-Stationary Dataflow and Dimension-Reshape Strategy 采用双静态数据流和维度重塑策略的层智混合模式 CNN 处理架构
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-01 DOI: 10.1109/tcsi.2024.3434706
Bo Liu, Xinxiang Huang, Yang Zhang, Guang Yang, Han Yan, Chen Zhang, Zejv Li, Yuanhao Wang, Hao Cai
{"title":"Layer-Wise Mixed-Modes CNN Processing Architecture With Double-Stationary Dataflow and Dimension-Reshape Strategy","authors":"Bo Liu, Xinxiang Huang, Yang Zhang, Guang Yang, Han Yan, Chen Zhang, Zejv Li, Yuanhao Wang, Hao Cai","doi":"10.1109/tcsi.2024.3434706","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3434706","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 60-GHz Antenna-Duplexed Modular Front-End for Channel Sounding and Physical Layer Security 用于信道探测和物理层安全的 60 千兆赫天线双工模块化前端
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-01 DOI: 10.1109/tcsi.2024.3428609
Muhammad Umar, Axel Schmidt, Martin Laabs, Niels Neumann, Dirk Plettemeier
{"title":"A 60-GHz Antenna-Duplexed Modular Front-End for Channel Sounding and Physical Layer Security","authors":"Muhammad Umar, Axel Schmidt, Martin Laabs, Niels Neumann, Dirk Plettemeier","doi":"10.1109/tcsi.2024.3428609","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3428609","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141887244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 28-/60-GHz Dual-Band Receiver Front-End With Sideband-Selection Technique in 65-nm CMOS 采用 65 纳米 CMOS 边带选择技术的 28-/60-GHz 双频接收器前端
IF 5.1 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-08-01 DOI: 10.1109/tcsi.2024.3432171
Yiming Yu, Zijian Ouyang, Xingnuo Huo, Chenxi Zhao, Huihua Liu, Yunqiu Wu, Kai Kang
{"title":"A 28-/60-GHz Dual-Band Receiver Front-End With Sideband-Selection Technique in 65-nm CMOS","authors":"Yiming Yu, Zijian Ouyang, Xingnuo Huo, Chenxi Zhao, Huihua Liu, Yunqiu Wu, Kai Kang","doi":"10.1109/tcsi.2024.3432171","DOIUrl":"https://doi.org/10.1109/tcsi.2024.3432171","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.1,"publicationDate":"2024-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141884511","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information IEEE 电路与系统论文集--I：常规论文 出版信息
IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
IEEE Transactions on Circuits and Systems I: Regular Papers
Pub Date : 2024-07-31 DOI: 10.1109/TCSI.2024.3427571
{"title":"IEEE Transactions on Circuits and Systems--I: Regular Papers Publication Information","authors":"","doi":"10.1109/TCSI.2024.3427571","DOIUrl":"10.1109/TCSI.2024.3427571","url":null,"abstract":"","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":null,"pages":null},"PeriodicalIF":5.2,"publicationDate":"2024-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10618922","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141863455","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"OA","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
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