In this paper, we study the use of ultra-wideband (UWB) system for early breast cancer detection. Images are formed using a number of advanced imaging algorithms, and the effectiveness of the different algorithms are presented and compared. In addition, the use of multiple input multiple output (MIMO) systems are studied and the experiments results are presented.
{"title":"MIMO ultra-wideband system for breast cancer detection","authors":"Leong Wei Deng, Zheng Yuanjin, Lin Zhiping, Diao Shengxi, Gao Yuan","doi":"10.1109/RFIT.2012.6401641","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401641","url":null,"abstract":"In this paper, we study the use of ultra-wideband (UWB) system for early breast cancer detection. Images are formed using a number of advanced imaging algorithms, and the effectiveness of the different algorithms are presented and compared. In addition, the use of multiple input multiple output (MIMO) systems are studied and the experiments results are presented.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121650489","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401610
A. Hamidian, A. Malignaggi, R. Shu, A. Kamal, G. Boeck
This paper presents the design procedure of a fully integrated 60 GHz double balanced Gilbert cell up-conversion mixer, implemented in 90 nm LP CMOS technology. The mixer is designed for wideband performance to cover the four bands of the IEEE802.15.3c standard. The up-converter achieves a flat conversion gain of -2 dB and an output power of -9 dBm at 1 dB gain compression point for all the four channels with low DC power consumption (17 mW).
{"title":"A wideband Gilbert cell up-converter in 90 nm CMOS for 60 GHz application","authors":"A. Hamidian, A. Malignaggi, R. Shu, A. Kamal, G. Boeck","doi":"10.1109/RFIT.2012.6401610","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401610","url":null,"abstract":"This paper presents the design procedure of a fully integrated 60 GHz double balanced Gilbert cell up-conversion mixer, implemented in 90 nm LP CMOS technology. The mixer is designed for wideband performance to cover the four bands of the IEEE802.15.3c standard. The up-converter achieves a flat conversion gain of -2 dB and an output power of -9 dBm at 1 dB gain compression point for all the four channels with low DC power consumption (17 mW).","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124534857","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401600
M. Wu, Yen-Chung Chiang
In this paper, a three-stage power amplifier (PA) designed for V-band applications is presented. The proposed PA adopts common-source topology for each stage and is implemented in the CMOS 90-nm process technology. This V-band PA achieves a small signal gain of 11.9dB and a saturated output power of 7.6dBm at the 60GHz operating frequency. The measured peak power added efficiency (PAE) is 4.77%, and its OP1dB is 5dBm. The power consumption of the proposed PA is 97mW from the 1.2V voltage supply.
{"title":"A V-band power amplifier with 11.9 dB gain in CMOS 90-nm process technology","authors":"M. Wu, Yen-Chung Chiang","doi":"10.1109/RFIT.2012.6401600","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401600","url":null,"abstract":"In this paper, a three-stage power amplifier (PA) designed for V-band applications is presented. The proposed PA adopts common-source topology for each stage and is implemented in the CMOS 90-nm process technology. This V-band PA achieves a small signal gain of 11.9dB and a saturated output power of 7.6dBm at the 60GHz operating frequency. The measured peak power added efficiency (PAE) is 4.77%, and its OP1dB is 5dBm. The power consumption of the proposed PA is 97mW from the 1.2V voltage supply.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132553658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401618
Jian Kang, Xiaopeng Yu, Jianjun J. Zhou
This paper presents an optimized injection locked frequency divider (ILFD) with multiple division ratios. The divider core is composed of a tunable active inductor (TAI) and cross-coupled transistors. Different tuning voltages are applied to control the impedance of this TAI hence to achieve multi-division ratios of 2, 3, 4 and 5. Key considerations such as operating frequency, locking range, power consumption and input sensitivity of this ILFD are analyzed in detail, based on which an optimized ILFD is designed and fabricated in TSMC 65nm CMOS technology. Measurement results show the proposed design exhibits a high figure of merit.
{"title":"Optimization of injection locked frequency divider with tunable active inductor","authors":"Jian Kang, Xiaopeng Yu, Jianjun J. Zhou","doi":"10.1109/RFIT.2012.6401618","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401618","url":null,"abstract":"This paper presents an optimized injection locked frequency divider (ILFD) with multiple division ratios. The divider core is composed of a tunable active inductor (TAI) and cross-coupled transistors. Different tuning voltages are applied to control the impedance of this TAI hence to achieve multi-division ratios of 2, 3, 4 and 5. Key considerations such as operating frequency, locking range, power consumption and input sensitivity of this ILFD are analyzed in detail, based on which an optimized ILFD is designed and fabricated in TSMC 65nm CMOS technology. Measurement results show the proposed design exhibits a high figure of merit.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"244 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125647937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401617
E. Roa, Wu-Hsin Chen, B. Jung
This paper describes a power-efficient frequency prescaler operating at maximum frequency of 12.3GHz without using inductors. A novel logic concept and reconfigurable technique is presented to achieve two division factors by using just one single-phase clock flip-flop. The prescaler is implemented in 0.13μm CMOS technology. It occupies 14×12μm2 and consumes 817μW at maximum frequency. Experimental results indicate a power efficient and compact frequency divider working in wide frequency range from 5GHz to 12.3GHz.
{"title":"A polymorphic 15GHz/mW inductorless frequency prescaler using implication logic in 0.13μm CMOS","authors":"E. Roa, Wu-Hsin Chen, B. Jung","doi":"10.1109/RFIT.2012.6401617","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401617","url":null,"abstract":"This paper describes a power-efficient frequency prescaler operating at maximum frequency of 12.3GHz without using inductors. A novel logic concept and reconfigurable technique is presented to achieve two division factors by using just one single-phase clock flip-flop. The prescaler is implemented in 0.13μm CMOS technology. It occupies 14×12μm2 and consumes 817μW at maximum frequency. Experimental results indicate a power efficient and compact frequency divider working in wide frequency range from 5GHz to 12.3GHz.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132097129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401653
B. Shi, Jijun Yao, M. Chia
Increased commercial use of satellite terminals, broadband wireless communications and high-data link has created a strong demand for Ka-band high power amplifiers (HPAs) coupled with high power efficiency and good linearity performance. To meet the stringent linearity requirement without largely sacrificing output power and efficiency, linearization is the only solution. This paper demonstrates the effectiveness of digital predistortion (DPD) in linearization of Ka-band HPAs by presenting the experimental results from our memory polynomial predistorter based wideband DPD testbed. Tested on an in-house developed 15W Ka-band solid state power amplifier (SSPA), it is shown that with linearization 15-25 dB linearity improvement is achieved for 64-QAM and 8-tone signals. While meeting the required linearity, this will lead to an significant increase on the output power and efficiency, compared to the conventional back-off method.
{"title":"Linearization of Ka-band high power amplifiers","authors":"B. Shi, Jijun Yao, M. Chia","doi":"10.1109/RFIT.2012.6401653","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401653","url":null,"abstract":"Increased commercial use of satellite terminals, broadband wireless communications and high-data link has created a strong demand for Ka-band high power amplifiers (HPAs) coupled with high power efficiency and good linearity performance. To meet the stringent linearity requirement without largely sacrificing output power and efficiency, linearization is the only solution. This paper demonstrates the effectiveness of digital predistortion (DPD) in linearization of Ka-band HPAs by presenting the experimental results from our memory polynomial predistorter based wideband DPD testbed. Tested on an in-house developed 15W Ka-band solid state power amplifier (SSPA), it is shown that with linearization 15-25 dB linearity improvement is achieved for 64-QAM and 8-tone signals. While meeting the required linearity, this will lead to an significant increase on the output power and efficiency, compared to the conventional back-off method.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129242391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401614
H. Lim, G. Ng, Y. Leong
This paper presents a method to attain a compact true time delay line with a partially shielded coplanar waveguide transmission line. Closely spaced air bridges were utilized to reduce the coupling effects between neighboring coplanar waveguide transmission lines. The proposed method is compatible with foundry's GaAs standard process and allows the transmission line to be compact and achieve a small sized true time delay line circuit. A true time delay line of approximately 85ps was fabricated and tested.
{"title":"Compact true time delay line with partially shielded coplanar waveguide transmission lines","authors":"H. Lim, G. Ng, Y. Leong","doi":"10.1109/RFIT.2012.6401614","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401614","url":null,"abstract":"This paper presents a method to attain a compact true time delay line with a partially shielded coplanar waveguide transmission line. Closely spaced air bridges were utilized to reduce the coupling effects between neighboring coplanar waveguide transmission lines. The proposed method is compatible with foundry's GaAs standard process and allows the transmission line to be compact and achieve a small sized true time delay line circuit. A true time delay line of approximately 85ps was fabricated and tested.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131926172","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401672
Yuki Yamashita, D. Kanemoto, H. Kanaya, Ramesh K. Pokharel, K. Yoshida
This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.
{"title":"A 5-GHz fully integrated CMOS class-E power amplifier using self-biasing technique with cascaded class-D drivers","authors":"Yuki Yamashita, D. Kanemoto, H. Kanaya, Ramesh K. Pokharel, K. Yoshida","doi":"10.1109/RFIT.2012.6401672","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401672","url":null,"abstract":"This paper describes the design of 5-GHz fully integrated CMOS class-E single-ended power amplifier (PA) for wireless transmitter applications in a 0.18-μm CMOS technology. The proposed class-E PA employs the cascode topology with a self-biasing technique to reduce device stress. Three cascaded class-D driver amplifiers are used to actualize the sharp switching at the class-E power stage. All device components are integrated on chip and the chip area is 1.0×1.3 mm2. The measurement results indicate that the PA delivers 16.4 dBm output power and 35.4 % power-added efficiency with 2.3 V power supply voltage into a 50 Ω load.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130022856","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401608
P. Acharya, W. Goh, M. A. Arasu, Jun Yu, M. Je
This manuscript presents the architecture of a hardware-efficient all-digital acoustic borehole telemetry transmitter for use in the Measurement While Drilling (MWD) systems that are intended for the oil drilling service industry. The transmitter employs Direct Digital Synthesis (DDS) for carrier generation to mitigate the effects of carrier generation using analog approach, which is more susceptible to changes in device characteristics in high temperature environment. A hardware-efficient implementation of a Pulse Width Modulator (PWM) is presented to minimize silicon area as typically, the 0.8-/1-μm SOI-CMOS technology is adopted for high temperature electronics.
本文介绍了一种硬件高效的全数字声学井眼遥测变送器的结构，该变送器用于石油钻井服务行业的随钻测量(MWD)系统。发射机采用直接数字合成(Direct Digital Synthesis, DDS)进行载波生成，以减轻高温环境下采用模拟方式产生载波对器件特性变化的影响。本文提出了一种高效硬件实现的脉冲宽度调制器(PWM)，以最大限度地减少硅面积，通常，高温电子器件采用0.8-/1-μm SOI-CMOS技术。
{"title":"A hardware-efficient all-digital transmitter architecture for acoustic borehole telemetry systems","authors":"P. Acharya, W. Goh, M. A. Arasu, Jun Yu, M. Je","doi":"10.1109/RFIT.2012.6401608","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401608","url":null,"abstract":"This manuscript presents the architecture of a hardware-efficient all-digital acoustic borehole telemetry transmitter for use in the Measurement While Drilling (MWD) systems that are intended for the oil drilling service industry. The transmitter employs Direct Digital Synthesis (DDS) for carrier generation to mitigate the effects of carrier generation using analog approach, which is more susceptible to changes in device characteristics in high temperature environment. A hardware-efficient implementation of a Pulse Width Modulator (PWM) is presented to minimize silicon area as typically, the 0.8-/1-μm SOI-CMOS technology is adopted for high temperature electronics.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132010651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-01DOI: 10.1109/RFIT.2012.6401649
Z. Zhong, Yong-xin Guo
In this paper, a novel non-quasi-static table-based model has been developed for advanced Gallium Nitride (GaN) Schottky barrier diodes, which are widely used in current RF energy harvesting and wireless power transmission (WPT) applications. This novel table-based model can be simply built based on the measured S-parameters and I-V characteristics of these GaN diodes. In contrast with many complicated traditional models, this technology-independent modeling method includes no ambiguous curve fitting and de-embedding processes. Furthermore, this large-signal model is theoretically suitable for all kinds of diodes and could be easily imported into the computer-aided design (CAD) software. To verify its accuracy, measured and modeled results of different kinds of GaN diodes are compared and excellent agreement has been obtained.
{"title":"A technology-independent table-based model for advanced GaN Schottky barrier diodes","authors":"Z. Zhong, Yong-xin Guo","doi":"10.1109/RFIT.2012.6401649","DOIUrl":"https://doi.org/10.1109/RFIT.2012.6401649","url":null,"abstract":"In this paper, a novel non-quasi-static table-based model has been developed for advanced Gallium Nitride (GaN) Schottky barrier diodes, which are widely used in current RF energy harvesting and wireless power transmission (WPT) applications. This novel table-based model can be simply built based on the measured S-parameters and I-V characteristics of these GaN diodes. In contrast with many complicated traditional models, this technology-independent modeling method includes no ambiguous curve fitting and de-embedding processes. Furthermore, this large-signal model is theoretically suitable for all kinds of diodes and could be easily imported into the computer-aided design (CAD) software. To verify its accuracy, measured and modeled results of different kinds of GaN diodes are compared and excellent agreement has been obtained.","PeriodicalId":187550,"journal":{"name":"2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)","volume":"16 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132071062","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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