Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539884
Ahmed S. H. Ahmed, A. Farid, M. Urteaga, M. Rodwell
We report stacked mm-wave power amplifiers designed by a novel 2-port technique. Two power amplifiers designed into 130-nm InP HBT to verify the technique. The first design (unit cell) biased at 436mW Pdc produces 34.6mW saturated output power with 5.8% PAE at 204GHz. The amplifier has a 13.9dB peak small signal gain at 236GHz and 27 GHz 3–dB bandwidth. The chip size is 0.63mm×0.54mm including the pads. The second design combines two cells in parallel with an additional gain stage. The design consumes 1.18W Pdc and it shows a 63mW saturated output power with 4.8%PAE at 204GHz. The amplifier has a 22.7 dB peak small signal gain at 230GHz and larger than 25GHz 3–dB bandwidth. The chip size is 0.7mm×1.3mm including the pads. The paper reports the first stacked power amplifier designed in a rigorous way at mm-wave frequenices.
{"title":"204GHz Stacked-Power Amplifiers Designed by a Novel Two-Port Technique","authors":"Ahmed S. H. Ahmed, A. Farid, M. Urteaga, M. Rodwell","doi":"10.23919/EUMIC.2018.8539884","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539884","url":null,"abstract":"We report stacked mm-wave power amplifiers designed by a novel 2-port technique. Two power amplifiers designed into 130-nm InP HBT to verify the technique. The first design (unit cell) biased at 436mW Pdc produces 34.6mW saturated output power with 5.8% PAE at 204GHz. The amplifier has a 13.9dB peak small signal gain at 236GHz and 27 GHz 3–dB bandwidth. The chip size is 0.63mm×0.54mm including the pads. The second design combines two cells in parallel with an additional gain stage. The design consumes 1.18W Pdc and it shows a 63mW saturated output power with 4.8%PAE at 204GHz. The amplifier has a 22.7 dB peak small signal gain at 230GHz and larger than 25GHz 3–dB bandwidth. The chip size is 0.7mm×1.3mm including the pads. The paper reports the first stacked power amplifier designed in a rigorous way at mm-wave frequenices.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122475212","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/eumc.2018.8541584
M. Ayad, A. Couturier, P. Poilvert, L. Marechal, P. Auxemery
This paper presents the realization and characteristics of broadband plastic low cost packaged 5G High Power Frond-End (HPFE) operating in 24-31GHz bandwidth. This demonstrator includes a Transmit and Receive paths realized on mixed technologies: 150nm Gallium Nitride on Silicon Carbide (AlGaN/GaN on SiC) and 150nm Gallium Arsenide (GaAs). Continuous Wave (CW) measured power results of the Transmit path (Tx) demonstrates a maximum output power (POUT, Tx) higher than 2W (33.5dBm) with 24% power added efficiency (PAE), and 36dB of insertion gain (GI, Tx) in the 24-31GHz bandwidth. The receiver path (Rx) presents an maximum output power (POUT, Rx) of 30m W (15.5dBm) and an average Noise Figure (NF) of 3.6dB with an associated Insertion Gain (GI, Rx) of 20dB in the same bandwidth. The HPFE/Tx linearity has been investigated with several M-QAM modulation signals with 25/50 and 100MHz channel spacing and using Digital Pre-Distortion (DPD) leading to 48dBc Adjacent Channel Leakage Ratio (ACLR) and 40dB Mean Squared Error (MSE) for average output powers ranging from 17dBm to 25dBm. The linearity performances have been compared to the ones obtained with two other linear GaAs amplifiers (P A1 and P A2) dedicated to point to point telecommunications application: the HPFE presents similar linearity performances associated to a higher efficiency.
介绍了工作在24-31GHz带宽范围内的宽带塑料低成本封装5G高功率前端(HPFE)的实现及其特点。该演示器包括采用混合技术实现的发射和接收路径:150nm碳化硅上的氮化镓(AlGaN/GaN on SiC)和150nm砷化镓(GaAs)。发射路径(Tx)的连续波(CW)测量功率结果表明，在24-31GHz带宽下，最大输出功率(POUT, Tx)高于2W (33.5dBm)，功率附加效率(PAE)为24%，插入增益(GI, Tx)为36dB。接收器路径(Rx)在相同带宽下的最大输出功率(POUT, Rx)为30m W (15.5dBm)，平均噪声系数(NF)为3.6dB，相关的插入增益(GI, Rx)为20dB。我们研究了几种具有25/50和100MHz信道间隔的M-QAM调制信号的HPFE/Tx线性度，并使用数字预失真(DPD)在17dBm至25dBm的平均输出功率范围内导致48dBc的相邻信道泄漏比(ACLR)和40dB的均方误差(MSE)。将线性性能与专用于点对点电信应用的另外两个线性GaAs放大器(pa1和pa2)的线性性能进行了比较:HPFE具有与更高效率相关的相似线性性能。
{"title":"Mixed Technologies Packaged High Power Frond-End for Broadband 28GHz 5G Solutions","authors":"M. Ayad, A. Couturier, P. Poilvert, L. Marechal, P. Auxemery","doi":"10.23919/eumc.2018.8541584","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541584","url":null,"abstract":"This paper presents the realization and characteristics of broadband plastic low cost packaged 5G High Power Frond-End (HPFE) operating in 24-31GHz bandwidth. This demonstrator includes a Transmit and Receive paths realized on mixed technologies: 150nm Gallium Nitride on Silicon Carbide (AlGaN/GaN on SiC) and 150nm Gallium Arsenide (GaAs). Continuous Wave (CW) measured power results of the Transmit path (Tx) demonstrates a maximum output power (POUT, Tx) higher than 2W (33.5dBm) with 24% power added efficiency (PAE), and 36dB of insertion gain (GI, Tx) in the 24-31GHz bandwidth. The receiver path (Rx) presents an maximum output power (POUT, Rx) of 30m W (15.5dBm) and an average Noise Figure (NF) of 3.6dB with an associated Insertion Gain (GI, Rx) of 20dB in the same bandwidth. The HPFE/Tx linearity has been investigated with several M-QAM modulation signals with 25/50 and 100MHz channel spacing and using Digital Pre-Distortion (DPD) leading to 48dBc Adjacent Channel Leakage Ratio (ACLR) and 40dB Mean Squared Error (MSE) for average output powers ranging from 17dBm to 25dBm. The linearity performances have been compared to the ones obtained with two other linear GaAs amplifiers (P A1 and P A2) dedicated to point to point telecommunications application: the HPFE presents similar linearity performances associated to a higher efficiency.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123537564","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539919
D. Saugnon, J. Tartarin, B. Franc, Hassan Maher, Francois Boone
The rapid development of III-V technologies for telecommunication and radar markets need the meeting of performances (power, frequency) criteria as well as reliability assessment. Nitride HEMT technologies are known to reveal a large variety of failure electrical signatures, and it is also largely accepted that multi-tools (multi physics) approaches is the only suitable way to understand the failure mechanisms and to improve the technologies. Experimental stress workbenches usually allow to track a given number of static/dynamic parameters, but specific characterization are only performed at initial and final steps on the devices. This paper proposes a new approach with S-parameters measurement performed during RF stresses without removing the devices under test (in a thermally controlled oven). Then intermediate knowledge of the electrical (small signal) behavior of the devices can be assessed, and crossed with large-signal and static time-dependent signatures.
{"title":"Fully Automated RF-Thermal Stress Workbench with S-Parameters Tracking for GaN Reliability Analysis","authors":"D. Saugnon, J. Tartarin, B. Franc, Hassan Maher, Francois Boone","doi":"10.23919/EUMIC.2018.8539919","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539919","url":null,"abstract":"The rapid development of III-V technologies for telecommunication and radar markets need the meeting of performances (power, frequency) criteria as well as reliability assessment. Nitride HEMT technologies are known to reveal a large variety of failure electrical signatures, and it is also largely accepted that multi-tools (multi physics) approaches is the only suitable way to understand the failure mechanisms and to improve the technologies. Experimental stress workbenches usually allow to track a given number of static/dynamic parameters, but specific characterization are only performed at initial and final steps on the devices. This paper proposes a new approach with S-parameters measurement performed during RF stresses without removing the devices under test (in a thermally controlled oven). Then intermediate knowledge of the electrical (small signal) behavior of the devices can be assessed, and crossed with large-signal and static time-dependent signatures.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"84 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128619849","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/eumc.2018.8541708
S. Gillespie, D. Root, M. Marcu, P. Aaen
For the first time, this paper presents and validates a novel extension of the X-parameter behavioral modeling paradigm to include dynamic electro-thermal phenomena, a key source of long-term memory affecting transistors. The dynamic thermal X-parameter model (DTXM) adds a novel but straightforward method to implement envelope domain sub-circuit in a feedback loop around a conventional static X -parameter model, enabling the simulation of modulated waveform-dependent dynamic self-heating effects. The extended model is identified from conventional CW or pulsed X-parameter measurements, over a range of ambient temperatures. A re-referencing of the extracted X-parameter data to the junction temperature is performed, based on estimated or a calculated thermal resistance and thermal capacitance. The model can also be generated in the simulation environment starting from a dynamic electro-thermal compact time-domain model. The DTXM accounts for thermally-induced asymmetry of intermodulation distortion products and temperature hysteresis depending on the signal bandwidth.
{"title":"Electrothermal X-Parameters for Dynamic Modeling of RF and Microwave Power Transistors","authors":"S. Gillespie, D. Root, M. Marcu, P. Aaen","doi":"10.23919/eumc.2018.8541708","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541708","url":null,"abstract":"For the first time, this paper presents and validates a novel extension of the X-parameter behavioral modeling paradigm to include dynamic electro-thermal phenomena, a key source of long-term memory affecting transistors. The dynamic thermal X-parameter model (DTXM) adds a novel but straightforward method to implement envelope domain sub-circuit in a feedback loop around a conventional static X -parameter model, enabling the simulation of modulated waveform-dependent dynamic self-heating effects. The extended model is identified from conventional CW or pulsed X-parameter measurements, over a range of ambient temperatures. A re-referencing of the extracted X-parameter data to the junction temperature is performed, based on estimated or a calculated thermal resistance and thermal capacitance. The model can also be generated in the simulation environment starting from a dynamic electro-thermal compact time-domain model. The DTXM accounts for thermally-induced asymmetry of intermodulation distortion products and temperature hysteresis depending on the signal bandwidth.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115452076","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539946
Xuekun Du, S. Dhar, A. Jarndal, C. Storey, M. Helaoui, S. Wingar, Chang Jiang You, Jingye Cai, F. Ghannouchi
A novel reliable small signal model parameter extraction of asymmetric GaN-based Heterojunction Field Effect Transistors (HFETs) is proposed in this paper. An efficient systematic searching procedure based on pinch-off and cold weak-forward S-parameters has been developed to consider the asymmetric structure of GaN HFETs and find the optimal values of the gate and drain pad capacitances $C_{pg}$ and $C_{pd}$. Considering that the depletion region extension is varied with the gate bias voltage Vgs slightly even below pinch-off voltage, the obtained initial values of the extracted parameters are optimized by artificial bee colony (ABC) algorithm to improve the reliability of parameter extraction. The developed parameter extraction method shows excellent accuracy and reliability. The proposed procedure can be extended to asymmetric GaN devices with various process technologies. The developed approach has been validated by an asymmetric $0.15 mu mathrm{m}$ GaN HFET over a wide range of bias conditions and frequencies.
提出了一种可靠的非对称氮化镓异质结场效应晶体管(hfet)小信号模型参数提取方法。针对GaN型hfet的非对称结构，提出了一种基于掐断和冷弱正向s参数的高效系统搜索方法，并找到了栅极和漏极电容C_{pg}$和C_{pd}$的最优值。考虑到耗尽区扩展随栅极偏置电压Vgs的变化不大，甚至小于截断电压，采用人工蜂群(ABC)算法对提取参数的初始值进行优化，提高参数提取的可靠性。所开发的参数提取方法具有良好的准确性和可靠性。所提出的程序可以扩展到具有各种工艺技术的非对称GaN器件。所开发的方法已通过一个非对称的$0.15 mu mathm {m}$ GaN HFET在宽偏置条件和频率范围内进行了验证。
{"title":"Reliable Parameter Extraction of Asymmetric GaN-Based Heterojunction Field Effect Transistors","authors":"Xuekun Du, S. Dhar, A. Jarndal, C. Storey, M. Helaoui, S. Wingar, Chang Jiang You, Jingye Cai, F. Ghannouchi","doi":"10.23919/EUMIC.2018.8539946","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539946","url":null,"abstract":"A novel reliable small signal model parameter extraction of asymmetric GaN-based Heterojunction Field Effect Transistors (HFETs) is proposed in this paper. An efficient systematic searching procedure based on pinch-off and cold weak-forward S-parameters has been developed to consider the asymmetric structure of GaN HFETs and find the optimal values of the gate and drain pad capacitances $C_{pg}$ and $C_{pd}$. Considering that the depletion region extension is varied with the gate bias voltage Vgs slightly even below pinch-off voltage, the obtained initial values of the extracted parameters are optimized by artificial bee colony (ABC) algorithm to improve the reliability of parameter extraction. The developed parameter extraction method shows excellent accuracy and reliability. The proposed procedure can be extended to asymmetric GaN devices with various process technologies. The developed approach has been validated by an asymmetric $0.15 mu mathrm{m}$ GaN HFET over a wide range of bias conditions and frequencies.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125989881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539903
J. Kamioka, Yoshifumi Kawamura, Y. Tarui, K. Nakahara, Y. Kamo, H. Okazaki, M. Hangai, K. Yamanaka, H. Fukumoto
In this paper, a high output power and high gain X-band GaN-on-Si MMIC power amplifier with a GaAs MMIC output matching circuit is developed to achieve a low-cost and miniaturized module. A GaAs MMIC output matching circuit is employed to reduce circuit loss. Measured performance of the developed amplifier shows output power of 44.8 dBm (30.4 W), associated gain of 29.8 dB and PAE of 30 % in X-band. The developed amplifier achieves the highest output power, gain and PAE among X-band GaN-on-Si amplifiers ever reported. The developed amplifier is estimated to be less than half the cost of GaN-on-SiC amplifiers of the same size.
{"title":"A Low-Cost 30-W Class X-Band GaN-on-Si MMIC Power Amplifier with a GaAs MMIC Output Matching Circuit","authors":"J. Kamioka, Yoshifumi Kawamura, Y. Tarui, K. Nakahara, Y. Kamo, H. Okazaki, M. Hangai, K. Yamanaka, H. Fukumoto","doi":"10.23919/EUMIC.2018.8539903","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539903","url":null,"abstract":"In this paper, a high output power and high gain X-band GaN-on-Si MMIC power amplifier with a GaAs MMIC output matching circuit is developed to achieve a low-cost and miniaturized module. A GaAs MMIC output matching circuit is employed to reduce circuit loss. Measured performance of the developed amplifier shows output power of 44.8 dBm (30.4 W), associated gain of 29.8 dB and PAE of 30 % in X-band. The developed amplifier achieves the highest output power, gain and PAE among X-band GaN-on-Si amplifiers ever reported. The developed amplifier is estimated to be less than half the cost of GaN-on-SiC amplifiers of the same size.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122271910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539889
Xingli He, Ioanna Bakaimi, Nur Zatil Ismah Hashim, Yudong Wang, A. Mostaed, I. Reaney, Q. Luo, S. Gao, B. Hayden, C. H. (Kees) de Groot
BaxSr1-xTiyMn1-yO3 BSTO thin films have been synthesized using a molecular beam epitaxy system. Novel coplanar waveguide tunable phase shifters have been developed using these Mn-doped perovskite films. The presented phase shifters operate with a phase shift angle of 12 degrees at 10GHz. at an applied bias of 10V on an area smaller than 1mm2, Insertion loss of ~3.2 dB is extracted from the S-parameter measurement. Small changes of composition lead to a significant variation of device phase shift, demonstrating the importance of synthesizing suitable structure BSTO film.
{"title":"(Ba, Sr)(Ti, Mn)O3 Perovskite Films for Co-Planar Waveguide Tunable Microwave Phase Shifters","authors":"Xingli He, Ioanna Bakaimi, Nur Zatil Ismah Hashim, Yudong Wang, A. Mostaed, I. Reaney, Q. Luo, S. Gao, B. Hayden, C. H. (Kees) de Groot","doi":"10.23919/EUMIC.2018.8539889","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539889","url":null,"abstract":"BaxSr1-xTiyMn1-yO3 BSTO thin films have been synthesized using a molecular beam epitaxy system. Novel coplanar waveguide tunable phase shifters have been developed using these Mn-doped perovskite films. The presented phase shifters operate with a phase shift angle of 12 degrees at 10GHz. at an applied bias of 10V on an area smaller than 1mm2, Insertion loss of ~3.2 dB is extracted from the S-parameter measurement. Small changes of composition lead to a significant variation of device phase shift, demonstrating the importance of synthesizing suitable structure BSTO film.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134187565","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/EUMIC.2018.8539942
Cuilin Chen, T. Sugiura, T. Yoshimasu
A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.
{"title":"A 14-GHz-Band Highly Linear Stacked FET Power Amplifier IC with 20.1 dBm P1dB and 40.1% PAE in 56-nm SOI CMOS","authors":"Cuilin Chen, T. Sugiura, T. Yoshimasu","doi":"10.23919/EUMIC.2018.8539942","DOIUrl":"https://doi.org/10.23919/EUMIC.2018.8539942","url":null,"abstract":"A high efficiency linear power amplifier (PA) IC is presented for 14 GHz-band wireless communication systems. A novel adaptive bias circuit with four-stacked MOSFET structure is proposed to enhance both the linearity and efficiency of the PA IC over the wide input power range. The PA IC is designed, fabricated and fully tested in 56-nm SOI CMOS. In linear mode, the PA IC has exhibited an output P1dB of 20.1 dBm at 14 GHz and a supply voltage of 4.0 V. The measured PAE at P1dB is as high as 40.1%. Moreover, the peak PAE of 41.6% is achieved in efficient mode.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133797294","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.23919/eumc.2018.8541809
Oguz Kazan, F. Koçer, O. Aydin Civi
This paper presents a low-noise amplifier (LNA) operating between 8−11 GHz. Measurement results show that the LNA has a gain of more than 20 dB while achieving a noise figure of less than 2 dB. The three stage topology achieves high linearity, providing an OIP3 of 29 dBm at 0.6 W power dissipation. The robustness tests show that the circuit survives to at least 2.5 W (34 dBm) input power. With a size of just 2.8 × 1.3 mm2(3.6 mm2) the presented LNA is compact when compared to the state of the art. The circuit is realized using the 0.25 μm Power GaN/SiC HEMT process by WIN Semiconductor.
{"title":"An X-Band Robust GaN Low-Noise Amplifier MMIC with sub 2 dB Noise Figure","authors":"Oguz Kazan, F. Koçer, O. Aydin Civi","doi":"10.23919/eumc.2018.8541809","DOIUrl":"https://doi.org/10.23919/eumc.2018.8541809","url":null,"abstract":"This paper presents a low-noise amplifier (LNA) operating between 8−11 GHz. Measurement results show that the LNA has a gain of more than 20 dB while achieving a noise figure of less than 2 dB. The three stage topology achieves high linearity, providing an OIP3 of 29 dBm at 0.6 W power dissipation. The robustness tests show that the circuit survives to at least 2.5 W (34 dBm) input power. With a size of just 2.8 × 1.3 mm2(3.6 mm2) the presented LNA is compact when compared to the state of the art. The circuit is realized using the 0.25 μm Power GaN/SiC HEMT process by WIN Semiconductor.","PeriodicalId":248339,"journal":{"name":"2018 13th European Microwave Integrated Circuits Conference (EuMIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134007051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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