Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549561
H. Sarvari, R. Ghayour
In this paper, based on the simple Pz orbital model, the energy diagram of armchair and zigzag graphene nanoribbons (A-GNR & Z-GNR) are studied by considering the first and third nearest neighbors (FNN & TNN). Then, we applied the Non-Equilibrium Green Function method to calculate the conduction in A-GNR. Thereafter, we analyzed the single gated GNRFET in real space provided that under any Vgs the energy of all the atoms within the channel remains the same (qVgs) and consequently, solving Poisson's equation is not needed anymore. The numerical calculation of the self-energy matrices is done based on two approaches, where the same result is obtained but different CPU times consumed. Therefore, one of the advantages of our approach is considerably lower consuming time of calculation. The number of atoms across the width of the channel nanoribbon is chosen so that the channel behaves as a semiconductor. However, for the reservoirs (source and drain) the number of atoms within their widths makes them metallic ribbons. The results of applying TNN in comparison with those of FNN show that TNN is more accurate and reliable. Finally, we can conclude that in A-GNRFET tunneling component of the current from reservoir to the channel is significant.
{"title":"A fast method to analyze and characterize the graphene nanoribbon FET by non-equilibrium Green's function","authors":"H. Sarvari, R. Ghayour","doi":"10.1109/SMELEC.2010.5549561","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549561","url":null,"abstract":"In this paper, based on the simple Pz orbital model, the energy diagram of armchair and zigzag graphene nanoribbons (A-GNR & Z-GNR) are studied by considering the first and third nearest neighbors (FNN & TNN). Then, we applied the Non-Equilibrium Green Function method to calculate the conduction in A-GNR. Thereafter, we analyzed the single gated GNRFET in real space provided that under any Vgs the energy of all the atoms within the channel remains the same (qVgs) and consequently, solving Poisson's equation is not needed anymore. The numerical calculation of the self-energy matrices is done based on two approaches, where the same result is obtained but different CPU times consumed. Therefore, one of the advantages of our approach is considerably lower consuming time of calculation. The number of atoms across the width of the channel nanoribbon is chosen so that the channel behaves as a semiconductor. However, for the reservoirs (source and drain) the number of atoms within their widths makes them metallic ribbons. The results of applying TNN in comparison with those of FNN show that TNN is more accurate and reliable. Finally, we can conclude that in A-GNRFET tunneling component of the current from reservoir to the channel is significant.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116757895","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549361
A. R. Kermany, N. M. Mohamed, B. Singh
Current gas sensors are mainly categorized into two modes of operation; chemical type operating by gas adsorption and physical type using ionization method. Chemical type conductivity-based gas detectors are large in size, they operate at high temperatures, and their response time is slow. Moreover most of them are only capable of detecting single type gases due to their low selectivity. Physical type ionization-based sensors have better selectivity and response time, but they are still huge and bulky. Both chemical and physical type gas detectors are using semiconductor materials as their sensing elements. With the discovery of nanomaterials, different types of sensing elements have been investigated to produce gas sensors which are smaller in size, one of which is carbon nanotubes (CNTs). Development of high performance sensor is now focused towards CNT-based sensors because of their inherent properties such as small size, large surface area and high electrical conductivity. CNTs based sensors are smaller in size; they have lower power consumption, higher sensitivity and better selectivity compared to existing semiconducting gas sensors. CNT-based gas sensors operate in room temperature which will result in safer environment. The work investigates the structural and electrical characterization of carbon nanotubes array for suitability as an effective sensing element in the ionization-based gas sensor.
{"title":"Ionization-based gas sensor using aligned MWCNTs array","authors":"A. R. Kermany, N. M. Mohamed, B. Singh","doi":"10.1109/SMELEC.2010.5549361","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549361","url":null,"abstract":"Current gas sensors are mainly categorized into two modes of operation; chemical type operating by gas adsorption and physical type using ionization method. Chemical type conductivity-based gas detectors are large in size, they operate at high temperatures, and their response time is slow. Moreover most of them are only capable of detecting single type gases due to their low selectivity. Physical type ionization-based sensors have better selectivity and response time, but they are still huge and bulky. Both chemical and physical type gas detectors are using semiconductor materials as their sensing elements. With the discovery of nanomaterials, different types of sensing elements have been investigated to produce gas sensors which are smaller in size, one of which is carbon nanotubes (CNTs). Development of high performance sensor is now focused towards CNT-based sensors because of their inherent properties such as small size, large surface area and high electrical conductivity. CNTs based sensors are smaller in size; they have lower power consumption, higher sensitivity and better selectivity compared to existing semiconducting gas sensors. CNT-based gas sensors operate in room temperature which will result in safer environment. The work investigates the structural and electrical characterization of carbon nanotubes array for suitability as an effective sensing element in the ionization-based gas sensor.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130982458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549578
D. A. Hadi, S. Hatta, N. Soin
Negative Bias Temperature Instability (NBTI) has become one of the critical reliability concerns as scaling down CMOS technology especially on the pMOSFET device. A simulation study had been conducted on 32 nm conventional pMOSFET using the technology CAD (TCAD) Sentaurus Synopsys simulator tool. In this paper, the effects of the gate oxide thickness together with drain bias variations on the NBTI are studied. The effect on the device parameters such as interface traps concentration (Nit), threshold voltage (Vth) and drain current (Id) degradation had been investigated and explained in detail.
{"title":"Effect of oxide thickness on 32nm Pmosfet reliability","authors":"D. A. Hadi, S. Hatta, N. Soin","doi":"10.1109/SMELEC.2010.5549578","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549578","url":null,"abstract":"Negative Bias Temperature Instability (NBTI) has become one of the critical reliability concerns as scaling down CMOS technology especially on the pMOSFET device. A simulation study had been conducted on 32 nm conventional pMOSFET using the technology CAD (TCAD) Sentaurus Synopsys simulator tool. In this paper, the effects of the gate oxide thickness together with drain bias variations on the NBTI are studied. The effect on the device parameters such as interface traps concentration (Nit), threshold voltage (Vth) and drain current (Id) degradation had been investigated and explained in detail.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"269 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133831274","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549381
A. Choudhary, V. Maheshwari, Abhishek Singh, R. Kar
This paper proposes a wave propagation based approach to derive crosstalk and delay between two coupled RLCG interconnects in the transform domain. The increase of clock frequency into the GHz range, coupled with longer length interconnects of small cross-section and low dielectric strength, can result in cross coupling effects between on-chip interconnects. The traditional analysis of crosstalk in a transmission line begins with a lossless LC representation, yielding a wave equation governing the system response. In order to determine the effects that this cross talk will have on circuit operation, the resulting delays and logic levels for the victim nets must be computed. In this paper, we propose four reflection wave propagation based analytical model for estimation of crosstalk. An emphasis was made on the distributed nature of the RLCG model, thus underlining the effect of parasitic coupling inductance and conductance on present and future on-chip interconnects.
{"title":"Wave propagation based analytical delay and cross talk noise model for distributed on-chip RLCG interconnects","authors":"A. Choudhary, V. Maheshwari, Abhishek Singh, R. Kar","doi":"10.1109/SMELEC.2010.5549381","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549381","url":null,"abstract":"This paper proposes a wave propagation based approach to derive crosstalk and delay between two coupled RLCG interconnects in the transform domain. The increase of clock frequency into the GHz range, coupled with longer length interconnects of small cross-section and low dielectric strength, can result in cross coupling effects between on-chip interconnects. The traditional analysis of crosstalk in a transmission line begins with a lossless LC representation, yielding a wave equation governing the system response. In order to determine the effects that this cross talk will have on circuit operation, the resulting delays and logic levels for the victim nets must be computed. In this paper, we propose four reflection wave propagation based analytical model for estimation of crosstalk. An emphasis was made on the distributed nature of the RLCG model, thus underlining the effect of parasitic coupling inductance and conductance on present and future on-chip interconnects.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124869906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549500
M. Othman
This presentation provides strategic direction for ubiquitous sensor networks and how we can benefit from the technology for the betterment of our lifes. An overview of the global progress is presented and the values of the technology in terms of the realization of WSN implementation in many vertical applications such as in the agriculture, medical, transportation and environment will be given. Some statements of benefits of the technology especially in the areas of medical for human and plants and environmental will be verbalised. Then followed by some case studies especially in the sensor technologies for chemical and bio-sensors will be presented. Issues in the realization both in terms of ethical and technological challenges in bio-medical sensors will be highlighted. MIMOS has been actively pursuing the R&D in bio-chemical sensors especially for the application in the field of agriculture. The multipurpose nature of the design can easily be modified to suit for many other applications in the future. In particular an integrated sensors for monitoring soil and environment (N, P, K, pH, T, Moisture and humidity sensors) has been produced and has been deployed at the POC level in several plantations industries. The R&D findings related to the sensors will be shared during the presentation. Last but not least a systemic approach in conducting and realizing gas sensors for environment will be given. The process established is very important to ensure the deliverables of the sensor systems meeting industrial requirements. A conclusion will be presented at the end of the presentation.
{"title":"Ubiquitous sensor technologies: The way moving forward","authors":"M. Othman","doi":"10.1109/SMELEC.2010.5549500","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549500","url":null,"abstract":"This presentation provides strategic direction for ubiquitous sensor networks and how we can benefit from the technology for the betterment of our lifes. An overview of the global progress is presented and the values of the technology in terms of the realization of WSN implementation in many vertical applications such as in the agriculture, medical, transportation and environment will be given. Some statements of benefits of the technology especially in the areas of medical for human and plants and environmental will be verbalised. Then followed by some case studies especially in the sensor technologies for chemical and bio-sensors will be presented. Issues in the realization both in terms of ethical and technological challenges in bio-medical sensors will be highlighted. MIMOS has been actively pursuing the R&D in bio-chemical sensors especially for the application in the field of agriculture. The multipurpose nature of the design can easily be modified to suit for many other applications in the future. In particular an integrated sensors for monitoring soil and environment (N, P, K, pH, T, Moisture and humidity sensors) has been produced and has been deployed at the POC level in several plantations industries. The R&D findings related to the sensors will be shared during the presentation. Last but not least a systemic approach in conducting and realizing gas sensors for environment will be given. The process established is very important to ensure the deliverables of the sensor systems meeting industrial requirements. A conclusion will be presented at the end of the presentation.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"82 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114171295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549541
A. Zoolfakar, H. Zulkefle, A. Zakaria, A. Manut, Abdul Aziz A, M. Zolkapli
This paper is to investigate correlation between doping technique towards diffusion rate and oxide growth rate. There are two types of doping technique that has been investigated such as Solid Source, SS and Spin on Dopant, SOD. Four inches wafers were used to investigate the effects of doping technique towards diffusion rate and oxidation rate. The resistivity of silicon substrate is measured by using 4-point probe while the oxide thickness is measured by an Ellipsometer. From this experiment, it can be concluded that diffusion rate of Solid Source is about 86% better than Spin on Dopand. While the oxide growth of Solid Source, SS is 3.6% better than Spin on Dopant.
{"title":"Correlation study between doping technique towards diffusion rate and oxidation rate","authors":"A. Zoolfakar, H. Zulkefle, A. Zakaria, A. Manut, Abdul Aziz A, M. Zolkapli","doi":"10.1109/SMELEC.2010.5549541","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549541","url":null,"abstract":"This paper is to investigate correlation between doping technique towards diffusion rate and oxide growth rate. There are two types of doping technique that has been investigated such as Solid Source, SS and Spin on Dopant, SOD. Four inches wafers were used to investigate the effects of doping technique towards diffusion rate and oxidation rate. The resistivity of silicon substrate is measured by using 4-point probe while the oxide thickness is measured by an Ellipsometer. From this experiment, it can be concluded that diffusion rate of Solid Source is about 86% better than Spin on Dopand. While the oxide growth of Solid Source, SS is 3.6% better than Spin on Dopant.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121881366","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549386
Ying-Ju Chiu, Kuo-Fu Lee, Ying-Chieh Chen, Hui-Wen Cheng, Yiming Li, Tony Chiang, Kuen-Yu Huang, T. Hsieh
In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 µs, the fall time < 1.5 µs and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel.
{"title":"Amorphous silicon thin-film transistor gate driver circuit design optimization using a simulation-based evolutionary technique","authors":"Ying-Ju Chiu, Kuo-Fu Lee, Ying-Chieh Chen, Hui-Wen Cheng, Yiming Li, Tony Chiang, Kuen-Yu Huang, T. Hsieh","doi":"10.1109/SMELEC.2010.5549386","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549386","url":null,"abstract":"In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 µs, the fall time < 1.5 µs and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129104559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549363
Abhijeet Kshirsagar, P. Apte, S. Duttagupta, S. Gangal
Cantilever based metal-to-metal contact type MEMS series switch has many applications namely in RFMEMS, Power MEMS etc. A typical MEMS switch consists of a cantilever as actuating element to make the contact between the two metal terminals of the switch. In electrostatic type switches the cantilever is pulled down by applying a pull-in voltage to the control electrode that is located below the middle portion of the cantilever while only the tip portion of the cantilever makes contact between the two terminals. Detailed analysis of bending of the cantilever for different pull-in voltages reveals some interesting facts. At low pull-in voltage the cantilever tip barely touches the two terminals, thus resulting in very less contact area. To increase contact area a very high pull-in voltage is applied. However it lifts the tip from the free end due to concave curving of the cantilever in the middle region of the cantilever where the electrode is located. It again results in less contact area. Furthermore, the high pull-in voltage produces large stress at the base of the cantilever close to the anchor. Therefore, an optimum, pull-in voltage must exist at which the concave curving is eliminated and contact area is maximum. In this paper authors report the procedure for finding a optimum voltage that can give maximum contact force across the two terminals. Taguchi method which is well suited to solve such optimization problem is used in the present work. The switch parameters, like cantilever length, cantilever width, electrode position, thickness of the metal of two terminals, are taken as 'control factors' with 4 levels each and simulation is performed for various combinations of the control factors as these appear in the rows of the L16 orthogonal array. The paper reports the optimum design of the MEMS switch.
{"title":"Optimization of pull-in voltage and contact force for MEMS series switch using Taguchi method","authors":"Abhijeet Kshirsagar, P. Apte, S. Duttagupta, S. Gangal","doi":"10.1109/SMELEC.2010.5549363","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549363","url":null,"abstract":"Cantilever based metal-to-metal contact type MEMS series switch has many applications namely in RFMEMS, Power MEMS etc. A typical MEMS switch consists of a cantilever as actuating element to make the contact between the two metal terminals of the switch. In electrostatic type switches the cantilever is pulled down by applying a pull-in voltage to the control electrode that is located below the middle portion of the cantilever while only the tip portion of the cantilever makes contact between the two terminals. Detailed analysis of bending of the cantilever for different pull-in voltages reveals some interesting facts. At low pull-in voltage the cantilever tip barely touches the two terminals, thus resulting in very less contact area. To increase contact area a very high pull-in voltage is applied. However it lifts the tip from the free end due to concave curving of the cantilever in the middle region of the cantilever where the electrode is located. It again results in less contact area. Furthermore, the high pull-in voltage produces large stress at the base of the cantilever close to the anchor. Therefore, an optimum, pull-in voltage must exist at which the concave curving is eliminated and contact area is maximum. In this paper authors report the procedure for finding a optimum voltage that can give maximum contact force across the two terminals. Taguchi method which is well suited to solve such optimization problem is used in the present work. The switch parameters, like cantilever length, cantilever width, electrode position, thickness of the metal of two terminals, are taken as 'control factors' with 4 levels each and simulation is performed for various combinations of the control factors as these appear in the rows of the L16 orthogonal array. The paper reports the optimum design of the MEMS switch.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129510103","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2010-06-28DOI: 10.1109/SMELEC.2010.5549418
Zhang Lei, Zhao Xian-li, Wang Xing-hua, Qu Ruo-yuan
This paper presents a sigma-delta modulator of two-order with switched-capacitors (SC) techniques for low power in 0.18um CMOS process. Without continues current transmission SC techniques present a discrete low power system. And a low power op amplifier with discrete common-mode feedback and a dynamic comparator is also designed. This new amp works under the supply of 1.8v and with the direct current of 200uA. The tool Matlab is used to simulate the behavior system, while Cadence is used to design the circuit and the layout in 0.18 um CMOS (1.8v model) process. The modulator achieves 81dB dynamic range in 24-kHz signal bandwidth with OSR=128. And it consumes 0.8mW under 1.8v supply voltage.
本文提出了一种采用开关电容(SC)技术的低功耗二阶σ - δ调制器，用于0.18um CMOS工艺。无连续电流传输的SC技术是一种离散的低功率系统。设计了具有离散共模反馈和动态比较器的低功率运算放大器。这种新型放大器在1.8v的电源下工作，直流电为200uA。利用Matlab工具对系统行为进行仿真，利用Cadence在0.18 um CMOS (1.8v模型)工艺下进行电路设计和布局。该调制器在24khz信号带宽下实现81dB动态范围，OSR=128。电源电压为1.8v时，功耗为0.8mW。
{"title":"Two-order low-power sigma-delta modulator with SC techniques","authors":"Zhang Lei, Zhao Xian-li, Wang Xing-hua, Qu Ruo-yuan","doi":"10.1109/SMELEC.2010.5549418","DOIUrl":"https://doi.org/10.1109/SMELEC.2010.5549418","url":null,"abstract":"This paper presents a sigma-delta modulator of two-order with switched-capacitors (SC) techniques for low power in 0.18um CMOS process. Without continues current transmission SC techniques present a discrete low power system. And a low power op amplifier with discrete common-mode feedback and a dynamic comparator is also designed. This new amp works under the supply of 1.8v and with the direct current of 200uA. The tool Matlab is used to simulate the behavior system, while Cadence is used to design the circuit and the layout in 0.18 um CMOS (1.8v model) process. The modulator achieves 81dB dynamic range in 24-kHz signal bandwidth with OSR=128. And it consumes 0.8mW under 1.8v supply voltage.","PeriodicalId":308501,"journal":{"name":"2010 IEEE International Conference on Semiconductor Electronics (ICSE2010)","volume":"135 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2010-06-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129478382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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