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2021 7th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)最新文献

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Bonded interface properties of Nb direct bonding with Si intermediate layer for 3D interconnection of superconducting devices 超导器件三维互连中Nb与Si中间层直接键合的键合界面特性
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598360
Yuta Takahashi, M. Fujino, H. Nakagawa, K. Kikuchi, T. Taino
In this study, Deposited Nb and Si/Nb samples were bonded directly by surface activated bonding method at room temperature. TEM observation of the Nb/Nb interface confirmed an intermediate layer of about 3 nm. A superconducting current of 4–6 mA was observed at 0.3 K in a Si (5 nm) sample deposited on Nb thin film.
在本研究中,沉积的Nb和Si/Nb样品在室温下采用表面活化键合法直接键合。对Nb/Nb界面的透射电镜观察证实存在约3 nm的中间层。在0.3 K的温度下,在Nb薄膜上沉积的Si (5 nm)样品可获得4 ~ 6 mA的超导电流。
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引用次数: 0
Direct bonding of GaN and Si substrates using wet cleaning processes 用湿法清洗工艺直接结合GaN和Si衬底
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598359
S. Fukumoto, T. Matsumae, Y. Kurashima, H. Takagi, H. Umezawa, M. Hayase, E. Higurashi
Gallium nitride (GaN) substrate was directly bonded with silicon substrate using a sequential wet treatment consisting of H2SO4/H2O2 and NH3/H2O2 mixtures under atmospheric conditions. The bonding strength of the bonded substrates annealed at 300 °C reached up to 6.98 MPa. This study contributes to the development for GaN-based integrated devices.
采用常压条件下由H2SO4/H2O2和NH3/H2O2混合物组成的顺序湿法处理,将氮化镓(GaN)衬底直接与硅衬底结合。经300℃退火处理后,结合基板的结合强度可达6.98 MPa。本研究有助于gan集成器件的发展。
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引用次数: 0
Microstructure analysis and tensile strength of low temperature Cu bonds using highly-<111> Cu 高铜低温铜键的显微组织分析及抗拉强度
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598367
J. Ong, K. Shie, Chih Chen
This investigation shows bonding strength improvement by adjusting the microstructures in the Cu joints. The Cu pad used in this investigation is nanotwinned Cu pad with surface ratio more than 95% <111> preferred oriented. Result showed that bonding strength can be obtained in low temperature and pressure applied and short time during bonding process. Once the bonding time or pressure increases, recrystallization and grain growth triggered. By adjusting bonding time or bonding temperature, the microstructure in Cu pad can be controlled thus the bonding strength can be improved by adjusting microstructures in the Cu pads.
研究表明,通过调整铜接头的显微组织,可以提高铜接头的结合强度。本研究中使用的铜衬垫是表面比大于95%的纳米孪晶铜衬垫。结果表明,在较低的温度、较低的压力和较短的粘接时间内即可获得较好的粘接强度。一旦键合时间或压力增加,就会引发再结晶和晶粒长大。通过调整键合时间或键合温度,可以控制铜焊盘的微观结构,从而通过调整铜焊盘的微观结构来提高键合强度。
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引用次数: 1
Impacts of Misalignment on Bonding Strength of Cu-Cu Hybrid Bonding 错位对Cu-Cu杂化键合强度的影响
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598381
Shunsuke Furuse, N. Fujii, Kengo Kotoo, Naoki Ogawa, Taichi Yamada, T. Hirano, S. Saito, Y. Hagimoto, H. Iwamoto
In this study, we investigated the relationship between misalignment and bonding strength before and after annealing in the Cu-Cu hybrid bonding process. Before the annealing process, the bonding strength tended to decrease linearly as the misalignment increased. However, we found that this correlation changed after the annealing, seemingly due to thermal expansion in the Cu.
在本研究中,我们研究了Cu-Cu杂化键合过程中退火前后的不对准与键合强度的关系。在退火处理前,随着取向偏差的增加,结合强度呈线性降低的趋势。然而,我们发现这种相关性在退火后发生了变化,似乎是由于Cu中的热膨胀。
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引用次数: 0
Room Temperature Bonding of Semiconductor Materials Based on Mo/Au Interlayer 基于Mo/Au中间层的半导体材料室温键合
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598426
Kang Wang, Wenbo Hu, Shengli Wu, Shuwei Fan, Hongxing Wang
For realizing the heterogeneous integration of semiconductor materials and overcoming the heat dissipation problem of GaN-based high-power semiconductor devices, Mo/Au interlayers were applied to realize the room temperature bonding between Si and Si, GaN and Si, GaN and diamond, GaN HEMTs and diamond wafers in atmospheric air. Low voidage and high bonding strength were achieved. In addition, the temperature distributions and thermal resistances of the devices bonded on different substrates (sapphire, Si, SiC and diamond) with Mo/Au interlayers were calculated by numerical simulation.
为了实现半导体材料的非均质集成,克服GaN基大功率半导体器件的散热问题,采用Mo/Au夹层在大气中实现了Si与Si、GaN与Si、GaN与金刚石、GaN hemt与金刚石晶圆之间的室温键合。获得了低电压和高结合强度。此外,通过数值模拟计算了不同衬底(蓝宝石、Si、SiC和金刚石)上带有Mo/Au夹层的器件的温度分布和热阻。
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引用次数: 0
New Long Life Fast Atom Beam Source for Surface Activated Bonding 用于表面活化键合的新型长寿命快原子束源
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598414
R. Morisaki, J. Sakurai, C. Oka, T. Yamazaki, T. Akao, T. Takahashi, H. Tsuji, N. Ohno, S. Hata
We clarify a mechanism for longer lifetime of the fast atom beam (FAB) source for surface activated bonding proposed in our previous study. The new FAB source achieves highly efficient FAB irradiation and suppression of generation of fine carbon (C) particles. In this study, the distribution of sputtering and deposition on the inner wall of the C electrodes have been evaluated by measuring the thickness of the electrodes before and after long-time use. In the new source, the C erosion area due to sputtering is localized near the irradiation port and the sputtered C is deposited on other electrode surface, whereas in the conventional one, the erosion occurs on all surfaces of C electrodes. The reduction of electrode erosion due to sputtering contributes significantly to the extension of the lifetime of the new FAB source.
我们阐明了在我们之前的研究中提出的快速原子束(FAB)源延长表面激活键合寿命的机制。新型FAB源实现了高效的FAB辐照和抑制细碳(C)颗粒的生成。本研究通过测量C电极长期使用前后的厚度,对C电极内壁溅射和沉积的分布进行了评价。在新源中,由于溅射导致的C腐蚀区域局限于辐照口附近,溅射后的C沉积在其他电极表面,而在传统源中,C电极的所有表面都发生了腐蚀。由于溅射导致的电极侵蚀的减少对延长新FAB源的使用寿命有重要贡献。
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引用次数: 0
Anodic Bonding a Low Temperature Bonding Method for Processed MEMS and CMOS Wafers 阳极键合:加工MEMS和CMOS晶圆的低温键合方法
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598393
R. Knechtel, H. Mehner, T. Berthold, C. Van Buggenhout, Dirk Terryn
Anodic bonding is in general a very attractive low temperature bonding method. Utilizing the progress in glass structuring and with adapted bonding conditions it can be used for CMOS-MEMS integrated wafers enabaling very complex, multifunctional chip solutions.
阳极键合通常是一种非常有吸引力的低温键合方法。利用玻璃结构的进步和适应的键合条件,它可以用于CMOS-MEMS集成晶圆,实现非常复杂的多功能芯片解决方案。
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引用次数: 0
High temperature stability of p+-Si/p-diamond heterojunction diodes p+-Si/p-金刚石异质结二极管的高温稳定性
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598364
Yota Uehigashi, S. Ohmagari, H. Umezawa, H. Yamada, Jianbo Liang, N. Shigekawa
The high-temperature electrical stability of p+-Si/p-diamond heterojunction diodes (HDs) fabricated by using surface activated bonding are investigate and compared with that of Al/diamond Schottky barrier diodes (SBDs). We suggest that p+-Si/p-diamond HDs are stabler than diamond SBDs against annealing.
研究了表面活化键合制备的p+-Si/p-金刚石异质结二极管(hd)的高温电稳定性,并与Al/金刚石肖特基势垒二极管(sdd)进行了比较。我们认为p+-Si/p-金刚石hdd在退火时比金刚石sdd更稳定。
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引用次数: 1
Laminated wafer with the conductive diamond layer using surface activated bonding at room temperature for micro-electro mechanical systems sensors 在室温下采用表面活化键合的导电金刚石层叠层晶片,用于微机电系统传感器
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598418
Yoshihiro Koga, S. Yamada, Shuji Tanaka, K. Kurita
We proposed the fabrication of the laminated wafer with the conductive diamond layer as an alternative SOI wafer for micro-electro mechanical systems (MEMS) sensors by chemical vapor deposition (CVD) and surface-activated bonding (SAB), in order to prevent the charge-up of devices on a BOX layer during plasma treatments. We demonstrated that the use of this laminated wafer could be deposited the boron-doped diamond layer and be bonded a silicon wafer (layer) at room temperature without a thermal stress. Therefore, we believe that this laminated wafer can contribute to the improvement of MEMS sensors as an alternative SOI wafer.
为了防止等离子体处理过程中BOX层上器件的充电,我们提出了采用化学气相沉积(CVD)和表面激活键合(SAB)方法制备导电金刚石层的层压晶片,作为微机电系统(MEMS)传感器的替代SOI晶片。我们证明了使用这种层压晶片可以在室温下沉积掺杂硼的金刚石层并与硅晶片(层)结合而不产生热应力。因此,我们相信这种层压晶圆可以作为替代SOI晶圆,对MEMS传感器的改进做出贡献。
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引用次数: 0
Ultra-broadband Integrated Capacitive Silicon Interposer assembled with SnBi Eutectic Solder 用SnBi共晶焊料组装的超宽带集成电容硅中间层
Pub Date : 2021-10-05 DOI: 10.1109/LTB-3D53950.2021.9598388
C. Muller, M. Jatlaoui, M. Pommier
Low temperature solders usage for broadband assemblies represent an important challenge for the industry. Using lower temperatures for reflow subsequently shows less deformation on mother boards used for optical sub-assemblies and then less RF parasitics. However, some parts in optical sub-assemblies, like laser diodes, require good thermal dissipation to work properly and avoid unwanted modulations. This work will present an innovative way to use SnBi (Tin-Bismuth) eutectic alloy to assemble an integrated capacitive Silicon interposer on top of which a laser diode can be assembled as well.
低温焊料用于宽带组件是该行业面临的一个重要挑战。使用较低的温度进行回流,随后在用于光学子组件的母板上显示更少的变形,然后更少的射频寄生。然而,光学子组件中的一些部件,如激光二极管,需要良好的散热才能正常工作,并避免不必要的调制。这项工作将提出一种创新的方法,使用SnBi(锡铋)共晶合金组装集成电容硅中间体,其上也可以组装激光二极管。
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引用次数: 0
期刊
2021 7th International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D)
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