Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1271989
W. Haensch
Fabrication of sub-100 nm strained Si/SiGe MOSFETs using CMOS technology have been demonstrated, with current drives enhancements in both NFET and PFET. Material properties of strained Si and SiGe require careful modifications in CMOS process flow. Band offset induced shift in threshold voltages need to be compensated by device design and the difference in dopant diffusion properties also need to be taken into account. SGOI substrates can be fabricated by SIMOX, thermal diffusion of Ge and layer transfer techniques.
{"title":"Strained Si/SiGe technology: status and opportunities","authors":"W. Haensch","doi":"10.1109/ISDRS.2003.1271989","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1271989","url":null,"abstract":"Fabrication of sub-100 nm strained Si/SiGe MOSFETs using CMOS technology have been demonstrated, with current drives enhancements in both NFET and PFET. Material properties of strained Si and SiGe require careful modifications in CMOS process flow. Band offset induced shift in threshold voltages need to be compensated by device design and the difference in dopant diffusion properties also need to be taken into account. SGOI substrates can be fabricated by SIMOX, thermal diffusion of Ge and layer transfer techniques.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114834148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272131
J. Colinge
This paper deals with evolution of silicon-on-insulator MOSFET. In 1964 partially depleted devices fabricated on silicon-on-sapphire substrates was developed and was successfully used in numerous military and civilian applications and still used to realize commercial HF circuits in fully depleted CMOS. The first fully depleted SOI MOSFET was established in early 1980 with superior transconductance, current drive and subthreshold swing. Double-gate SOI MOSFET was established in 1984 with resemblance of the XMOS structure and good short-channel characteristics. Later vertical-channel MOSFET, triangular-wire SOI MOSFET and /spl Delta/-channel MOSFET was established. Practical implementation of planar double-gate MOSFET was observed in 1990. The evolution of SOI MOSFET seems ineluctable as high drive with short-channel immunity becomes a problem and can no longer be solved by classical approach.
{"title":"The evolution of silicon-on-insulator MOSFETs","authors":"J. Colinge","doi":"10.1109/ISDRS.2003.1272131","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272131","url":null,"abstract":"This paper deals with evolution of silicon-on-insulator MOSFET. In 1964 partially depleted devices fabricated on silicon-on-sapphire substrates was developed and was successfully used in numerous military and civilian applications and still used to realize commercial HF circuits in fully depleted CMOS. The first fully depleted SOI MOSFET was established in early 1980 with superior transconductance, current drive and subthreshold swing. Double-gate SOI MOSFET was established in 1984 with resemblance of the XMOS structure and good short-channel characteristics. Later vertical-channel MOSFET, triangular-wire SOI MOSFET and /spl Delta/-channel MOSFET was established. Practical implementation of planar double-gate MOSFET was observed in 1990. The evolution of SOI MOSFET seems ineluctable as high drive with short-channel immunity becomes a problem and can no longer be solved by classical approach.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"136-137 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117144080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272015
S. Chang, Y. Su, T. Kuan, C. H. Ko, S.C. Wei, W. Lan, J. Webb, Y. Cherng, S.C. Chen
Photo-enhanced chemical (PEC) wet etching technology was used to etch GaN and AlGaN epitaxial layers. Figure 1 shows PEC etch rate for the GaN and Al/sub x/Ga/sub 1-x/N epitaxial layers in aqueous KOH and H/sub 3/PO/sub 4/ solutions. It was found that the maximum etch rates were 510 nm/min, 1960 nm/min, 300 nm/min and 0 nm/min for GaN, Al/sub 0.175/Ga/sub 0.825/N, Al/sub 0.23/Ga/sub 0.77/N and Al/sub 0.4/Ga/sub 0.6/N, respectively. Nitride-based Schottky diodes and heterostructure field effect transistors (HFETs) were also fabricated by PEC wet etching. As shown in figures 2, 3 and 4, it was found that we could achieve a saturated I/sub D/ larger than 850 mA/mm and a maximum g/sub m/ about 163 mS/mm from PEC wet etched HFET with a 0.5/spl mu/m gate length. Compared with dry etched devices, the leakage currents observed from the PEC wet etched devices were also found to be smaller.
{"title":"Nitride-based devices fabricated by wet etching","authors":"S. Chang, Y. Su, T. Kuan, C. H. Ko, S.C. Wei, W. Lan, J. Webb, Y. Cherng, S.C. Chen","doi":"10.1109/ISDRS.2003.1272015","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272015","url":null,"abstract":"Photo-enhanced chemical (PEC) wet etching technology was used to etch GaN and AlGaN epitaxial layers. Figure 1 shows PEC etch rate for the GaN and Al/sub x/Ga/sub 1-x/N epitaxial layers in aqueous KOH and H/sub 3/PO/sub 4/ solutions. It was found that the maximum etch rates were 510 nm/min, 1960 nm/min, 300 nm/min and 0 nm/min for GaN, Al/sub 0.175/Ga/sub 0.825/N, Al/sub 0.23/Ga/sub 0.77/N and Al/sub 0.4/Ga/sub 0.6/N, respectively. Nitride-based Schottky diodes and heterostructure field effect transistors (HFETs) were also fabricated by PEC wet etching. As shown in figures 2, 3 and 4, it was found that we could achieve a saturated I/sub D/ larger than 850 mA/mm and a maximum g/sub m/ about 163 mS/mm from PEC wet etched HFET with a 0.5/spl mu/m gate length. Compared with dry etched devices, the leakage currents observed from the PEC wet etched devices were also found to be smaller.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"95 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115834499","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272065
D. Prentice, K. Roenker
The operation and performance of the organic, pentacene-based MOSFETs has been studied using a two dimensional, drift-diffusion approach utilizing a commercial numerical device simulator. Organic semiconductors have been proposed as a replacement for amorphous or polycrystalline-based silicon devices for low cost applications such as RF tags and display drivers. While extensive experimental development of these devices has proceeded, their study using device modeling has received comparatively little attention. In this work, the results of device modeling using a commercial simulator will be compared with the experimental reports for pentacene-based, p-channel MOSFETs for both bottom and top contact geometries. The results demonstrate that commercial simulators can be used to model these devices in spite of the nontraditional nature of the hole transport in organic semiconductors.
{"title":"Numerical modeling study of organic pentacene-based MOSFETs","authors":"D. Prentice, K. Roenker","doi":"10.1109/ISDRS.2003.1272065","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272065","url":null,"abstract":"The operation and performance of the organic, pentacene-based MOSFETs has been studied using a two dimensional, drift-diffusion approach utilizing a commercial numerical device simulator. Organic semiconductors have been proposed as a replacement for amorphous or polycrystalline-based silicon devices for low cost applications such as RF tags and display drivers. While extensive experimental development of these devices has proceeded, their study using device modeling has received comparatively little attention. In this work, the results of device modeling using a commercial simulator will be compared with the experimental reports for pentacene-based, p-channel MOSFETs for both bottom and top contact geometries. The results demonstrate that commercial simulators can be used to model these devices in spite of the nontraditional nature of the hole transport in organic semiconductors.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116115364","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272064
T. Rakshit, G. Liang, Avik W. Ghosh, S. Datta
This paper demonstrates the negative differential resistance in silicon-molecule heterostructure. The NDR is expected to occur in the positive bias direction for molecules on degenerately doped p-type silicon substrates and in the negative bias direction for degenerately doped n-type substrates.
{"title":"Negative differential resistance in silicon-molecule heterostructure","authors":"T. Rakshit, G. Liang, Avik W. Ghosh, S. Datta","doi":"10.1109/ISDRS.2003.1272064","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272064","url":null,"abstract":"This paper demonstrates the negative differential resistance in silicon-molecule heterostructure. The NDR is expected to occur in the positive bias direction for molecules on degenerately doped p-type silicon substrates and in the negative bias direction for degenerately doped n-type substrates.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"23 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116249021","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272110
T. D. Boone, H. Tsukamoto, J. Woodall
A potential luminesence intensity modulation technique in LED utilizing lateral carrier drift and optical exit apertures has been proposed. An externally applied lateral voltage can dynamically control both the external intensity and the spatial position of a photoluminescence spot from a GaAs region. Lateral drift of the photogenerated electrons from their original position by the electric field resulting from the applied voltage produces these effects. If the bulk of the electrons are transported outside the spatial limits of the area defined to be the exit aperture before recombining the external light emission from the semiconductor is effectively attenuated. This technique, referred to as field aperture selection transport (FAST).
{"title":"Rapid modulation of GaAs luminesence intensity using lateral drift with selectable apertures","authors":"T. D. Boone, H. Tsukamoto, J. Woodall","doi":"10.1109/ISDRS.2003.1272110","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272110","url":null,"abstract":"A potential luminesence intensity modulation technique in LED utilizing lateral carrier drift and optical exit apertures has been proposed. An externally applied lateral voltage can dynamically control both the external intensity and the spatial position of a photoluminescence spot from a GaAs region. Lateral drift of the photogenerated electrons from their original position by the electric field resulting from the applied voltage produces these effects. If the bulk of the electrons are transported outside the spatial limits of the area defined to be the exit aperture before recombining the external light emission from the semiconductor is effectively attenuated. This technique, referred to as field aperture selection transport (FAST).","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123053257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272102
Y. Bai, Z. Dilli, N. Goldsman, G. Metze
The numerical modeling of on-chip inductor structures, applied to the comparison of inductor geometries was studied. The frequency-dependence of inductor characteristics depends on skin effect in the conductors and induced currents in the semiconductor substrates.
{"title":"Frequency-dependent modeling of on-chip inductors on lossy substrates","authors":"Y. Bai, Z. Dilli, N. Goldsman, G. Metze","doi":"10.1109/ISDRS.2003.1272102","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272102","url":null,"abstract":"The numerical modeling of on-chip inductor structures, applied to the comparison of inductor geometries was studied. The frequency-dependence of inductor characteristics depends on skin effect in the conductors and induced currents in the semiconductor substrates.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121672070","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272016
S. Chang, Y. Su, T. Kuan, C. H. Ko, S.C. Wei, W. Lan, Y. Cherng, S.C. Chen
Nitride-based Al/sub 0.24/Ga/sub 0.76/N/GaN heterostructure field effect transistors (HFETs) with carrier confinement layers were fabricated. The results found that the enhanced 2 dimensional electron gas (2DEG) carrier mobility from 1070 to 1180 cm/sup 2/V/sup -1/sec/sup -1/ by the insertion of a Mg-doped semi-insulating carrier confinement layer with a Cp/sub 2/Mg flow rate of 2.36/spl times/10/sup -8/ mole/min and smoother sample surface. The DC and RF characteristics of these HFETs were also good.
{"title":"Nitride-based HFETs with carrier confinement layers","authors":"S. Chang, Y. Su, T. Kuan, C. H. Ko, S.C. Wei, W. Lan, Y. Cherng, S.C. Chen","doi":"10.1109/ISDRS.2003.1272016","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272016","url":null,"abstract":"Nitride-based Al/sub 0.24/Ga/sub 0.76/N/GaN heterostructure field effect transistors (HFETs) with carrier confinement layers were fabricated. The results found that the enhanced 2 dimensional electron gas (2DEG) carrier mobility from 1070 to 1180 cm/sup 2/V/sup -1/sec/sup -1/ by the insertion of a Mg-doped semi-insulating carrier confinement layer with a Cp/sub 2/Mg flow rate of 2.36/spl times/10/sup -8/ mole/min and smoother sample surface. The DC and RF characteristics of these HFETs were also good.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125930093","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272161
C. Richter, C. Hacker, L. Richter
This paper presents the results of studies of solution-based attachment of long-chain aliphatic molecules to hydrogen-terminated Si surfaces to pursue the electrical properties of organic monolayers and as a first step towards creating hybrid silicon-molecular nanoelectronic devices. The effect of differing alkane chain length on the electrical properties were measured. To investigate the quality of the organic monolayers measured in these devices, they were physically and chemically characterized with infrared spectroscopy, spectroscopic ellipsometry, and contact angle measurement.
{"title":"Molecular devices formed by direct monolayer attachment to silicon","authors":"C. Richter, C. Hacker, L. Richter","doi":"10.1109/ISDRS.2003.1272161","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272161","url":null,"abstract":"This paper presents the results of studies of solution-based attachment of long-chain aliphatic molecules to hydrogen-terminated Si surfaces to pursue the electrical properties of organic monolayers and as a first step towards creating hybrid silicon-molecular nanoelectronic devices. The effect of differing alkane chain length on the electrical properties were measured. To investigate the quality of the organic monolayers measured in these devices, they were physically and chemically characterized with infrared spectroscopy, spectroscopic ellipsometry, and contact angle measurement.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129311140","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-12-10DOI: 10.1109/ISDRS.2003.1272053
R. Webster, A. Anwar
In this paper, we presents the first measurement of minimum noise figure in AlGaAsSb/InGaAs/AlGaAsSb metamorphic quantum well HEMTs (MHEMTs). MHEMTs allow the development of InGaAs-based HEMTs on inexpensive GaAs substrates in contrast to the rather expensive InP-substrates. A measured low noise figure, F/sub min/ is a function of frequency at different gate biases. This provides an attractive alternative technology for the realization of low noise millimeter wave devices.
{"title":"Noise in metamorphic AlGaAsSb/InGaAs/AlGaAsSb HEMTs","authors":"R. Webster, A. Anwar","doi":"10.1109/ISDRS.2003.1272053","DOIUrl":"https://doi.org/10.1109/ISDRS.2003.1272053","url":null,"abstract":"In this paper, we presents the first measurement of minimum noise figure in AlGaAsSb/InGaAs/AlGaAsSb metamorphic quantum well HEMTs (MHEMTs). MHEMTs allow the development of InGaAs-based HEMTs on inexpensive GaAs substrates in contrast to the rather expensive InP-substrates. A measured low noise figure, F/sub min/ is a function of frequency at different gate biases. This provides an attractive alternative technology for the realization of low noise millimeter wave devices.","PeriodicalId":369241,"journal":{"name":"International Semiconductor Device Research Symposium, 2003","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131310665","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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