首页 > 最新文献

2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)最新文献

英文 中文
A Compact CMOS 76–82 GHz Super-Harmonic VCO with 189 dBc/Hz FoM Operating based on Harmonic-Assisted ISF Manipulation 一种基于谐波辅助ISF操作的189dbc /Hz FoM超谐波压控振荡器
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863140
Behnam Moradi, Xuyang Liu, Michael M. Green, Hamidreza Aghasi
A compact super- harmonic voltage-controlled oscillator (VCO) for mm-wave radar applications employing a novel distributed structure operating at a center frequency of 78.9 GHz is presented. An state-of-the-art phase-noise performance is achieved by leveraging the strong presence of second harmonic at the output. This new VCO structure operates based on the minimization of the thermal noise contribution for fundamental signal and thus, improves the phase noise. The V CO is fabricated in 65nm Bulk CMOS technology and attains a measured phase-noise of −109.82 dBc/Hz at 1 MHz offset frequency, corresponding to a figure-of-merit of 189dBc/Hz. The VCO also demonstrates 7 % of frequency tuning, 4.6 % efficiency, and −0.6 dBm peak output power. To the best of our knowledge, this is the highest reported FOM for a super-harmonic CMOS oscillator operating at this frequency band.
提出了一种用于毫米波雷达的紧凑型超谐波压控振荡器(VCO),该振荡器采用新颖的分布式结构,工作在78.9 GHz的中心频率。最先进的相位噪声性能是通过利用输出端的强二次谐波来实现的。这种新的压控振荡器结构基于对基波信号的热噪声贡献最小化,从而改善了相位噪声。vco采用65nm Bulk CMOS技术制造,在1mhz偏置频率下,相位噪声测量值为- 109.82 dBc/Hz,相应的品质系数为189dBc/Hz。该VCO还具有7%的频率调谐,4.6%的效率和- 0.6 dBm的峰值输出功率。据我们所知,这是在该频段工作的超谐波CMOS振荡器报道的最高FOM。
{"title":"A Compact CMOS 76–82 GHz Super-Harmonic VCO with 189 dBc/Hz FoM Operating based on Harmonic-Assisted ISF Manipulation","authors":"Behnam Moradi, Xuyang Liu, Michael M. Green, Hamidreza Aghasi","doi":"10.1109/RFIC54546.2022.9863140","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863140","url":null,"abstract":"A compact super- harmonic voltage-controlled oscillator (VCO) for mm-wave radar applications employing a novel distributed structure operating at a center frequency of 78.9 GHz is presented. An state-of-the-art phase-noise performance is achieved by leveraging the strong presence of second harmonic at the output. This new VCO structure operates based on the minimization of the thermal noise contribution for fundamental signal and thus, improves the phase noise. The V CO is fabricated in 65nm Bulk CMOS technology and attains a measured phase-noise of −109.82 dBc/Hz at 1 MHz offset frequency, corresponding to a figure-of-merit of 189dBc/Hz. The VCO also demonstrates 7 % of frequency tuning, 4.6 % efficiency, and −0.6 dBm peak output power. To the best of our knowledge, this is the highest reported FOM for a super-harmonic CMOS oscillator operating at this frequency band.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121392369","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 2MHz 4-48V $mathrm{V}_{text{IN}}$ Flying-Capacitor Based Floating-Ground GaN DC-DC Converter with Real-Time Inductor Peak-Current Detection and $6mu mathrm{s}$ Load Transient Response 一种2MHz 4-48V $ mathm {V}_{text{IN}}$基于飞电容的浮地GaN DC-DC变换器,具有实时电感峰值电流检测和$6 mathm {s}$负载瞬态响应
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863089
Weizhong Chen, Chang Yang, Lei Chen, P. Gui
This paper presents a 2MHz 4V-to-48V VIN, GaN-based buck-boost converter with optimized buck-boost mode, enhanced safe protection, and fast transient response for automotive Advanced Driving Assistant Systems (ADAS). A flying-capacitor-based floating-ground topology is proposed first time to solve the issue associated with extremely short on time, improve power efficiency in the buck-boost region and provide real-time detection and management of the inductor peak current. This floating-ground technique helps alleviate the problem of efficiency drop in the four-switch buck-boost topology and ensures converter/load safety. An indirect current sensor is also proposed, which allows for sensing the inductor current change in the buck-boost mode without using any bulky sensing resistors and achieves $k$ fast transient response with 100mv-undershoot/80mV-overshoot for 1A load current change. This converter achieves a maximum efficiency of 92% which is comparable to the state-of-the-art buck-boost schemes
本文提出了一种2MHz 4v - 48v VIN,基于gan的buck-boost转换器,具有优化的buck-boost模式,增强的安全保护和快速的瞬态响应,适用于汽车高级驾驶辅助系统(ADAS)。首次提出了一种基于飞电容的浮地拓扑结构,解决了瞬时极短的问题,提高了升压区域的功率效率,并提供了对电感峰值电流的实时检测和管理。这种浮地技术有助于缓解四开关降压升压拓扑中的效率下降问题,并确保变换器/负载的安全。还提出了一种间接电流传感器,该传感器允许在降压-升压模式下感应电感电流变化,而无需使用任何笨重的感应电阻,并在1A负载电流变化时实现100mv-过调/ 80mv -过调的快速瞬态响应。该转换器达到92%的最高效率,可与最先进的buck-boost方案相媲美
{"title":"A 2MHz 4-48V $mathrm{V}_{text{IN}}$ Flying-Capacitor Based Floating-Ground GaN DC-DC Converter with Real-Time Inductor Peak-Current Detection and $6mu mathrm{s}$ Load Transient Response","authors":"Weizhong Chen, Chang Yang, Lei Chen, P. Gui","doi":"10.1109/RFIC54546.2022.9863089","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863089","url":null,"abstract":"This paper presents a 2MHz 4V-to-48V VIN, GaN-based buck-boost converter with optimized buck-boost mode, enhanced safe protection, and fast transient response for automotive Advanced Driving Assistant Systems (ADAS). A flying-capacitor-based floating-ground topology is proposed first time to solve the issue associated with extremely short on time, improve power efficiency in the buck-boost region and provide real-time detection and management of the inductor peak current. This floating-ground technique helps alleviate the problem of efficiency drop in the four-switch buck-boost topology and ensures converter/load safety. An indirect current sensor is also proposed, which allows for sensing the inductor current change in the buck-boost mode without using any bulky sensing resistors and achieves $k$ fast transient response with 100mv-undershoot/80mV-overshoot for 1A load current change. This converter achieves a maximum efficiency of 92% which is comparable to the state-of-the-art buck-boost schemes","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126453797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Multi-beam, Scalable 28 GHz Relay Array with Frequency and Spatial Division Multiple Access Using Passive, High-Order N-Path Filters 多波束,可扩展的28ghz中继阵列,使用无源高阶n路滤波器进行频率和空域多址访问
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863113
P. Khial, Samir Nooshabadi, Austin C. Fikes, A. Hajimiri
A 28 GHz scalable relay array that independently re-routes multiple beamformed data-channels in different frequency bands is presented, allowing for frequency and spatial division multiple access. The array is implemented at the element-level with a 65 nm CMOS RFIC that has two transmit-and-receive branches. Each transmit-and-receive branch provides phase delay, true time delay, and amplitude control for up to 3 frequency channels independently and simultaneously. The baseband signal chain is enabled by a dual function N-path filter architecture that is passive and inductorless yet provides high-order filtering with complex roll-off and performs phase shifting. The resulting array consists of a 2-chip, 4-branch prototype that independently steers 3 frequency multiplexed incident data beams into different spatial directions, with true time delay control in each beam. A radiative measurement shows the router supporting a simultaneous throughput of 625 Mb/s 32-QAM data across 3 frequency channels that are independently spatially steered.
提出了一种28 GHz可扩展中继阵列,该阵列可在不同频段独立重路由多个波束形成的数据通道,从而实现频率和空间分多路接入。该阵列在元件级采用65nm CMOS RFIC实现,该RFIC具有两个发送和接收分支。每个发送和接收分支提供相位延迟,真实时间延迟和幅度控制多达3个频率通道独立和同时。基带信号链由双功能n路滤波器架构实现,该架构无源和无电感,但提供具有复杂滚降和相移的高阶滤波。该阵列由一个2芯片、4支路的原型组成,它独立地将3个频率复用的入射数据波束引导到不同的空间方向,并在每个波束中进行真正的时间延迟控制。辐射测量显示,该路由器支持同时吞吐量625 Mb/s的32-QAM数据,通过3个独立的空间控制的频率通道。
{"title":"Multi-beam, Scalable 28 GHz Relay Array with Frequency and Spatial Division Multiple Access Using Passive, High-Order N-Path Filters","authors":"P. Khial, Samir Nooshabadi, Austin C. Fikes, A. Hajimiri","doi":"10.1109/RFIC54546.2022.9863113","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863113","url":null,"abstract":"A 28 GHz scalable relay array that independently re-routes multiple beamformed data-channels in different frequency bands is presented, allowing for frequency and spatial division multiple access. The array is implemented at the element-level with a 65 nm CMOS RFIC that has two transmit-and-receive branches. Each transmit-and-receive branch provides phase delay, true time delay, and amplitude control for up to 3 frequency channels independently and simultaneously. The baseband signal chain is enabled by a dual function N-path filter architecture that is passive and inductorless yet provides high-order filtering with complex roll-off and performs phase shifting. The resulting array consists of a 2-chip, 4-branch prototype that independently steers 3 frequency multiplexed incident data beams into different spatial directions, with true time delay control in each beam. A radiative measurement shows the router supporting a simultaneous throughput of 625 Mb/s 32-QAM data across 3 frequency channels that are independently spatially steered.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128547673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A 21.8-41.6GHz Fast-Locking Sub-Sampling PLL with Dead Zone Automatic Controller Achieving 62.7-fs Jitter and −250.3dB FoM 一种21.8-41.6GHz带死区自动控制器的快速锁定子采样锁相环,实现62.7 fs抖动和- 250.3dB FoM
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863104
Wen Chen, Yiyang Shu, H. Qian, J. Yin, Pui-in Mak, Xiang Gao, Xun Luo
In this paper, a wideband fast-locking millimeter-wave (mmW) sub-sampling PLL (SSPLL) with low jitter is proposed. A quadrature sub-sampling phase detector (QSSPD)-based dead zone automatic controller (DZAC) is introduced to automatically switch on the frequency-locked loop (FLL) for fast-locking. Here, the long locking time caused by the dead zone of FLL is eliminated. The mmW quad-mode oscillator is integrated in the SSPLL to achieve the low jitter within a wide frequency range. The proposed SSPLL is fabricated in a 40-nm CMOS technology. Measurements exhibit a frequency tuning range of 62.5% from 21.8 to 41.6GHz. The SSPLL achieves a 62.7 to 79.1fs rms jitter within the frequency tuning range. Besides, the typical power consumption is 23.6mW, leading to a PLL FoM of −248.3 to −250.3dB. Meanwhile, the proposed SSPLL achieves more than $8.9times$ locking time improvement. The PLL occupies a core area of $0.18text{mm}^{2}$.
提出了一种低抖动的宽带快锁毫米波子采样锁相环(SSPLL)。介绍了一种基于正交子采样鉴相器(QSSPD)的死区自动控制器(DZAC),用于自动开启锁频环(FLL)实现快速锁定。在这里,消除了由于FLL死区导致的长锁定时间。毫米波四模振荡器集成在SSPLL中,实现了宽频率范围内的低抖动。所提出的SSPLL采用40纳米CMOS技术制造。测量显示频率调谐范围为62.5%,从21.8 ghz到41.6GHz。SSPLL在频率调谐范围内实现62.7至79.1fs rms的抖动。此外,典型功耗为23.6mW,导致锁相环FoM为−248.3至−250.3dB。同时,所提出的SSPLL将锁时间提高了8.9倍以上。锁相环的核心面积为$0.18text{mm}^{2}$。
{"title":"A 21.8-41.6GHz Fast-Locking Sub-Sampling PLL with Dead Zone Automatic Controller Achieving 62.7-fs Jitter and −250.3dB FoM","authors":"Wen Chen, Yiyang Shu, H. Qian, J. Yin, Pui-in Mak, Xiang Gao, Xun Luo","doi":"10.1109/RFIC54546.2022.9863104","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863104","url":null,"abstract":"In this paper, a wideband fast-locking millimeter-wave (mmW) sub-sampling PLL (SSPLL) with low jitter is proposed. A quadrature sub-sampling phase detector (QSSPD)-based dead zone automatic controller (DZAC) is introduced to automatically switch on the frequency-locked loop (FLL) for fast-locking. Here, the long locking time caused by the dead zone of FLL is eliminated. The mmW quad-mode oscillator is integrated in the SSPLL to achieve the low jitter within a wide frequency range. The proposed SSPLL is fabricated in a 40-nm CMOS technology. Measurements exhibit a frequency tuning range of 62.5% from 21.8 to 41.6GHz. The SSPLL achieves a 62.7 to 79.1fs rms jitter within the frequency tuning range. Besides, the typical power consumption is 23.6mW, leading to a PLL FoM of −248.3 to −250.3dB. Meanwhile, the proposed SSPLL achieves more than $8.9times$ locking time improvement. The PLL occupies a core area of $0.18text{mm}^{2}$.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128883305","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
A 23 G Hz RF - beamforming Transmitter with > 15.5 dBm $mathrm{P}_{text{sat}}$ and >21.7% Peak Efficiency for Inter-satellite Communications 一种23g Hz射频波束形成发射机,具有> 15.5 dBm $ mathm {P}_{text{sat}}$和>21.7%的星间通信峰值效率
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863123
Kaijie Ding, D. Milosevic, V. Vidojkovic, Rainier van Dommele, M. Bentum, P. Baltus
This paper presents a 23GHz RF -beamforming transmitter (TX) for inter-satellite communications. By combining a variable gain amplifier (VGA), a phase shifter (PS), and a four-inductor-coupling differential quadrature-signal (IQ) generator, a power-efficient design with high compactness is demonstrated. The chip is fabricated in a 130nm SiGe BiCMOS technology. It achieves a measured saturated output power (Psat) of >15.5dBm and a peak TX efficiency of >21.7%, with 2.09° RMS phase error and >29.3dB maximum power gain. The realized mm-wave TX supports 64-QAM with a 900Mbps data rate, the Error Vector Magnitude (EVM) of 4.98% (-26.06dB), the Adjacent Channel Power Ratio (ACPR) of −30.1dBc, and TX efficiency of 8.52% are measured at 9.2dBm output power. The core area of this TX is 0.9mm x 0.23mm.
本文提出了一种用于卫星间通信的23GHz射频波束形成发射机(TX)。通过结合可变增益放大器(VGA)、移相器(PS)和四电感耦合差分正交信号(IQ)发生器,展示了一种高紧凑性的节能设计。该芯片采用130纳米SiGe BiCMOS技术制造。测量饱和输出功率(Psat) >15.5dBm,峰值TX效率>21.7%,相位误差RMS 2.09°,最大功率增益>29.3dB。所实现的毫米波TX支持64-QAM,数据速率为900Mbps,在9.2dBm输出功率下,误差矢量幅值(EVM)为4.98% (-26.06dB),相邻信道功率比(ACPR)为- 30.1dBc, TX效率为8.52%。TX的核心面积为0.9mm × 0.23mm。
{"title":"A 23 G Hz RF - beamforming Transmitter with > 15.5 dBm $mathrm{P}_{text{sat}}$ and >21.7% Peak Efficiency for Inter-satellite Communications","authors":"Kaijie Ding, D. Milosevic, V. Vidojkovic, Rainier van Dommele, M. Bentum, P. Baltus","doi":"10.1109/RFIC54546.2022.9863123","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863123","url":null,"abstract":"This paper presents a 23GHz RF -beamforming transmitter (TX) for inter-satellite communications. By combining a variable gain amplifier (VGA), a phase shifter (PS), and a four-inductor-coupling differential quadrature-signal (IQ) generator, a power-efficient design with high compactness is demonstrated. The chip is fabricated in a 130nm SiGe BiCMOS technology. It achieves a measured saturated output power (Psat) of >15.5dBm and a peak TX efficiency of >21.7%, with 2.09° RMS phase error and >29.3dB maximum power gain. The realized mm-wave TX supports 64-QAM with a 900Mbps data rate, the Error Vector Magnitude (EVM) of 4.98% (-26.06dB), the Adjacent Channel Power Ratio (ACPR) of −30.1dBc, and TX efficiency of 8.52% are measured at 9.2dBm output power. The core area of this TX is 0.9mm x 0.23mm.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"92 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121977947","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
A 14.5-17.9 GHz Harmonically-Coupled Quad-Core P-N Class-B DCO with -117.3 dBc/Hz Phase Noise at 1 MHz Offset in 28-nm CMOS 一种14.5-17.9 GHz四核P-N b类DCO,在1mhz偏移时相位噪声为-117.3 dBc/Hz
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863180
Ioanna Apostolina, D. Manstretta
In this paper, a CMOS quad-core DCO with class-B operation and transformer-based tail coupling is investigated to achieve ultra-low phase noise in the Ku band. The design uses an averaging approach to minimize systematic frequency step errors arising in DCOs with large tuning capacitor arrays due to signal unequal distribution. A proof-of-concept prototype has been developed in 28-nm CMOS technology. The DCO achieves a phase noise of−117.3 dBc/Hz at 1 MHz offset from the 15.35 GHz carrier frequency, a figure of merit (FoM) of -187.6 dBc/Hz, and a tuning range of 20.3% with a frequency resolution of 10MHz and less than ±240 kHz error.
为了实现Ku频段的超低相位噪声,本文研究了一种b类工作和基于变压器尾部耦合的CMOS四核DCO。该设计采用平均方法,以尽量减少由于信号分布不均匀而导致的大调谐电容阵列dco系统频率阶跃误差。采用28纳米CMOS技术开发了概念验证原型。在15.35 GHz载波频率偏移1 MHz时,DCO的相位噪声为- 117.3 dBc/Hz, FoM为-187.6 dBc/Hz,调谐范围为20.3%,频率分辨率为10MHz,误差小于±240 kHz。
{"title":"A 14.5-17.9 GHz Harmonically-Coupled Quad-Core P-N Class-B DCO with -117.3 dBc/Hz Phase Noise at 1 MHz Offset in 28-nm CMOS","authors":"Ioanna Apostolina, D. Manstretta","doi":"10.1109/RFIC54546.2022.9863180","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863180","url":null,"abstract":"In this paper, a CMOS quad-core DCO with class-B operation and transformer-based tail coupling is investigated to achieve ultra-low phase noise in the Ku band. The design uses an averaging approach to minimize systematic frequency step errors arising in DCOs with large tuning capacitor arrays due to signal unequal distribution. A proof-of-concept prototype has been developed in 28-nm CMOS technology. The DCO achieves a phase noise of−117.3 dBc/Hz at 1 MHz offset from the 15.35 GHz carrier frequency, a figure of merit (FoM) of -187.6 dBc/Hz, and a tuning range of 20.3% with a frequency resolution of 10MHz and less than ±240 kHz error.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125991749","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 5
2022 IEEE RFIC Symposium 2022年IEEE RFIC研讨会
Pub Date : 2022-06-19 DOI: 10.1109/rfic54546.2022.9863199
{"title":"2022 IEEE RFIC Symposium","authors":"","doi":"10.1109/rfic54546.2022.9863199","DOIUrl":"https://doi.org/10.1109/rfic54546.2022.9863199","url":null,"abstract":"","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"81 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116939897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
Superior Reliability and Low Self-Heating of a 45nm CMOS 39-GHz Power Amplifier for 5G mmWave Applications 用于5G毫米波应用的45nm CMOS 39-GHz功率放大器的高可靠性和低自热
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863154
P. Srinivasan, S. Syed, J. A. Sundaram, S. Moss, S. Jain, P. Colestock, N. Cahoon, A. Bandyopadhyay, F. Guarín, B. Min, M. Gall
A 5G new-radio (NR) 2-stack differential 39 GHz Power Amplifier (P A) designed with ADNFETs in 45RFSOI technology is used to showcase superior CW and 5G performance and excellent reliability. Measured CW linear gain of ~12 dB, ~18 dBm Psat with P AE of 35.1 % is seen while 5G QPSK results show Plin ~13dBm@-22dB EVM and ~17dBm@-19dB ACPR at 1.7V VDD back-off conditions. Time domain waveforms followed by RF reliability characterization show that off-state Hot Carrier Injection (HCI) is a key fail mechanism under matched-Z load and VSWR. Key RF degradation metrics from long term RF stress show $Delta mathbf{Pout}, Delta mathbf{Gain} < 0.5mathbf{dBm}$ and $Delta mathbf{PAR} < 1%$ meeting overall 10yr lifetime criteria. Self-heating characterization show ~6 C increase at 1.6V/160mW dissipated power demonstrating excellent thermal stability. From 5G aging measurements and model sims, good model-hardware correlation is seen where gain degradation < 0.5 dB at 10y demonstrating overall superior performance and excellent reliability of the P A for 5G mm Wave applications.
采用45RFSOI技术的adnfet设计的5G新无线电(NR) 2栈差分39 GHz功率放大器(pa),展示了卓越的CW和5G性能以及出色的可靠性。测量到的连续波线性增益为~12 dB, ~18 dBm Psat, pae为35.1%,而5G QPSK结果显示,在1.7V VDD退退条件下,EVM和ACPR分别为~13dBm@-22dB和~17dBm@-19dB。时域波形和射频可靠性表征表明,非状态热载流子注入(HCI)是匹配z负载和VSWR下的关键失效机制。长期射频应力的关键射频退化指标显示$Delta mathbf{Pout}, Delta mathbf{Gain} < 0.5mathbf{dBm}$和$Delta mathbf{PAR} < 1%$符合总体10年寿命标准。自热特性表明,在1.6V/160mW耗散功率下,自热性能提高了6℃,表现出优异的热稳定性。从5G老化测量和模型模拟中可以看出,在10y时增益衰减< 0.5 dB的情况下,模型与硬件之间存在良好的相关性,这表明了5G毫米波应用中pa的整体性能和可靠性。
{"title":"Superior Reliability and Low Self-Heating of a 45nm CMOS 39-GHz Power Amplifier for 5G mmWave Applications","authors":"P. Srinivasan, S. Syed, J. A. Sundaram, S. Moss, S. Jain, P. Colestock, N. Cahoon, A. Bandyopadhyay, F. Guarín, B. Min, M. Gall","doi":"10.1109/RFIC54546.2022.9863154","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863154","url":null,"abstract":"A 5G new-radio (NR) 2-stack differential 39 GHz Power Amplifier (P A) designed with ADNFETs in 45RFSOI technology is used to showcase superior CW and 5G performance and excellent reliability. Measured CW linear gain of ~12 dB, ~18 dBm Psat with P AE of 35.1 % is seen while 5G QPSK results show Plin ~13dBm@-22dB EVM and ~17dBm@-19dB ACPR at 1.7V VDD back-off conditions. Time domain waveforms followed by RF reliability characterization show that off-state Hot Carrier Injection (HCI) is a key fail mechanism under matched-Z load and VSWR. Key RF degradation metrics from long term RF stress show $Delta mathbf{Pout}, Delta mathbf{Gain} < 0.5mathbf{dBm}$ and $Delta mathbf{PAR} < 1%$ meeting overall 10yr lifetime criteria. Self-heating characterization show ~6 C increase at 1.6V/160mW dissipated power demonstrating excellent thermal stability. From 5G aging measurements and model sims, good model-hardware correlation is seen where gain degradation < 0.5 dB at 10y demonstrating overall superior performance and excellent reliability of the P A for 5G mm Wave applications.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131446078","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
A Millimeter-Wave Front-End for FD/FDD Transceivers Featuring an Embedded PA and an N-Path Filter Based Circulator Receiver 一种用于FD/FDD收发器的毫米波前端,具有嵌入式PA和基于n路滤波器的环形接收器
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863209
Masoud Pashaeifar, L. D. de Vreede, M. Alavi
This work presents an ultra-compact single-antenna FD/FDD transceivers front-end. It comprises a nonreciprocal circulator, RX, and an integrated power amplifier (PA). In the proposed circulator, we devise a ring quarter-wave transmission line topology with adjusted characteristic impedances to improve TX-to-antenna insertion loss and TX-to-RX isolation. Besides, an AND-gate switching-based N-path filter is proposed to realize the circulator's nonreciprocal gyrator while acting as a mixer-first RX. Owing to the ultra-compact N-path filter structure, the circulator occupies only 0.38mm2 core area. Over a 27.1-to-31.1GHz band, the realized front-end offers >20dB TX-to-RX isolation while its measured TX-to-antenna insertion loss is 1.7~2.2dB. The RX path tolerates the PA's blocker signal, achieving 5dBm in-band and 13dBm out-of-band B1dB.Moreover, the PA delivers 15.15dBm peak output power with 33% drain efficiency. Our front-end prototype occupies only 0.7mm2, including circulator, PA, quadrature hybrid coupler LO generators, and baseband circuits.
这项工作提出了一个超紧凑的单天线FD/FDD收发器前端。它包括一个非互易环行器RX和一个集成功率放大器(PA)。在所提出的环行器中,我们设计了一种具有可调特性阻抗的环形四分之一波传输线拓扑,以改善txx到天线的插入损耗和txx到rx的隔离。此外,提出了一种基于与门开关的n路滤波器,在充当混频器优先RX的同时实现环行器的非互反旋转器。由于采用了超紧凑的n路滤波器结构,环行器的核心面积仅为0.38mm2。在27.1 ~ 31.1 ghz频段内,实现的前端提供了>20dB的txto - rx隔离,而其测量的txto -天线插入损耗为1.7~2.2dB。RX路径可以容忍PA的阻塞信号,实现5dBm带内和13dBm带外的B1dB。此外,PA的峰值输出功率为15.15dBm,漏极效率为33%。我们的前端原型仅占地0.7mm2,包括环行器,PA,正交混合耦合器LO发生器和基带电路。
{"title":"A Millimeter-Wave Front-End for FD/FDD Transceivers Featuring an Embedded PA and an N-Path Filter Based Circulator Receiver","authors":"Masoud Pashaeifar, L. D. de Vreede, M. Alavi","doi":"10.1109/RFIC54546.2022.9863209","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863209","url":null,"abstract":"This work presents an ultra-compact single-antenna FD/FDD transceivers front-end. It comprises a nonreciprocal circulator, RX, and an integrated power amplifier (PA). In the proposed circulator, we devise a ring quarter-wave transmission line topology with adjusted characteristic impedances to improve TX-to-antenna insertion loss and TX-to-RX isolation. Besides, an AND-gate switching-based N-path filter is proposed to realize the circulator's nonreciprocal gyrator while acting as a mixer-first RX. Owing to the ultra-compact N-path filter structure, the circulator occupies only 0.38mm2 core area. Over a 27.1-to-31.1GHz band, the realized front-end offers >20dB TX-to-RX isolation while its measured TX-to-antenna insertion loss is 1.7~2.2dB. The RX path tolerates the PA's blocker signal, achieving 5dBm in-band and 13dBm out-of-band B1dB.Moreover, the PA delivers 15.15dBm peak output power with 33% drain efficiency. Our front-end prototype occupies only 0.7mm2, including circulator, PA, quadrature hybrid coupler LO generators, and baseband circuits.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129116012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
22–33 GHz CMOS LNA Using Coupled-TL Feedback and Body Self-Forward-Bias for 28 GHz 5G System 采用耦合tl反馈和本体自正向偏置的22-33 GHz CMOS LNA用于28 GHz 5G系统
Pub Date : 2022-06-19 DOI: 10.1109/RFIC54546.2022.9863213
Yo‐Sheng Lin, K. Lan
We report a 22–33 GHz low-noise amplifier (LNA) with low power dissipation (PD), low noise-figure (NF) and small group-delay (GD) variation in 90 nm CMOS for 28 GHz 5G system. Current-reused and body self-forward-bias (BSFB) techniques are used for low PD. Compact quarter-wavelength (λ/4) spiral transmission-line (TL) in conjunction with a large bypass capacitor is used for gate-bias and simultaneous drain-bias and current-source. Coupled-TL feedback and BSFB techniques are used for gain and NF enhancement in the condition of the same PD. The LNA dissipates 12.2 mW and achieves decent S21 of 16 dB, 3 dB bandwidth (f3dB) of 11 GHz (22–33 GHz), minimum NF (NFmin) of 2.5 dB, average NF (NFavg) of 3.1 dB and GD variation of ±6 ps for 22–33 GHz, and figure-of-merit (FOM) of 91.7 GHz. Furthermore, the LNA occupies 0.406 mm2 chip area, and attains decent input third-order intercept point (IIP3) of -3 dBm at 28 GHz. The NF and FOM are one of the best performances ever demonstrated for Ka-band CMOS LNAs with f3dB wider than 5 GHz and PD lower than 14 mW.
我们报道了一种22-33 GHz低噪声放大器(LNA),具有低功耗(PD),低噪声系数(NF)和小群延迟(GD)变化,用于28 GHz 5G系统的90 nm CMOS。电流重用和体自正向偏置(BSFB)技术用于低PD。紧凑的四分之一波长(λ/4)螺旋在线传输(TL)与大型旁路电容器一起用于门偏置和同时漏极偏置和电流源。在相同PD条件下,采用耦合tl反馈和BSFB技术增强增益和NF。LNA的功耗为12.2 mW, S21为16 dB, 3db带宽(f3dB)为11 GHz (22-33 GHz),最小NF (NFmin)为2.5 dB,平均NF (NFavg)为3.1 dB, 22-33 GHz的GD变化为±6 ps,性能因数(FOM)为91.7 GHz。此外,LNA的芯片面积为0.406 mm2,在28 GHz时可获得-3 dBm的输入三阶截距点(IIP3)。在f3dB宽度大于5 GHz、PD小于14 mW的ka波段CMOS LNAs中,NF和FOM是迄今为止表现最好的性能之一。
{"title":"22–33 GHz CMOS LNA Using Coupled-TL Feedback and Body Self-Forward-Bias for 28 GHz 5G System","authors":"Yo‐Sheng Lin, K. Lan","doi":"10.1109/RFIC54546.2022.9863213","DOIUrl":"https://doi.org/10.1109/RFIC54546.2022.9863213","url":null,"abstract":"We report a 22–33 GHz low-noise amplifier (LNA) with low power dissipation (PD), low noise-figure (NF) and small group-delay (GD) variation in 90 nm CMOS for 28 GHz 5G system. Current-reused and body self-forward-bias (BSFB) techniques are used for low PD. Compact quarter-wavelength (λ/4) spiral transmission-line (TL) in conjunction with a large bypass capacitor is used for gate-bias and simultaneous drain-bias and current-source. Coupled-TL feedback and BSFB techniques are used for gain and NF enhancement in the condition of the same PD. The LNA dissipates 12.2 mW and achieves decent S21 of 16 dB, 3 dB bandwidth (f3dB) of 11 GHz (22–33 GHz), minimum NF (NFmin) of 2.5 dB, average NF (NFavg) of 3.1 dB and GD variation of ±6 ps for 22–33 GHz, and figure-of-merit (FOM) of 91.7 GHz. Furthermore, the LNA occupies 0.406 mm2 chip area, and attains decent input third-order intercept point (IIP3) of -3 dBm at 28 GHz. The NF and FOM are one of the best performances ever demonstrated for Ka-band CMOS LNAs with f3dB wider than 5 GHz and PD lower than 14 mW.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117266962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 0
期刊
2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
全部 Acc. Chem. Res. ACS Applied Bio Materials ACS Appl. Electron. Mater. ACS Appl. Energy Mater. ACS Appl. Mater. Interfaces ACS Appl. Nano Mater. ACS Appl. Polym. Mater. ACS BIOMATER-SCI ENG ACS Catal. ACS Cent. Sci. ACS Chem. Biol. ACS Chemical Health & Safety ACS Chem. Neurosci. ACS Comb. Sci. ACS Earth Space Chem. ACS Energy Lett. ACS Infect. Dis. ACS Macro Lett. ACS Mater. Lett. ACS Med. Chem. Lett. ACS Nano ACS Omega ACS Photonics ACS Sens. ACS Sustainable Chem. Eng. ACS Synth. Biol. Anal. Chem. BIOCHEMISTRY-US Bioconjugate Chem. BIOMACROMOLECULES Chem. Res. Toxicol. Chem. Rev. Chem. Mater. CRYST GROWTH DES ENERG FUEL Environ. Sci. Technol. Environ. Sci. Technol. Lett. Eur. J. Inorg. Chem. IND ENG CHEM RES Inorg. Chem. J. Agric. Food. Chem. J. Chem. Eng. Data J. Chem. Educ. J. Chem. Inf. Model. J. Chem. Theory Comput. J. Med. Chem. J. Nat. Prod. J PROTEOME RES J. Am. Chem. Soc. LANGMUIR MACROMOLECULES Mol. Pharmaceutics Nano Lett. Org. Lett. ORG PROCESS RES DEV ORGANOMETALLICS J. Org. Chem. J. Phys. Chem. J. Phys. Chem. A J. Phys. Chem. B J. Phys. Chem. C J. Phys. Chem. Lett. Analyst Anal. Methods Biomater. Sci. Catal. Sci. Technol. Chem. Commun. Chem. Soc. Rev. CHEM EDUC RES PRACT CRYSTENGCOMM Dalton Trans. Energy Environ. Sci. ENVIRON SCI-NANO ENVIRON SCI-PROC IMP ENVIRON SCI-WAT RES Faraday Discuss. Food Funct. Green Chem. Inorg. Chem. Front. Integr. Biol. J. Anal. At. Spectrom. J. Mater. Chem. A J. Mater. Chem. B J. Mater. Chem. C Lab Chip Mater. Chem. Front. Mater. Horiz. MEDCHEMCOMM Metallomics Mol. Biosyst. Mol. Syst. Des. Eng. Nanoscale Nanoscale Horiz. Nat. Prod. Rep. New J. Chem. Org. Biomol. Chem. Org. Chem. Front. PHOTOCH PHOTOBIO SCI PCCP Polym. Chem.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1