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1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings最新文献

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CMOS OTA with improve performance 提高性能的CMOS OTA
Shi-Cai Qin, Xiangluan Jia, Yong-Ping Wang
A new CMOS OTA which consists of a linearized source-coupled pair cascaded by a conventional CMOS OTA biased in sub-threshold region is presented. SPICE simulation results show that for /spl plusmn/5 V supply voltage, and over /spl plusmn/3 V input range, the maximum non-linear error is /spl plusmn/0.3% and the transconductance varies I/sub abc/ linearly over a wide I/sub abc/ range.
提出了一种新的CMOS OTA,它是由一个线性化的源耦合对级联而成的,而传统的CMOS OTA是在亚阈值区域偏置的。SPICE仿真结果表明,当电源电压为/spl plusmn/ 5v,输入电压超过/spl plusmn/ 3v时,最大非线性误差为/spl plusmn/0.3%,跨导在较宽的I/sub abc/范围内呈线性变化。
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引用次数: 0
Fabrication and its response characteristics of MELO accelerometer MELO加速度计的制备及其响应特性
J. Jungho Pak, S. Yi, Y. Sung, G. Neudeck
This paper reports on the fabrication and experimental results of a novel piezoresistive bridge-type accelerometer utilizing merged epitaxial lateral overgrowth (MELO) of silicon. The suspension beams of a bridge type accelerometer were realized by selective epitaxial lateral overgrowth of silicon resulting in a local silicon-on-insulator (SOI) structure, resulting in high quality low-doped single crystal epitaxial silicon. Its sensitivity was 0.287 mV/V-g, resonant frequency was 2.026 kHz, and the linearity was excellent up to 30 g.
本文报道了一种新型压阻式桥式加速度计的制备和实验结果。桥式加速度计的悬浮梁是通过硅的选择性外延横向过长,形成局部绝缘体上硅(SOI)结构来实现的,从而获得高质量的低掺杂单晶外延硅。灵敏度为0.287 mV/V-g,谐振频率为2.026 kHz,线性度达到30 g。
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引用次数: 0
Theoretical analysis on the automotive electronic compass sensor 汽车电子罗盘传感器的理论分析
S. Yi, J.H. Park, Y. K. Sung
In this analysis, the B-H curve was attained and assumed by Z and R type curves. The B/sub max/, H/sub c/, the driving frequency and the demagnetizing factors are considered as parameters to solve a numerical solution. As the driving frequency increased from 4 kHz to 12 kHz-step 4 kHz-the output voltages increased from 147 mV to 446 mV in Z-type. The detection error due to the rotation angles are limited to +3 degrees. In the R type curve, the output voltages are in the range of 145 mV to 354 mV. As the coercive force H/sub c/, is increased, the output voltage increased slightly. Considering the demagnetizing factor, the output voltages are reduced, but the detection error is decreased greatly.
在本分析中,B-H曲线由Z型和R型曲线得到并假设。以B/sub max/、H/sub c/、驱动频率和退磁因子为参数求解数值解。当驱动频率从4 kHz增加到12 kHz-步进4 kHz时,输出电压从147 mV增加到446 mV为z型。由于旋转角度的检测误差被限制在+3度。在R型曲线中,输出电压范围为145 mV ~ 354 mV。随着矫顽力H/sub c/的增大,输出电压略有增大。考虑退磁因素,降低了输出电压,但大大降低了检测误差。
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引用次数: 0
The voltage (current) controlled frequency modulation effect in DUBAT device DUBAT器件中电压(电流)控制的调频效果
W.L. Guo, Z.Y. Hou, A.L. Zheng, Y. Zheng
In this paper, the principle and realization of the voltage (current) controlled frequency modulation effect on one of the three terminal voltage controlled negative resistance devices-Dual Base transistor (DUBAT)-have been described for the first time.
本文首次阐述了压(流)控调频效应在三种终端压控负阻器件之一的双基极晶体管(DUBAT)上的原理和实现。
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引用次数: 0
A heuristic approach to datapath scheduling of complex conditional structure 复杂条件结构数据路径调度的一种启发式方法
S. Nakamura, A. Yamada, I. Shirakawa
This paper proposes a new heuristic approach to the time-constrained datapath scheduling with complex conditional structures. This algorithm intends to select the best of all solutions attained by the iterative refinement process. Experimental results demonstrate that this algorithm attains optimal results in most cases and can be applied to a practical scale of datapath scheduling.
本文提出了一种新的启发式方法来解决具有复杂条件结构的时间约束数据路径调度问题。该算法旨在从迭代优化过程得到的所有解中选择最优解。实验结果表明,该算法在大多数情况下都获得了最优结果,可以应用于实际规模的数据路径调度。
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引用次数: 0
A new scheme for complete cancellation of charge injection distortion in second generation switched-current circuits 一种完全消除第二代开关电流电路电荷注入畸变的新方案
X. Zeng, C. Tse, P. Tang
This paper begins with an analysis of the charge injection error in the second-generation current memory cell. By combining the circuit-replication technique and the n-step principle, a new scheme for simultaneously cancelling both signal-dependent and signal-independent charge injection errors in second-generation switched-current circuits is proposed. SPICE simulations are used to verify the feasibility and effectiveness of the proposed cell for tackling the charge injection problem. Major merits of the proposed cell include capability to meet high precision requirements and applicability to any second-generation switched-current circuit configuration.
本文首先对第二代电流存储单元中的电荷注入误差进行了分析。结合电路复制技术和n步原理,提出了一种同时消除第二代开关电流电路中信号相关和信号无关电荷注入误差的新方案。SPICE模拟验证了所提出的单元解决电荷注入问题的可行性和有效性。所提出的电池的主要优点包括能够满足高精度要求和适用于任何第二代开关电流电路配置。
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引用次数: 5
A constrained terminals over-the-cell router 一个受限终端的蜂窝路由器
P. Shew, Jong-Shen Shei, Pei-Yuug Hsiao
We present a new routing model to further extend the routing capacity over the cells. We call this constrained terminals over-the-cell channel routing problem (CTOTC-CRP). Based on this new model, our heuristic algorithm achieved a routing area reduction of 71% for the MCNC benchmark PRIMARY I example using three-layer over-the-cell routing.
提出了一种新的路由模型,进一步扩展了单元间的路由能力。我们将此称为受限终端蜂窝间信道路由问题(CTOTC-CRP)。基于这个新模型,我们的启发式算法使用三层单元间路由实现了MCNC基准PRIMARY I示例的路由面积减少71%。
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引用次数: 1
Simulation of Ge implanted SiGe-channel p-MOSFETs Ge注入sige沟道p- mosfet的仿真
G. Niu, G. Ruan
This paper describes the process feasibility analysis and numerical simulation of Ge implanted SiGe-channel p-MOSFETs. The average separation between conducting holes and SiO/sub 2/-Si interface peaks at certain effective implantation range, implies an optimum mask thickness. Threshold voltage is shown to increase with increasing Ge dose and decreasing effective projected range.
本文介绍了Ge注入sige沟道p- mosfet的工艺可行性分析和数值模拟。在一定的有效注入范围内,导电孔与SiO/sub - 2/-Si界面峰之间的平均距离表明存在最佳掩膜厚度。阈值电压随锗剂量的增加和有效投影范围的减小而增大。
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引用次数: 0
Ultra-shallow junction formation using cobalt silicide as diffusion source 以硅化钴为扩散源形成超浅结
S. Kal, I. Kasko, H. Ryssel
Ultra-thin CoSi/sub 2/ films were prepared from 10 nm sputtered deposited Co on Si using RTA. The distribution of As ions implanted into thin layers of CoSi/sub 2/ on monocrystalline Si and out-diffusion into Si substrate during furnace annealing and RTP were investigated. Ultra-shallow junctions (x/sub j/<100 nm) were characterized by fabricating diodes.
采用RTA法在10 nm的Si上溅射沉积Co,制备了超薄CoSi/sub /薄膜。研究了As离子在单晶Si上注入CoSi/ sub2 /薄层的分布,以及在炉内退火和RTP过程中向Si衬底外扩散的情况。通过制造二极管表征了超浅结(x/sub j/<100 nm)。
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引用次数: 0
Impurity induced disordering produced lateral optical confinement in AlGaAs and InGaAs (on GaAs) quantum well waveguides 在砷化镓(GaAs)量子阱波导上,杂质引起的无序产生了AlGaAs和InGaAs的侧向光约束
A.T.H. Li, K. Lo, E. Li
The impurity induced disordering technique is employed on an AlGaAs/GaAs quantum well optical waveguide to provide lateral optical confinement. The modal propagation constant and field profile are analysed using an improved Fourier decomposition method. The single mode operating region is given in terms of thickness of quantum well layers.
在AlGaAs/GaAs量子阱光波导上采用杂质诱导无序技术提供横向光约束。采用改进的傅里叶分解方法对模态传播常数和场分布进行了分析。单模工作区域用量子阱层厚度表示。
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引用次数: 0
期刊
1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings
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