Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496413
X. D. Jia, R.M.M. Chen
In this paper, a new design technique of continuous-time MOSFET-C sinusoidal and square-triangular-waveform oscillator circuits is described. Four new MOSFET-C oscillator circuits are proposed and related issues are discussed.
{"title":"Simulation and design of continuous-time MOSFET-C oscillator circuits","authors":"X. D. Jia, R.M.M. Chen","doi":"10.1109/TENCON.1995.496413","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496413","url":null,"abstract":"In this paper, a new design technique of continuous-time MOSFET-C sinusoidal and square-triangular-waveform oscillator circuits is described. Four new MOSFET-C oscillator circuits are proposed and related issues are discussed.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"101 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115085095","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496349
K. T. Yan, L. Forbes
A 1/f noise model based on the distributed equivalent circuit technique for evaluating the semi-insulating substrate is proposed. Our model shows that the 1/f noise is a bulk phenomena with localized high frequency variations and long range low frequency fluctuations with the lowest frequency being constrained by the thickness of the material.
{"title":"1/f bulk phenomena noise theory for GaAs MESFETs","authors":"K. T. Yan, L. Forbes","doi":"10.1109/TENCON.1995.496349","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496349","url":null,"abstract":"A 1/f noise model based on the distributed equivalent circuit technique for evaluating the semi-insulating substrate is proposed. Our model shows that the 1/f noise is a bulk phenomena with localized high frequency variations and long range low frequency fluctuations with the lowest frequency being constrained by the thickness of the material.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123076894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496344
C. Lo, S. Yu, E. Li
A self-consistent dynamic model is developed including the current distribution, carrier diffusion rate and spatial hole burning effects to investigate the modulation response of vertical-cavity surface-emitting lasers with diffused quantum wells structure. It is found that the overall performance including relaxation oscillation frequency and modulation bandwidth is improved.
{"title":"Vertical-cavity surface-emitting semiconductor lasers with diffused quantum wells","authors":"C. Lo, S. Yu, E. Li","doi":"10.1109/TENCON.1995.496344","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496344","url":null,"abstract":"A self-consistent dynamic model is developed including the current distribution, carrier diffusion rate and spatial hole burning effects to investigate the modulation response of vertical-cavity surface-emitting lasers with diffused quantum wells structure. It is found that the overall performance including relaxation oscillation frequency and modulation bandwidth is improved.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122400811","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496347
Wen-Chau Liu, L. Laih, J. Tsai, K. Thei, Cheng-Zu Wu, W. Lour, Yuan-Tzu Ting, Rong-Chau Liu
In this paper we fabricate a GaAs/n/sup +/InGaAs/GaAs doped-channel FET device with significant transistor performance. The use of the doped-channel structure also has the benefits of: (1) enhanced electron mobility and velocity in the InGaAs channel; and (2) elimination of the undesired DX centers or persistent photoconductivity effect. Study of the structure reveals that it exhibits the anomalous negative differential resistance (NDR) phenomenon. We conclude that the NDR performance is related to the existence of deep-level electron traps and the real-space transfer effect. Because only part of the fabricated devices exhibit NDR phenomena, the nonuniformly distributed deep-level electron traps related to the substrate or MOCVD growth process may be expected. The existence of electron traps enhances the decrease of channel current resulting from the real-space transfer effect. When the channel electrons gain enough energy from the accelerating field (at higher V/sub DS/ regime), they may inject into the neighboring GaAs layers and become trapped in the deep levels. This causes the reduction of conduction current and occurrence of NDR behavior.
{"title":"GaAs-InGaAs doped-channel negative-differential-resistance field-effect transistor (NDRFET)","authors":"Wen-Chau Liu, L. Laih, J. Tsai, K. Thei, Cheng-Zu Wu, W. Lour, Yuan-Tzu Ting, Rong-Chau Liu","doi":"10.1109/TENCON.1995.496347","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496347","url":null,"abstract":"In this paper we fabricate a GaAs/n/sup +/InGaAs/GaAs doped-channel FET device with significant transistor performance. The use of the doped-channel structure also has the benefits of: (1) enhanced electron mobility and velocity in the InGaAs channel; and (2) elimination of the undesired DX centers or persistent photoconductivity effect. Study of the structure reveals that it exhibits the anomalous negative differential resistance (NDR) phenomenon. We conclude that the NDR performance is related to the existence of deep-level electron traps and the real-space transfer effect. Because only part of the fabricated devices exhibit NDR phenomena, the nonuniformly distributed deep-level electron traps related to the substrate or MOCVD growth process may be expected. The existence of electron traps enhances the decrease of channel current resulting from the real-space transfer effect. When the channel electrons gain enough energy from the accelerating field (at higher V/sub DS/ regime), they may inject into the neighboring GaAs layers and become trapped in the deep levels. This causes the reduction of conduction current and occurrence of NDR behavior.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"37 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129880389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496400
T. Cheung, K. Asada
A novel configuration, Clock Separated Logic (CSL), for sequential logic circuits which gives complementary outputs for both single-phase clock and two-phase clock equalization logic configuration was developed. The methodology can be applied to static, dynamic latches, D-type flipflops, synchronous counters, and full adders and is appropriate for digital circuit and system designs. In the application of a two-phase 8-bit full adder, it gives improvement over traditional circuits using full swing latches. Analytical model and simulation results proved that a reduction of overall 30% of cycle time is possible in the 8-bit full adder.
{"title":"Clock separated logic: a double-rail latch circuit technique for high speed digital design","authors":"T. Cheung, K. Asada","doi":"10.1109/TENCON.1995.496400","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496400","url":null,"abstract":"A novel configuration, Clock Separated Logic (CSL), for sequential logic circuits which gives complementary outputs for both single-phase clock and two-phase clock equalization logic configuration was developed. The methodology can be applied to static, dynamic latches, D-type flipflops, synchronous counters, and full adders and is appropriate for digital circuit and system designs. In the application of a two-phase 8-bit full adder, it gives improvement over traditional circuits using full swing latches. Analytical model and simulation results proved that a reduction of overall 30% of cycle time is possible in the 8-bit full adder.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"53 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130135302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496339
M. Yeh, Ming-kwei Lee
Pure-blue emission of the as-grown ZnSe diode at 300 K was observed. The EL spectrum was dominated by a band-to-band emission peak at 2.68 eV with a half-width 52 meV. The results were consistent with that of the photoluminescence spectrum. These indicated that high-quality ZnSe blue LEDs were obtained under the developed growth condition.
{"title":"ZnSe blue LED with nitrogen-doped ZnSe grown in a Se-rich condition by low-pressure OMCVD","authors":"M. Yeh, Ming-kwei Lee","doi":"10.1109/TENCON.1995.496339","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496339","url":null,"abstract":"Pure-blue emission of the as-grown ZnSe diode at 300 K was observed. The EL spectrum was dominated by a band-to-band emission peak at 2.68 eV with a half-width 52 meV. The results were consistent with that of the photoluminescence spectrum. These indicated that high-quality ZnSe blue LEDs were obtained under the developed growth condition.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127707368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496423
W.L. Guo, Y. Song, M. Green, M.K. Movvej-Farshi
The BICFET with an emitter structure of poly-Si(n/sup +/)-thin insulator-semiconductor tunnel junction has been fabricated and measured. The small-signal current gain (G) of this device is in excess of 10/sup 6/ at low current level and the explanation for this high G has been made.
{"title":"Polysilicon emitter BICFET with super-current gain","authors":"W.L. Guo, Y. Song, M. Green, M.K. Movvej-Farshi","doi":"10.1109/TENCON.1995.496423","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496423","url":null,"abstract":"The BICFET with an emitter structure of poly-Si(n/sup +/)-thin insulator-semiconductor tunnel junction has been fabricated and measured. The small-signal current gain (G) of this device is in excess of 10/sup 6/ at low current level and the explanation for this high G has been made.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120955884","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496355
Xiangluan Jia, W. Huang, Shi-Cai Qin
A new CMOS four-quadrant analog multiplier is presented. By means of an unique nonlinear compensation technique, the linear input range of the multiplier is extended significantly. The simulation results show that, when V/sub y/=/spl plusmn/3V, the nonlinear error is less than 0.94% over the /spl plusmn/3V input range of V/sub x/ and when V/sub x/=/spl plusmn/3V, the nonlinear error is less than 0.25% over the /spl plusmn/3V input range of V/sub y/, with a power supply of /spl plusmn/5V.
{"title":"A new CMOS analog multiplier with improved input linearity","authors":"Xiangluan Jia, W. Huang, Shi-Cai Qin","doi":"10.1109/TENCON.1995.496355","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496355","url":null,"abstract":"A new CMOS four-quadrant analog multiplier is presented. By means of an unique nonlinear compensation technique, the linear input range of the multiplier is extended significantly. The simulation results show that, when V/sub y/=/spl plusmn/3V, the nonlinear error is less than 0.94% over the /spl plusmn/3V input range of V/sub x/ and when V/sub x/=/spl plusmn/3V, the nonlinear error is less than 0.25% over the /spl plusmn/3V input range of V/sub y/, with a power supply of /spl plusmn/5V.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122987244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496438
S. O. Kong, C. Kwok, S. Wong
By using Mg as the tunnelling electrode for an EPROM cell, it is shown in a control experiment that the tunnelling current is much enhanced while the tunnelling field is much reduced after a sintering procedure in which Mg reacts with the SiO/sub 2/ dielectric. Potentially, this may lead to faster programming, lower programming voltages and better programming endurance. An experimental EPROM cell has been made and has demonstrated programmability.
{"title":"An EPROM cell with a magnesium electronic injector","authors":"S. O. Kong, C. Kwok, S. Wong","doi":"10.1109/TENCON.1995.496438","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496438","url":null,"abstract":"By using Mg as the tunnelling electrode for an EPROM cell, it is shown in a control experiment that the tunnelling current is much enhanced while the tunnelling field is much reduced after a sintering procedure in which Mg reacts with the SiO/sub 2/ dielectric. Potentially, this may lead to faster programming, lower programming voltages and better programming endurance. An experimental EPROM cell has been made and has demonstrated programmability.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"204 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115941270","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1995-11-06DOI: 10.1109/TENCON.1995.496331
Chiu Ng, C. Nguyen, S.S. Wong
A novel MOSFET device structure known as Quasi-SOI (QSOI MOSFET) permits direct measurements of substrate current generated by impact ionization near the SOI drain. It is observed that QSOI devices with identical dimensions and fabricated on the same wafer as built devices have lower substrate current when subjected to the same biases. We present here simulated and experimental evidence leading to the conclusion that the lateral maximum electric field near the drain is indeed lower in QSOI devices, with important implications for enhanced reliability in true SOI MOSETs.
{"title":"Evidence of reduced maximum lateral e-field in quasi-SOI MOSFETs","authors":"Chiu Ng, C. Nguyen, S.S. Wong","doi":"10.1109/TENCON.1995.496331","DOIUrl":"https://doi.org/10.1109/TENCON.1995.496331","url":null,"abstract":"A novel MOSFET device structure known as Quasi-SOI (QSOI MOSFET) permits direct measurements of substrate current generated by impact ionization near the SOI drain. It is observed that QSOI devices with identical dimensions and fabricated on the same wafer as built devices have lower substrate current when subjected to the same biases. We present here simulated and experimental evidence leading to the conclusion that the lateral maximum electric field near the drain is indeed lower in QSOI devices, with important implications for enhanced reliability in true SOI MOSETs.","PeriodicalId":425138,"journal":{"name":"1995 IEEE TENCON. IEEE Region 10 International Conference on Microelectronics and VLSI. 'Asia-Pacific Microelectronics 2000'. Proceedings","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1995-11-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126333444","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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