Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382175
Jen-Yi Chen, L. Liao, H. Chien, C. S. Lin, Y. Hsu
The paper presents issues for an optimized three-axis accelerometer implementation. A VerilogA model was built for sensor design, the overall sensitivity, noise and frequency response are obtained by co-simulation with circuit tools. The critical parameters were optimized by theoretical calculation and fine tuned by finite-element-analysis (FEA) and integrated nodal simulation. Three spring-proof mass systems were integrated on a single structure in size of 1.3×1.28mm2 for operating range of ±2g. A silicon-on-glass (SOG) process is adopted to achieve the high aspect-ratio structure, yielding excellent Z-axis sensitivity and resolution as high as 1.434V/g and 49µg/√Hz. The sensitivity and minimum cross-axis sensitivity are 1.442V/g and 0.03% for x-axis and are 1.241V/g and 0.21% for y-axis. This optimized design demonstrates excellent performance satisfying the needs of consumer applications.
{"title":"Issues in path toward low cost three-axis accelerometer for low-g application","authors":"Jen-Yi Chen, L. Liao, H. Chien, C. S. Lin, Y. Hsu","doi":"10.1109/IMPACT.2009.5382175","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382175","url":null,"abstract":"The paper presents issues for an optimized three-axis accelerometer implementation. A VerilogA model was built for sensor design, the overall sensitivity, noise and frequency response are obtained by co-simulation with circuit tools. The critical parameters were optimized by theoretical calculation and fine tuned by finite-element-analysis (FEA) and integrated nodal simulation. Three spring-proof mass systems were integrated on a single structure in size of 1.3×1.28mm2 for operating range of ±2g. A silicon-on-glass (SOG) process is adopted to achieve the high aspect-ratio structure, yielding excellent Z-axis sensitivity and resolution as high as 1.434V/g and 49µg/√Hz. The sensitivity and minimum cross-axis sensitivity are 1.442V/g and 0.03% for x-axis and are 1.241V/g and 0.21% for y-axis. This optimized design demonstrates excellent performance satisfying the needs of consumer applications.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"84 1","pages":"297-300"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75394594","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382277
Chunping Lu, Wen-Chieh Liu, Chun-Jung Chen, C. Fu
We have developed a high flow rate stable liquid dispensing system by using a low energy consumption actuator. It is made of a piezoelectric (PZT) actuating porous membrane with the resonant frequency of the system, featuring relatively small movement parts with a robust structure. Taking advantage of the high latent heat during phase changes from water droplet to vapor, we were able to remove heat from a hot body surface of over 100W with the dispensing system as cooling application.
{"title":"Anti-wetting trench of nozzle plate for piezoelectric actuating dispenser","authors":"Chunping Lu, Wen-Chieh Liu, Chun-Jung Chen, C. Fu","doi":"10.1109/IMPACT.2009.5382277","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382277","url":null,"abstract":"We have developed a high flow rate stable liquid dispensing system by using a low energy consumption actuator. It is made of a piezoelectric (PZT) actuating porous membrane with the resonant frequency of the system, featuring relatively small movement parts with a robust structure. Taking advantage of the high latent heat during phase changes from water droplet to vapor, we were able to remove heat from a hot body surface of over 100W with the dispensing system as cooling application.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"34 1","pages":"674-677"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74770922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382311
D. F. Lim, S. Singh, X. Ang, Jun Wei, C. Ng, C. S. Tan
In this research work, we investigate the feasibility of lowering the bonding temperature by refining the copper surface with the application of a self assembly monolayer (SAM). First, the stability of SAM when it is subjected to different exposure environments is measured quantitatively by the change in the contact angle. The different environments includes: 1) exposure in clean room ambient; and 2) high temperature annealing. The contact angle is reduced for these two cases suggesting that SAM degrades or desorbs over a period of time and during high temperature annealing. Next, the formation of SAM is further analyzed qualitatively by X-ray photoelectron spectroscopy (XPS) to verify its adsorption and degradation properties. The result shows that SAM is able to slow down the oxidation process on copper surface. Bonding experiments are then performed in order to confirm the effectiveness of SAM in achieving a low temperature bonding. The formation of SAM has been shown useful in protecting copper surface from oxide formation; and at moderate temperature annealing (≪300 °C), it readily desorbs prior to bonding. Surface passivation with SAM can therefore help to lower the bonding temperature by provide a clean and a larger contact area for successful bonding.
{"title":"Application of self assembly monolayer (SAM) in lowering the process temperature during Cu-Cu diffusion bonding of 3D IC","authors":"D. F. Lim, S. Singh, X. Ang, Jun Wei, C. Ng, C. S. Tan","doi":"10.1109/IMPACT.2009.5382311","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382311","url":null,"abstract":"In this research work, we investigate the feasibility of lowering the bonding temperature by refining the copper surface with the application of a self assembly monolayer (SAM). First, the stability of SAM when it is subjected to different exposure environments is measured quantitatively by the change in the contact angle. The different environments includes: 1) exposure in clean room ambient; and 2) high temperature annealing. The contact angle is reduced for these two cases suggesting that SAM degrades or desorbs over a period of time and during high temperature annealing. Next, the formation of SAM is further analyzed qualitatively by X-ray photoelectron spectroscopy (XPS) to verify its adsorption and degradation properties. The result shows that SAM is able to slow down the oxidation process on copper surface. Bonding experiments are then performed in order to confirm the effectiveness of SAM in achieving a low temperature bonding. The formation of SAM has been shown useful in protecting copper surface from oxide formation; and at moderate temperature annealing (≪300 °C), it readily desorbs prior to bonding. Surface passivation with SAM can therefore help to lower the bonding temperature by provide a clean and a larger contact area for successful bonding.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"40 1","pages":"68-71"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83754272","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382281
Ching-Bei Lin, R. Horng, Yu-Li Tsai, D. Wuu, Heng-I. Lin
To improve light extraction efficiency and heat dissipation of sapphire-based light-emitting diodes (LEDs), we develop and optimize copper heat spreader which was electroformed in close contact with sapphire. On the basis of simulation results, an LED with copper lowers junction temperature when compared with the LED without copper. In addition, a copper-surrounded LED with protruded bottom surface exhibits almost the same thermal performance as that with flat bottom surface. In practical fabrication, all the LED samples with copper show significant reduction in junction temperature form 150.4°C for the original LED to less than 100°C at injection current of 1 A (∼ 3 W/mm2). The encapsulated LED at the same driven current yields an output power of ∼700 mW, which is 2.7 times higher than that of the original LED without copper.
为了提高蓝宝石基发光二极管(led)的吸光效率和散热性能，研制并优化了与蓝宝石紧密接触电铸铜散热片。仿真结果表明，与不含铜的LED相比，含铜LED的结温降低。此外，底部凸出的铜包围LED与底部平坦的LED表现出几乎相同的热性能。在实际制造中，所有带有铜的LED样品都显示出结温从原始LED的150.4°C显著降低到注入电流为1 A (~ 3 W/mm2)时的100°C以下。在相同的驱动电流下，封装的LED的输出功率为~ 700mw，是未使用铜的原始LED的2.7倍。
{"title":"Optimization design of cup-shaped copper heat spreaders for high-power InGaN/sapphire LEDs","authors":"Ching-Bei Lin, R. Horng, Yu-Li Tsai, D. Wuu, Heng-I. Lin","doi":"10.1109/IMPACT.2009.5382281","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382281","url":null,"abstract":"To improve light extraction efficiency and heat dissipation of sapphire-based light-emitting diodes (LEDs), we develop and optimize copper heat spreader which was electroformed in close contact with sapphire. On the basis of simulation results, an LED with copper lowers junction temperature when compared with the LED without copper. In addition, a copper-surrounded LED with protruded bottom surface exhibits almost the same thermal performance as that with flat bottom surface. In practical fabrication, all the LED samples with copper show significant reduction in junction temperature form 150.4°C for the original LED to less than 100°C at injection current of 1 A (∼ 3 W/mm2). The encapsulated LED at the same driven current yields an output power of ∼700 mW, which is 2.7 times higher than that of the original LED without copper.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"23 1","pages":"689-691"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73110315","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382226
K. C. Li, J. L. Ku, A. Lee, J.C.Y. Huang
The Package on Package (PoP) component is getting attentions in mobile communication electronics industry to meet the miniaturization requirements. The 3D IC packaging technology is employed to achieve higher integrations for multiple functions. This also concurrently reduces the size of PCB during second level of interconnection. Currently, there are two major approaches for system manufactures. The first approach is to purchase the stacked PoP from component supplier. The alternative is to assemble the non-stacked PoP components in house.
{"title":"The evaluation of assembly process for package on package components","authors":"K. C. Li, J. L. Ku, A. Lee, J.C.Y. Huang","doi":"10.1109/IMPACT.2009.5382226","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382226","url":null,"abstract":"The Package on Package (PoP) component is getting attentions in mobile communication electronics industry to meet the miniaturization requirements. The 3D IC packaging technology is employed to achieve higher integrations for multiple functions. This also concurrently reduces the size of PCB during second level of interconnection. Currently, there are two major approaches for system manufactures. The first approach is to purchase the stacked PoP from component supplier. The alternative is to assemble the non-stacked PoP components in house.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"55 1","pages":"493-496"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76305204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382174
D. Milgrom
Digital Solder Mask Printing will bring a new era to both the PCB production and assembly processes. While maintaining the same performance, it shall allow cost reduction, yield improvement, PCB tracking and most importantly, an environmental friendly solution.
{"title":"Evolving into the age of digital ink jet solder mask printing","authors":"D. Milgrom","doi":"10.1109/IMPACT.2009.5382174","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382174","url":null,"abstract":"Digital Solder Mask Printing will bring a new era to both the PCB production and assembly processes. While maintaining the same performance, it shall allow cost reduction, yield improvement, PCB tracking and most importantly, an environmental friendly solution.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"37 1","pages":"89-92"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77299867","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382278
Hsien-Lin Hu, Jen-Dong Hwang, Tse-Hao Ko
In this study, the main purpose is developing isotropic carbon foam for thermal management application. Mesophase coal-tar pitch (LQBP) was used to be raw materials to forming carbon foam; this mesophase coal-tar pitch was provided by China Steel Chemical Corporation. The mesophase coal-tar pitch contains ash about 0.1% and fixed carbon 56%. The soft-point point of the mesophase coal-tar pitch is about 91 oC. In the job, the one step method to forming carbon foam was used and this method would fabricate carbon foam more effective, comparing traditional fabrication process. After one step method to forming carbon foam, a series carbonization and graphitization of foam would be done. The final graphitization temperature was up to 2500 oC. After theses carbon foam were treated at 2500 oC, the density of Ithecarbon foam is 0.677 g/c.c, the degree of graphitization for the carbon foam is about 92% and compressive stress for the carbon foam is 3.24 Mpa, respectively.
{"title":"The structure of the carbon foam derived from meophase coal-tar pitch","authors":"Hsien-Lin Hu, Jen-Dong Hwang, Tse-Hao Ko","doi":"10.1109/IMPACT.2009.5382278","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382278","url":null,"abstract":"In this study, the main purpose is developing isotropic carbon foam for thermal management application. Mesophase coal-tar pitch (LQBP) was used to be raw materials to forming carbon foam; this mesophase coal-tar pitch was provided by China Steel Chemical Corporation. The mesophase coal-tar pitch contains ash about 0.1% and fixed carbon 56%. The soft-point point of the mesophase coal-tar pitch is about 91 oC. In the job, the one step method to forming carbon foam was used and this method would fabricate carbon foam more effective, comparing traditional fabrication process. After one step method to forming carbon foam, a series carbonization and graphitization of foam would be done. The final graphitization temperature was up to 2500 oC. After theses carbon foam were treated at 2500 oC, the density of Ithecarbon foam is 0.677 g/c.c, the degree of graphitization for the carbon foam is about 92% and compressive stress for the carbon foam is 3.24 Mpa, respectively.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"314 1","pages":"678-680"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80069362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382302
Y. Chou, H. Chiu, Wen-Hsien Yang
In the packaging of plastic-encapsulated microelectronics (PEM), microchip encapsulation has been the dominant technique for encapsulation processes. During fabrication of microchip encapsulation, stress-induced problems such as wire sweep and paddle shift are the most common. The viscous drag force on wires exerted by the resin melt flow causes wire sweep problem, while non-uniform loading on paddle system applied by uneven melt flow within cavities results in paddle shift problem. With the tendency of encapsulation technologies continuously moving toward smaller scale and higher density, the existed defects problems during fabrication become more and more important. In this paper, an integrated CAE technology is developed to connect pre-process, filling and structure analyses and post-process, which gives a comprehensive solution for microchip encapsulation. By using this technology, wire sweep and paddle shift phenomenon inside the package can be examined easily. Furthermore, by comparing simulation results to experimental data, the prediction of wire sweep and paddle shift can be validated, which demonstrates the feasibility and usefulness of introducing CAE technology into mold design for microchip encapsulation.
{"title":"Three-dimensional CAE of wire sweep and paddle shift in microchip encapsulation","authors":"Y. Chou, H. Chiu, Wen-Hsien Yang","doi":"10.1109/IMPACT.2009.5382302","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382302","url":null,"abstract":"In the packaging of plastic-encapsulated microelectronics (PEM), microchip encapsulation has been the dominant technique for encapsulation processes. During fabrication of microchip encapsulation, stress-induced problems such as wire sweep and paddle shift are the most common. The viscous drag force on wires exerted by the resin melt flow causes wire sweep problem, while non-uniform loading on paddle system applied by uneven melt flow within cavities results in paddle shift problem. With the tendency of encapsulation technologies continuously moving toward smaller scale and higher density, the existed defects problems during fabrication become more and more important. In this paper, an integrated CAE technology is developed to connect pre-process, filling and structure analyses and post-process, which gives a comprehensive solution for microchip encapsulation. By using this technology, wire sweep and paddle shift phenomenon inside the package can be examined easily. Furthermore, by comparing simulation results to experimental data, the prediction of wire sweep and paddle shift can be validated, which demonstrates the feasibility and usefulness of introducing CAE technology into mold design for microchip encapsulation.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"94 1","pages":"35-38"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80355923","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382235
D. S. Liu, C. Hsu, C. Kuo, C. Y. Lin, Y. R. Chen, G. Shen
The purpose of this study is to investigate the mechanical behavior of Sn-Ag-Cu solder joint under high speed shear test. A impact testing method with shear rate up to 1.0 m/s was set up to measure the solder joint reliability. The effects of differential substrate pad opening and pad metallization were also considered. The study focuses on failure mode analysis and examines characterizing strengths of Sn-Ag-Cu lead-free solder joint at shear rates of 0.3 m/s and 1.0 m/s. Four types of failure mode were observed from the failure section of the solder joint. In Mode M1, fractures occurred at the interface but not remain the solder on the pad. In Mode M2, fractures occurred at the interface with some solder residue remaining on the pad. In Mode M3, fractures occurred at the bulk solder. In Mode M4, fractures on the substrate lifted. The present results were shown that the percentage of M2 mode failure goes up as pad opening increases for two types of substrate. The M1 failure rate of OSP pad metallization substrate is greatly increased due to decrease in pad opening. The M3 and M4 failures are not found at 1.0 m/s impact speed. Overall comparison of peak load and energy-to-peak load performance revealed that the Sn-Ag-Cu bonds to the OSP pad finish were more tough than that of the Ni/Au pad finish for all shear test condition. The interfacial strength reduces with a decrease in pad opening both the Ni/Au and OSP pad finish substrate. In the case of OSP, shear strength and toughness are significantly dependent on solder pad opening size.
{"title":"Effect of solder pad opening size and various pad metallization substrates on Sn-Ag-Cu solder joint under high speed shear test","authors":"D. S. Liu, C. Hsu, C. Kuo, C. Y. Lin, Y. R. Chen, G. Shen","doi":"10.1109/IMPACT.2009.5382235","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382235","url":null,"abstract":"The purpose of this study is to investigate the mechanical behavior of Sn-Ag-Cu solder joint under high speed shear test. A impact testing method with shear rate up to 1.0 m/s was set up to measure the solder joint reliability. The effects of differential substrate pad opening and pad metallization were also considered. The study focuses on failure mode analysis and examines characterizing strengths of Sn-Ag-Cu lead-free solder joint at shear rates of 0.3 m/s and 1.0 m/s. Four types of failure mode were observed from the failure section of the solder joint. In Mode M1, fractures occurred at the interface but not remain the solder on the pad. In Mode M2, fractures occurred at the interface with some solder residue remaining on the pad. In Mode M3, fractures occurred at the bulk solder. In Mode M4, fractures on the substrate lifted. The present results were shown that the percentage of M2 mode failure goes up as pad opening increases for two types of substrate. The M1 failure rate of OSP pad metallization substrate is greatly increased due to decrease in pad opening. The M3 and M4 failures are not found at 1.0 m/s impact speed. Overall comparison of peak load and energy-to-peak load performance revealed that the Sn-Ag-Cu bonds to the OSP pad finish were more tough than that of the Ni/Au pad finish for all shear test condition. The interfacial strength reduces with a decrease in pad opening both the Ni/Au and OSP pad finish substrate. In the case of OSP, shear strength and toughness are significantly dependent on solder pad opening size.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"18 1","pages":"525-528"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90944201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382260
Liao Meng-Chieh, T. Hai, R. Wang
IPC-610D defines the degree of barrel fill in PTH (Planting through hole) into three levels, 25%, 50% and 75%. However, in PCBA stage, when using X-ray to inspect PTH, it is often the case that after wave soldering, there will be solder void. If the size of the solder void accounts the majority size of the PTH, three levels of the IPC-610D is often regarded as the standards for approximate calculation. For instance, during X-ray inspection, if the size of solder void is smaller than 50% size of the PTH, then the product passes the inspection. However, such method is only for estimation purposes instead of precise calculation. Such situation is due to that the number of solder void may be more than one. Moreover, sometimes multiple solder void distribution is possible. It is difficult to analyze the cause of each individual solder void as well as calculate the size of the solder void precisely. Under such complicated circumstances, we focus on the root cause of PTH solder void by failure analysis method. The goal of the analysis is to prevent the occurrence of solder void in advance as well as establish the manufacturing indicators as a bench mark.
{"title":"Failure analysis of (DIMM hole) solder void in lead free process used OSP coated PCB","authors":"Liao Meng-Chieh, T. Hai, R. Wang","doi":"10.1109/IMPACT.2009.5382260","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382260","url":null,"abstract":"IPC-610D defines the degree of barrel fill in PTH (Planting through hole) into three levels, 25%, 50% and 75%. However, in PCBA stage, when using X-ray to inspect PTH, it is often the case that after wave soldering, there will be solder void. If the size of the solder void accounts the majority size of the PTH, three levels of the IPC-610D is often regarded as the standards for approximate calculation. For instance, during X-ray inspection, if the size of solder void is smaller than 50% size of the PTH, then the product passes the inspection. However, such method is only for estimation purposes instead of precise calculation. Such situation is due to that the number of solder void may be more than one. Moreover, sometimes multiple solder void distribution is possible. It is difficult to analyze the cause of each individual solder void as well as calculate the size of the solder void precisely. Under such complicated circumstances, we focus on the root cause of PTH solder void by failure analysis method. The goal of the analysis is to prevent the occurrence of solder void in advance as well as establish the manufacturing indicators as a bench mark.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"108 1","pages":"617-619"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87645108","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：