Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382156
C. Zhan, Jing-Yao Chang, Tao-Chih Chang, Tsung-Fu Tsai
For the demand of multi-function and higher performance in electronic devices, the three-dimensional chip stacking technology with fine pitch and high input/output (I/O) interconnections has emerged recently. In addition, with the joint size becoming smaller, the current that each solder bump carried continues to increase, resulting in high current flowing in each individual joint. Therefore, electromigration has become a major reliability issue in microelectronic devices. In this study, a chip-on-chip test vehicle with a bump pitch of 30μm was adopted to evaluate the bonding feasibility and electromigration resistance of micro bump interconnections. There were more then 3000 micro bumps with Sn2.5Ag solder material on both the silicon chip and silicon carrier. Two types of under bump metallurgy layer (UBM) on the Si chip/carrier were selected in this study. One was single copper layer with a thickness of 8 um and the other was Ni/Cu layer with a total thickness of 8 μm. Different temperatures, times and pressures of thermo-compression bonding conditions were considered to obtain the optimization of bonding parameter. The 3D chip stacking using two layers of chip with fine pitch and lead-free interconnects was achieved in this study. Electromigration of micro bump interconnections in the joint structure of Cu/Ni/SnAg was investigated. Finite element analysis (FEA) was also employed to determine the current distribution in the solder joint. The results of electromigration test showed that the electromigration lifetime was well correlated with the bump microstructure.
{"title":"Bonding and electromigration of 30µm fine pitch micro-bump interconnection","authors":"C. Zhan, Jing-Yao Chang, Tao-Chih Chang, Tsung-Fu Tsai","doi":"10.1109/IMPACT.2009.5382156","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382156","url":null,"abstract":"For the demand of multi-function and higher performance in electronic devices, the three-dimensional chip stacking technology with fine pitch and high input/output (I/O) interconnections has emerged recently. In addition, with the joint size becoming smaller, the current that each solder bump carried continues to increase, resulting in high current flowing in each individual joint. Therefore, electromigration has become a major reliability issue in microelectronic devices. In this study, a chip-on-chip test vehicle with a bump pitch of 30μm was adopted to evaluate the bonding feasibility and electromigration resistance of micro bump interconnections. There were more then 3000 micro bumps with Sn2.5Ag solder material on both the silicon chip and silicon carrier. Two types of under bump metallurgy layer (UBM) on the Si chip/carrier were selected in this study. One was single copper layer with a thickness of 8 um and the other was Ni/Cu layer with a total thickness of 8 μm. Different temperatures, times and pressures of thermo-compression bonding conditions were considered to obtain the optimization of bonding parameter. The 3D chip stacking using two layers of chip with fine pitch and lead-free interconnects was achieved in this study. Electromigration of micro bump interconnections in the joint structure of Cu/Ni/SnAg was investigated. Finite element analysis (FEA) was also employed to determine the current distribution in the solder joint. The results of electromigration test showed that the electromigration lifetime was well correlated with the bump microstructure.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"52 1","pages":"154-157"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90861155","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382128
June-Che Lu, Yeong-Tong Hwang
Recently, high frequency signal transmission has been widely used in communication and broadband technologies, and even in mini-electronic devices. When signals travel at a high speed, how to maintain signal integrity becomes an important issue. Therefore, the electric properties in terms of dielectric constant (Dk) and loss factor (Df) of laminate materials for PCB production are more and more concerned. In our newly developed composition containing an epoxy resin, the epoxy resin has a molecular segment with low polarity in the polymer chain where the molecular segment is composed of a structure derived from a symmetric and saturated cycloaliphatic. The structure will reduce the dipole moment of the epoxy resin, so that the copper clad laminate produced from the composition containing the epoxy resin can have a low Dk and low Df
{"title":"A novel resin composition for low Dk copper clad laminate","authors":"June-Che Lu, Yeong-Tong Hwang","doi":"10.1109/IMPACT.2009.5382128","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382128","url":null,"abstract":"Recently, high frequency signal transmission has been widely used in communication and broadband technologies, and even in mini-electronic devices. When signals travel at a high speed, how to maintain signal integrity becomes an important issue. Therefore, the electric properties in terms of dielectric constant (Dk) and loss factor (Df) of laminate materials for PCB production are more and more concerned. In our newly developed composition containing an epoxy resin, the epoxy resin has a molecular segment with low polarity in the polymer chain where the molecular segment is composed of a structure derived from a symmetric and saturated cycloaliphatic. The structure will reduce the dipole moment of the epoxy resin, so that the copper clad laminate produced from the composition containing the epoxy resin can have a low Dk and low Df","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"97 1","pages":"251-253"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73517904","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382144
M. Mochizuki, Thang Nguyen, K. Mashiko, Y. Saito, X. P. Wu, T. Nguyen, V. Wuttijumnong
The trend of the computer processors performance and power consumption has been increased significantly each year. Heat dissipation has been increased but in contrast the size of die on the processor has been reduced or remained the same size due to nano-size circuit technology and thus the heat flux is critically high. The extreme high performance processors heat flux can be over 100 W/cm2, which is likely 10 times higher than the surface of the household standard clothes iron. The intention of this paper is to provide insight into various thermal management solution using heat pipes and vapor chambers as heat transfer devices. This paper includes designs, data, and discussions of various fan sink air cooling designs showing how the design changes to push the limit of the air cooling capability. The utilization of the two-phase fluid phenomena to spread the heat was a key factor to be the leader of extending the air cooling limit capability for high performance computers.
{"title":"Thermal management in high performance computers by use of heat Pipes and vapor chambers, and the challenges of global warming and environment","authors":"M. Mochizuki, Thang Nguyen, K. Mashiko, Y. Saito, X. P. Wu, T. Nguyen, V. Wuttijumnong","doi":"10.1109/IMPACT.2009.5382144","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382144","url":null,"abstract":"The trend of the computer processors performance and power consumption has been increased significantly each year. Heat dissipation has been increased but in contrast the size of die on the processor has been reduced or remained the same size due to nano-size circuit technology and thus the heat flux is critically high. The extreme high performance processors heat flux can be over 100 W/cm2, which is likely 10 times higher than the surface of the household standard clothes iron. The intention of this paper is to provide insight into various thermal management solution using heat pipes and vapor chambers as heat transfer devices. This paper includes designs, data, and discussions of various fan sink air cooling designs showing how the design changes to push the limit of the air cooling capability. The utilization of the two-phase fluid phenomena to spread the heat was a key factor to be the leader of extending the air cooling limit capability for high performance computers.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"29 1","pages":"191-194"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77960399","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382157
V. Lin, E. Chen, D. Jiang, Yu Po Wang
For the trend of electronic consumer product, more functionalities, high performance, miniaturization, high reliability and low cost have been demanded intensely, especially in the rapid growth of portable cell phone domain. Furthermore, multiple functional demand induces advanced package developments, such as System-on-Chip (SoC) and System-in-Package (SiP). System-on-chip (SoC) is an ideal package to integrate multiple functionalities in the chip level. But the design and testing are not yet mature that, high cost and low manufacturing yield, drive multiple functional integration technology toward System-in-Package (SiP) development.
{"title":"Warpage and stress characteristic analyses on wire-bond-S-FCCSP structure","authors":"V. Lin, E. Chen, D. Jiang, Yu Po Wang","doi":"10.1109/IMPACT.2009.5382157","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382157","url":null,"abstract":"For the trend of electronic consumer product, more functionalities, high performance, miniaturization, high reliability and low cost have been demanded intensely, especially in the rapid growth of portable cell phone domain. Furthermore, multiple functional demand induces advanced package developments, such as System-on-Chip (SoC) and System-in-Package (SiP). System-on-chip (SoC) is an ideal package to integrate multiple functionalities in the chip level. But the design and testing are not yet mature that, high cost and low manufacturing yield, drive multiple functional integration technology toward System-in-Package (SiP) development.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"71 1","pages":"144-147"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76301653","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382290
Terng-Ren Hsu, Terng-Yin Hsu, Lin-Jin Wu, Zong-Cheng Ou
In this work, we base on multi-layered perceptron neural networks with backpropagation algorithm (MLP/BP) to construct multi-input multi-output (MIMO) decision feedback equalizers (DFEs). The proposal is used to recover distorted 16-point quadrature amplitude modulation (16-QAM) signal. From the simulations, we note that the proposed approach can recover severe distorted signals as well as suppress intersymbol interference (ISI), adjacent channel interference (ACI) and background additive white Gaussian noise (AWGN). As compared with a set of LMS DFEs, the proposed scheme can provide better BER and PER performance.
{"title":"MLP/BP-based MIMO DFEs for distorted 16-QAM signal recovery in severe ISI channels with ACI disturbances","authors":"Terng-Ren Hsu, Terng-Yin Hsu, Lin-Jin Wu, Zong-Cheng Ou","doi":"10.1109/IMPACT.2009.5382290","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382290","url":null,"abstract":"In this work, we base on multi-layered perceptron neural networks with backpropagation algorithm (MLP/BP) to construct multi-input multi-output (MIMO) decision feedback equalizers (DFEs). The proposal is used to recover distorted 16-point quadrature amplitude modulation (16-QAM) signal. From the simulations, we note that the proposed approach can recover severe distorted signals as well as suppress intersymbol interference (ISI), adjacent channel interference (ACI) and background additive white Gaussian noise (AWGN). As compared with a set of LMS DFEs, the proposed scheme can provide better BER and PER performance.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"19 1","pages":"726-729"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85243190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382167
Y.S. Chen, Po-Shiang Chiou
The vibration environment will cause damage firstly at all corner's solder balls in BGA components. Some of researches replaced the corner solder balls with larger ones or solder columns to reduce stress, or even just placed a solder ball without electrical function on corners to bear stresses. But all these designs have to modify the existing process in production line just for such special components and thus will increase the cost. This research would use new designs by either adding ribs at component's peripheral or replacing the current heat-spreader on BGAs with elastic metallic sheet to increase the component's rigidity, and also to restrain the vibration induced deformation on PCBs.
{"title":"Design for the enhancement of anti-vibration characteristics of surface mount type electronic components","authors":"Y.S. Chen, Po-Shiang Chiou","doi":"10.1109/IMPACT.2009.5382167","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382167","url":null,"abstract":"The vibration environment will cause damage firstly at all corner's solder balls in BGA components. Some of researches replaced the corner solder balls with larger ones or solder columns to reduce stress, or even just placed a solder ball without electrical function on corners to bear stresses. But all these designs have to modify the existing process in production line just for such special components and thus will increase the cost. This research would use new designs by either adding ribs at component's peripheral or replacing the current heat-spreader on BGAs with elastic metallic sheet to increase the component's rigidity, and also to restrain the vibration induced deformation on PCBs.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"21 1","pages":"104-107"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81602077","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382127
Chi Cheng Chen, Chih Hong Chen, Mei Ling Chen
The developing trend for the high performance electronic devices still focuses on light, thin, short and small exhibiting high heat resistance and multifunctional properties. To meet the above requirements, the copper clad laminate substrate preferably produced from the materials having high thermal resistance, high glass transition temperature and low CTE. For the above purposes, we used 2,7-dihydroxynaphthalene tetra-function epoxy has a symmetrical molecular structure and high proportion of thermal stabilization naphthalene ring in our newly developed formulation for the production of CCL. When the 2,7-dihydroxynaphthalene epoxy is cured, it will import the CCL with excellent physical properties.
{"title":"Study of naphthalene epoxy resin for low CTE copper clad laminate","authors":"Chi Cheng Chen, Chih Hong Chen, Mei Ling Chen","doi":"10.1109/IMPACT.2009.5382127","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382127","url":null,"abstract":"The developing trend for the high performance electronic devices still focuses on light, thin, short and small exhibiting high heat resistance and multifunctional properties. To meet the above requirements, the copper clad laminate substrate preferably produced from the materials having high thermal resistance, high glass transition temperature and low CTE. For the above purposes, we used 2,7-dihydroxynaphthalene tetra-function epoxy has a symmetrical molecular structure and high proportion of thermal stabilization naphthalene ring in our newly developed formulation for the production of CCL. When the 2,7-dihydroxynaphthalene epoxy is cured, it will import the CCL with excellent physical properties.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"3 1","pages":"247-250"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81890696","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382229
S. Peng, D. Lin, C. Ho
Recently, the Au/Pd/Ni(P) tri-layer has become one of the promising replacements for the Au/Ni(P) surface finish in array-array packaging applications. The key motivation for this developed trend is the additional Pd layer can prevent the Ni(P) from the galvanic hyper-corrosion that has long been recognized to be the root cause of “black pads”. In the present study, the solderability of the Au/Pd/Ni(P) [0.1(±0.03) µm /0.2(±0.02) µm /7 ±m in thickness] are evaluated using Sn37Pb and Sn3Ag0.5Cu for various soldering times of 5 – 300 seconds. Comparison of the results shows that the interfacial reactions in both soldering systems are strong time dependence. During Sn37Pb soldering, it is found that the Au layer can disappear in 5 seconds, exposing the underlying Pd to solder as a (Pd,Ni)Sn4 layer. The (Pd,Ni)Sn4 then breaks off at the roots of grains and spall into the solder after soldering for 15 additional seconds. In turn, the Ni(P) would contact with solder and forms a discontinuous, chunk-like Ni3Sn4. Beneath the Ni3Sn4, there is a layer of Ni3P. Interestingly, the reactions change dramatically when the Sn3Ag0.5Cu replaces the Sn37Pb for soldering. Firstly, both Au and Pd can be depleted by Sn3Ag0.5Cu in the beginning 5 seconds of soldering. Additionally, a dense (Cu,Ni)6Sn5 rather than Ni3Sn4 becomes the dominant reaction product over the Ni(P). Another interesting difference is that a much thinner Ni3P forms at the interface excepting the region that the Ni(P) is direct in tough with the solder. The variation in Ni3P can be attributed to a lower Ni consumption by forming a dense (Cu,Ni)6Sn5 than a scattered Ni3Sn4.
{"title":"Comparative study of Au/Pd/Ni(P) surface finish in eutectic PbSn and Sn3Ag0.5Cu soldering systems","authors":"S. Peng, D. Lin, C. Ho","doi":"10.1109/IMPACT.2009.5382229","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382229","url":null,"abstract":"Recently, the Au/Pd/Ni(P) tri-layer has become one of the promising replacements for the Au/Ni(P) surface finish in array-array packaging applications. The key motivation for this developed trend is the additional Pd layer can prevent the Ni(P) from the galvanic hyper-corrosion that has long been recognized to be the root cause of “black pads”. In the present study, the solderability of the Au/Pd/Ni(P) [0.1(±0.03) µm /0.2(±0.02) µm /7 ±m in thickness] are evaluated using Sn37Pb and Sn3Ag0.5Cu for various soldering times of 5 – 300 seconds. Comparison of the results shows that the interfacial reactions in both soldering systems are strong time dependence. During Sn37Pb soldering, it is found that the Au layer can disappear in 5 seconds, exposing the underlying Pd to solder as a (Pd,Ni)Sn<inf>4</inf> layer. The (Pd,Ni)Sn<inf>4</inf> then breaks off at the roots of grains and spall into the solder after soldering for 15 additional seconds. In turn, the Ni(P) would contact with solder and forms a discontinuous, chunk-like Ni<inf>3</inf>Sn<inf>4</inf>. Beneath the Ni<inf>3</inf>Sn<inf>4</inf>, there is a layer of Ni<inf>3</inf>P. Interestingly, the reactions change dramatically when the Sn3Ag0.5Cu replaces the Sn37Pb for soldering. Firstly, both Au and Pd can be depleted by Sn3Ag0.5Cu in the beginning 5 seconds of soldering. Additionally, a dense (Cu,Ni)<inf>6</inf>Sn<inf>5</inf> rather than Ni<inf>3</inf>Sn<inf>4</inf> becomes the dominant reaction product over the Ni(P). Another interesting difference is that a much thinner Ni<inf>3</inf>P forms at the interface excepting the region that the Ni(P) is direct in tough with the solder. The variation in Ni<inf>3</inf>P can be attributed to a lower Ni consumption by forming a dense (Cu,Ni)<inf>6</inf>Sn<inf>5</inf> than a scattered Ni<inf>3</inf>Sn<inf>4</inf>.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"43 1","pages":"505-508"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82520229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382188
Shen-Chun Wu, J. Peng, Shih-Ru Lai, C. Yeh, Yau‐Ming Chen
Loop heat pipes (LHPs) have a great potential for applications of electronic cooling due to the advantages of high transfer capacity, low thermal resistance and long transport distances.
环路热管具有传输能力高、热阻小、传输距离长等优点，在电子制冷领域具有很大的应用潜力。
{"title":"Investigation of the effect of heat leak in loop heat pipes with flat evaporator","authors":"Shen-Chun Wu, J. Peng, Shih-Ru Lai, C. Yeh, Yau‐Ming Chen","doi":"10.1109/IMPACT.2009.5382188","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382188","url":null,"abstract":"Loop heat pipes (LHPs) have a great potential for applications of electronic cooling due to the advantages of high transfer capacity, low thermal resistance and long transport distances.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"22 1","pages":"348-351"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"91533291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-10-01DOI: 10.1109/IMPACT.2009.5382244
Shang-Chou Chang, To-Sing Li, Tien-Chai Lin, Jian-Hua Lee
Microwave plasma enhanced chemical vapor deposition (MPECVD) was applied in growing carbon nano tubes (CNTs) on sodium free glass with different interface layer materials. Surface morphology and field emission characteristics of as grown CNTs were measured. Three different materials: titanium(Ti), gold(Au) and indium tin oxide (ITO) thin films were prepared on glass first as the interface role between CNTs and glass. Nickel(Ni) films were sputtered on three different interface films and also direct on glass. After hydrogen plasma pretreatment on nickel films, CNTs were tried to grow on four kinds of glass combination: Ni/glass, Ni/ITO/glass, Ni/Au/glass and Ni/Ti/glass, three substrate temperatures: unheated, 300°C and 500 °C, with the mixture of methane and hydrogen microwave plasma. It was found CNTs can be grown with high CNTs density, high adhesion and 2.5V/ µ m turn on electric field corresponding to Ni/Ti/glass and 500 °C process condition. The same MPECVD system with same pretreatment and process gas can be used to grow CNTs on silicon substrate without extra substrate heating. It is proposed the electrical conductivity of substrate has strong influence on CNTs growth. The interface material like Ti can modify the electrical conductivity of the substrate surface.
{"title":"Carbon nano tubes grown on glass substrate with different interface layer","authors":"Shang-Chou Chang, To-Sing Li, Tien-Chai Lin, Jian-Hua Lee","doi":"10.1109/IMPACT.2009.5382244","DOIUrl":"https://doi.org/10.1109/IMPACT.2009.5382244","url":null,"abstract":"Microwave plasma enhanced chemical vapor deposition (MPECVD) was applied in growing carbon nano tubes (CNTs) on sodium free glass with different interface layer materials. Surface morphology and field emission characteristics of as grown CNTs were measured. Three different materials: titanium(Ti), gold(Au) and indium tin oxide (ITO) thin films were prepared on glass first as the interface role between CNTs and glass. Nickel(Ni) films were sputtered on three different interface films and also direct on glass. After hydrogen plasma pretreatment on nickel films, CNTs were tried to grow on four kinds of glass combination: Ni/glass, Ni/ITO/glass, Ni/Au/glass and Ni/Ti/glass, three substrate temperatures: unheated, 300°C and 500 °C, with the mixture of methane and hydrogen microwave plasma. It was found CNTs can be grown with high CNTs density, high adhesion and 2.5V/ µ m turn on electric field corresponding to Ni/Ti/glass and 500 °C process condition. The same MPECVD system with same pretreatment and process gas can be used to grow CNTs on silicon substrate without extra substrate heating. It is proposed the electrical conductivity of substrate has strong influence on CNTs growth. The interface material like Ti can modify the electrical conductivity of the substrate surface.","PeriodicalId":6410,"journal":{"name":"2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference","volume":"9 1","pages":"561-564"},"PeriodicalIF":0.0,"publicationDate":"2009-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88860592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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